JPS6216441B2 - - Google Patents
Info
- Publication number
- JPS6216441B2 JPS6216441B2 JP55043964A JP4396480A JPS6216441B2 JP S6216441 B2 JPS6216441 B2 JP S6216441B2 JP 55043964 A JP55043964 A JP 55043964A JP 4396480 A JP4396480 A JP 4396480A JP S6216441 B2 JPS6216441 B2 JP S6216441B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- smoothing
- recording
- diode
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000009499 grossing Methods 0.000 claims description 16
- 239000003990 capacitor Substances 0.000 claims description 13
- 230000005236 sound signal Effects 0.000 claims description 12
- 230000003321 amplification Effects 0.000 claims description 3
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 3
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3005—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
【発明の詳細な説明】
本発明は磁気記録再生装置の音声信号増幅装置
に関するもので、特に記録増幅器と再生増幅器が
兼用され、しかも記録時に録音レベルの自動調節
機能を有している、いわゆるAGC（自動利得制
御）増幅回路付の装置として有用なものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an audio signal amplification device for a magnetic recording/reproducing device, and in particular to a so-called AGC, which serves as both a recording amplifier and a reproduction amplifier, and has an automatic recording level adjustment function during recording. (Automatic gain control) This is useful as a device with an amplifier circuit.
従来、上記のように記録再生兼用増幅器を用い
る場合には周波数等化特性の切換や、再生時にお
けるAGC回路の切離しのために多回路のスライ
ドスイツチ等が用いられていた。しかしながら、
近年、切換スイツチ回路の電子化等に対する要求
が高まり、切換接続個所の削減が望まれていた。 Conventionally, when a recording/reproducing amplifier is used as described above, a multi-circuit slide switch or the like has been used to switch the frequency equalization characteristics and disconnect the AGC circuit during reproduction. however,
In recent years, there has been an increasing demand for electronic switching circuits, and there has been a desire to reduce the number of switching connection points.
本発明は、上記のような要望のもとになされた
ものであり、以下図面を参照して詳細に説明す
る。図面において、１は音声信号入力端子、２は
前置増幅器、３はAGC増幅器、４は出力増幅
器、５は音声信号出力端子、６は整流回路、７は
平滑回路、１２は記録再生切換スイツチ回路、１
９は記録・再生切換スイツチで、記録時にはＲ側
に、再生時にはＰ側に接続される。 The present invention has been made based on the above-mentioned demands, and will be described in detail below with reference to the drawings. In the drawing, 1 is an audio signal input terminal, 2 is a preamplifier, 3 is an AGC amplifier, 4 is an output amplifier, 5 is an audio signal output terminal, 6 is a rectifier circuit, 7 is a smoothing circuit, and 12 is a recording/playback switch circuit. ,1
Reference numeral 9 denotes a recording/reproduction changeover switch, which is connected to the R side during recording and to the P side during playback.
ここで、記録モードにおける信号の流れについ
て説明すると、音声信号入力端子１に供給された
信号は前置増幅器２、AGC増幅器３、出力増幅
器４で増幅され、音声信号出力端子５に出力され
る。この時、出力信号の一部は、整流回路６で整
流された後、平滑回路７で平滑されて、出力信号
のレベルに応じた直流信号となり、AGC制御端
子１１に印加される。従つて、記録時は周知の
AGCの働きにより、音声信号の出力レベルが定
められた一定値に制御される。 Here, to explain the signal flow in the recording mode, a signal supplied to the audio signal input terminal 1 is amplified by the preamplifier 2, the AGC amplifier 3, and the output amplifier 4, and is output to the audio signal output terminal 5. At this time, a part of the output signal is rectified by the rectifier circuit 6 and then smoothed by the smoothing circuit 7 to become a DC signal according to the level of the output signal, which is applied to the AGC control terminal 11. Therefore, when recording,
AGC functions to control the output level of the audio signal to a predetermined constant value.
一方、再生時においては記録・再生スイツチ１
９がＰ側に接続されているから、音声信号は前置
増幅器２から直接出力増幅器４に印加され、
AGC作用を受けることなく音声信号出力端子５
へ出力される。すなわち、本発明の構成では、再
生時でも出力信号の一部は整流回路６で整流さ
れ、平滑回路７で平滑された信号がAGC制御端
子１１に印加されているわけであるが、出力信号
には影響を与えることはない。 On the other hand, during playback, record/playback switch 1
9 is connected to the P side, the audio signal is applied directly from the preamplifier 2 to the output amplifier 4,
Audio signal output terminal 5 without being affected by AGC
Output to. That is, in the configuration of the present invention, even during reproduction, a part of the output signal is rectified by the rectifier circuit 6, and the signal smoothed by the smoothing circuit 7 is applied to the AGC control terminal 11. has no effect.
ところで、AGC増幅器においては、平滑回路
の放電時定数が短かい場合、その出力信号が音声
信号の断続に応じて変動し非常に不自然となる。
そこで、一般的には、放電時定数が数10秒から数
分という非常に大きな値に選ばれているのが普通
である。そのような時定数を有する平滑回路７の
例では２重時定数と呼ばれる回路が用いられてお
り、コンデンサ８と並列に抵抗器９とコンデンサ
１０の直列回路が接続され、コンデンサの容量値
は８に比して１０が大きくなるように選ばれてい
る。この回路を用いた場合には、充電時定数がほ
ぼコンデンサ８の容量値で決まり、放電時定数
は、コンデンサ１０と抵抗器９とで形成される直
列回路および、その直列回路と等価的に並列接続
される抵抗分とで決定されるから、AGC回路の
アタツクタイムをそれほど遅くしないでリカバー
タイムを充分長くとることができる。 By the way, in an AGC amplifier, if the discharge time constant of the smoothing circuit is short, the output signal will fluctuate in accordance with the interruption of the audio signal, which will be very unnatural.
Therefore, the discharge time constant is generally selected to be a very large value of several tens of seconds to several minutes. An example of the smoothing circuit 7 having such a time constant uses a circuit called a double time constant, in which a series circuit of a resistor 9 and a capacitor 10 is connected in parallel with the capacitor 8, and the capacitance value of the capacitor is 8. 10 is chosen to be larger than . When this circuit is used, the charging time constant is determined approximately by the capacitance value of the capacitor 8, and the discharging time constant is determined by the series circuit formed by the capacitor 10 and the resistor 9, and the series circuit equivalently parallel to the series circuit. Since it is determined by the connected resistance, the recovery time can be made long enough without slowing down the attack time of the AGC circuit.
上記のような放電時定数の大きなAGC制御回
路であるから、例えば再生モード中に非常に大レ
ベルの信号が入つてきた場合とか、何らかの原因
でクリツクノイズのようなものが発生した場合に
は、平滑回路７には必要以上の大レベル信号が長
時間蓄積されることになる。したがつて、上記の
ような条件下でもつて、急に記録モードに切換え
が行なわれたような場合には、AGCが深くかか
りすぎ、出力信号が非常に小さくなつてしまうと
いう不都合を生ずる。 Since this is an AGC control circuit with a large discharge time constant as described above, for example, if a very high level signal comes in during playback mode, or if something like click noise occurs for some reason, Unnecessarily large level signals are stored in the smoothing circuit 7 for a long time. Therefore, even under the above conditions, if there is a sudden change to the recording mode, the AGC will be applied too deeply, resulting in the inconvenience that the output signal will become very small.
そこで本発明の実施例では、平滑回路７の一部
に抵抗器１７とダイオード１８から成る切離し加
能な放電路２０を形成することによつて上記の問
題を解決している。すなわち、再生モードにおい
ては前記放電路２０の抵抗器１７とダイオード１
８との直列回路をコンデンサ１０に並列接続さ
せ、記録モードにおいては前記放電路２０が切離
されるようにしたものである。 Therefore, in the embodiment of the present invention, the above problem is solved by forming a separable discharge path 20 consisting of a resistor 17 and a diode 18 in a part of the smoothing circuit 7. That is, in the regeneration mode, the resistor 17 and diode 1 of the discharge path 20
8 is connected in parallel to the capacitor 10, and the discharge path 20 is disconnected in the recording mode.
上記のごとく構成するならば、記録時には平滑
回路７の働きが従来通りであるからなんら不都合
はない。また、再生時にはコンデンサ１０に蓄積
されている電荷が放電路２０を通じて放電される
から、放電路２０の抵抗値を低くすればするほど
コンデンサ２０の電荷を早く放電させることがで
きる。したがつて前述したごとく再生時の異常信
号によつて、平滑回路７に大レベルのAGC制御
信号が長時間保持されるという不都合はなくな
る。 If configured as described above, there will be no problem since the smoothing circuit 7 functions as before during recording. Further, during reproduction, the charges stored in the capacitor 10 are discharged through the discharge path 20, so the lower the resistance value of the discharge path 20, the faster the charges in the capacitor 20 can be discharged. Therefore, as described above, there is no longer a problem in which a high-level AGC control signal is held in the smoothing circuit 7 for a long time due to an abnormal signal during reproduction.
前記放電路２０を記録時と再生時とでつなぎ替
える方法として本発明の実施例では記録・再生切
換スイツチ回路１２を用いた。この記録・再生切
換スイツチ回路１２は実質的にはトランジスタ・
インバータスイツチであり、トランジスタ１４の
エミツタは直接接地され、そのコレクタは抵抗器
１５によつて電源＋Vccに接続されているととも
に、前記放電路２０が接続されている。また、ト
ランジスタ１４のベースは抵抗器１６を通じて記
録・再生切換信号印加端子１３に接続されてい
る。 In the embodiment of the present invention, a recording/reproduction changeover switch circuit 12 is used as a method for switching the connection of the discharge path 20 between recording and reproduction. This recording/reproduction switch circuit 12 is essentially a transistor.
This is an inverter switch, and the emitter of the transistor 14 is directly grounded, and its collector is connected to the power supply +Vcc through a resistor 15, and is also connected to the discharge path 20. Further, the base of the transistor 14 is connected to the recording/reproduction switching signal application terminal 13 through a resistor 16.
ここで、記録・再生切換信号印加端子１３には
再生時のみ、正の電位が供給されるものとすれ
ば、トランジスタ１４は再生時に導通状態とな
り、記録時には遮断状態となる。そこで、再生時
は、トランジスタ１４のコレクタすなわち、ダイ
オード１８のカソード側が等価的に接地されるか
ら、コンデンサ１０の電荷が抵抗器１７、ダイオ
ード１８を通して放電される。また、記録モード
ではトランジスタ１４のコレクタ電位は＋Vccま
で上昇するから、ダイオード１８のアノード・カ
ソード間電位は逆バイアスされてダイオード１８
はカツトオフ状態となる。したがつて、放電路２
０は非常に抵抗値が大きくなり、コンデンサ１０
の放電路となることはない。 Here, assuming that a positive potential is supplied to the recording/reproduction switching signal application terminal 13 only during reproduction, the transistor 14 is in a conductive state during reproduction and is in a cut-off state during recording. Therefore, during reproduction, the collector of the transistor 14, that is, the cathode side of the diode 18, is equivalently grounded, so that the charge in the capacitor 10 is discharged through the resistor 17 and the diode 18. Furthermore, in the recording mode, the collector potential of the transistor 14 rises to +Vcc, so the potential between the anode and cathode of the diode 18 is reverse biased, and the potential of the diode 18 is reverse biased.
is in a cut-off state. Therefore, discharge path 2
0 has a very large resistance value, and the capacitor 10
It does not become a discharge path.
以上のように本発明によればAGC増幅器を有
する音声信号増幅装置において、再生時でも
AGC制御信号を得るための整流回路を信号路か
ら切離す必要がなくなつたため、記録・再生切換
スイツチの回路数を削限でき、さらに電子スイツ
チ化が可能であるから小型化が容易である等の優
れた特長を有するものである。 As described above, according to the present invention, in an audio signal amplification device having an AGC amplifier, even during playback,
Since there is no longer a need to separate the rectifier circuit for obtaining the AGC control signal from the signal path, the number of circuits for the recording/playback switch can be reduced, and furthermore, it is possible to use an electronic switch, which facilitates miniaturization. It has excellent features.
図面は本発明の一実施例の要部回路構成図であ
る。
３……AGC増幅器、６……整流回路、７……
平滑回路（２重時定数回路）、８，１０……コン
デンサ、１１……AGC制御端子、１２……記
録・再生切換スイツチ回路、１８……ダイオー
ド、２０……放電路。
The drawing is a circuit configuration diagram of a main part of an embodiment of the present invention. 3... AGC amplifier, 6... Rectifier circuit, 7...
Smoothing circuit (double time constant circuit), 8, 10... Capacitor, 11... AGC control terminal, 12... Record/playback switching circuit, 18... Diode, 20... Discharge path.
Claims (1)
て音声信号系の利得が制御される増幅器と、その
増幅器の出力信号の一部から前記制御信号を作る
ための整流回路および該整流された信号を平滑化
するための２重時定数を有する平滑回路とから成
るAGC増幅回路において、前記平滑回路の２重
時定数を決定する２個のコンデンサのうち、容量
値の大きいコンデンサの一端に抵抗とダイオード
から成る直列回路を接続し、記録時には前記ダイ
オードのアノード・カソード間電位を逆バイアス
状態にし、再生時には、前記ダイオードに、前記
平滑回路の放電電流が流れるように、前記抵抗と
ダイオードの直列回路の他端を記録・再生切換ス
イツチ回路に接続したことを特徴とする音声信号
増幅装置。1. An amplifier in which the gain of the audio signal system is controlled by a DC control signal applied to a control terminal, a rectifier circuit for generating the control signal from a part of the output signal of the amplifier, and a rectifier circuit for smoothing the rectified signal. In an AGC amplifier circuit consisting of a smoothing circuit having a double time constant for smoothing the smoothing circuit, a resistor and a diode are connected to one end of the capacitor with a larger capacitance among the two capacitors that determine the double time constant of the smoothing circuit. A series circuit consisting of the resistor and the diode is connected in such a way that the potential between the anode and cathode of the diode is reverse biased during recording, and the discharge current of the smoothing circuit flows through the diode during reproduction. An audio signal amplification device characterized in that one end of the device is connected to a recording/playback switch circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4396480A JPS56140714A (en) | 1980-04-02 | 1980-04-02 | Voice signal amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4396480A JPS56140714A (en) | 1980-04-02 | 1980-04-02 | Voice signal amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56140714A JPS56140714A (en) | 1981-11-04 |
| JPS6216441B2 true JPS6216441B2 (en) | 1987-04-13 |
Family
ID=12678385
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4396480A Granted JPS56140714A (en) | 1980-04-02 | 1980-04-02 | Voice signal amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56140714A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009027364A (en) | 2007-07-18 | 2009-02-05 | Sanyo Electric Co Ltd | Automatic gain amplifier circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS544920Y2 (en) * | 1972-11-14 | 1979-03-02 | ||
| JPS5157120U (en) * | 1974-10-30 | 1976-05-06 |
-
1980
- 1980-04-02 JP JP4396480A patent/JPS56140714A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56140714A (en) | 1981-11-04 |
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