JPS62109366A - Mos field effect transistor - Google Patents
Mos field effect transistorInfo
- Publication number
- JPS62109366A JPS62109366A JP60249437A JP24943785A JPS62109366A JP S62109366 A JPS62109366 A JP S62109366A JP 60249437 A JP60249437 A JP 60249437A JP 24943785 A JP24943785 A JP 24943785A JP S62109366 A JPS62109366 A JP S62109366A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- voltage
- reverse
- conductivity type
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 title claims description 3
- 239000012535 impurity Substances 0.000 claims abstract description 22
- 230000015556 catabolic process Effects 0.000 abstract description 11
- 230000000903 blocking effect Effects 0.000 abstract description 3
- 238000002513 implantation Methods 0.000 abstract 1
- 230000003321 amplification Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- VMXJCRHCUWKQCB-UHFFFAOYSA-N NPNP Chemical compound NPNP VMXJCRHCUWKQCB-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
Abstract
Description
本発明はマグネト−トランジスタ方式点火回路の主電流
制御用に用いることのできる定電圧の逆方向耐圧を存す
るＭ ＯＳ電界効果トランジスタ（以下ＭＯ５ＦＰ：Ｔ
と記す）に関する。The present invention relates to an MOS field effect transistor (hereinafter referred to as MO5FP: T
).
第２図は公知のマグネト−トランジスタ方式点火回路を
示し、現在は主電流制御用のトランジスタとして高耐圧
のダーリントントランジスタ２１が使用されている。今
マグネト−の回転によりイグニションコイル２２のＡ点
がＢ点に対して正になる電圧が誘起されると、抵抗ｒｌ
＋ ｒａを通してダーリントントランジスタ２１のベー
スに電流が流れ、トランジスタ２１は導通する０次にＡ
点の電圧がさらに上昇した場合、抵抗ｒｌ＋ ｒ３の電
圧分担に従って所定の電圧で短絡用トランジスタ２３が
導通することになり、ダーリントントランジスタ２１は
オフになってその結果Ａ点に高電圧が誘起され、イグニ
ションコイル２２の二次側ＣＤ間にプラグを点火するに
充分な高圧が発生してプラグ２４が点火する。
次にＡ点に対してＢ点が正となる電圧が誘起された場合
、この電圧を一定電圧（イグニションコイル設計により
多少変化する）に抑えないと、プリスパーク現象、誤点
火等の問題が発生する。しかし、電圧を低く抑えすぎる
と、次にＡ点がＢ点に対して正となるときに電圧とｉｔ
の位相差が大きくなり、を流室上がりの時間的遅れが問
題となる。
逆に高くしすぎるとイグニションコイル二次側に不必要
な高圧が発生して誤点火するようになるので、１０〜５
０Ｖ程度に電圧を制御する必要がある。
この電圧制御は、第２図におけるイグニシ璽ンコイルの
Ｂ点とトランジスタ２１のベースの間に直列に接続され
た抵抗Ｒおよびダイオード２５を通してトランジスタ２
１のベースからコレクタに電流を流し、このダーリント
ントランジスタを通して電流が流れるようにしてＢ点が
一定電圧範囲にあるようにすることによって行われる。
もしＭＯＳＦＥＴのソース側のドレイン側に対して正と
なる電圧（逆電圧）が印加されたとき、一定範囲の電圧
でブレークダウンするような逆方向一定電圧ＭＯＳＦＥ
Ｔを製作し、第３図に示すようにそのようなＭＯＳＦＥ
Ｔ２６を第２図のダーリントントランジスタ２１の代わ
りに使用すれば、回路が簡単になる。また高耐圧になる
ほど二次破壊現象が起こりやす＜、ｉｔｉ密度が制限さ
れるダーリントントランジスタの欠点が回避でき、チッ
プ面積を小さくすることも可能であって経済的となる。
しかし、一般のＭＯＳＦＥＴでは逆方向阻止能力がなく
、ＰＮ接合での順方向電圧降下のみがあるが、逆方向■
止能力を有するＭＯＳＦＥＴとして第４図に示すような
構造の素子が伝導度変調形ＭＯＳＦＥＴまたはゲート絶
縁形トランジスタとして発表されている。すなわち、Ｎ
形シリコン基板１の下面には２９層２．上面にはＰウェ
ル層に囲まれたＮ゛ソース領域４が形成され、Ｐウェル
層３のＮ゛ソース領域４の外側での上面露出部上に絶縁
ＩＩ！Ｉ５を介してゲート電極６が設けられている。ソ
ース電極７はソース？Ｉ■域４およびＰウェル１ｉ３に
接触し、ドレイン電極８は２１層２に接触している。こ
の構造のＭＯＳＦＥＴは、ドレイン！１に接してＰ″層
２が形成されているために、ドレイン層に正孔が注入さ
れてドレイン層の伝導度変調が起こり、電圧降下を小さ
くする効果があって、一般のＭＯＳＦＥＴに比して電力
を員失が小さい、このＭＯＳＦＥＴでは、ソース電極７
がドレイン電極８に対して正となる逆方向電圧印加の場
合の耐圧は、Ｎ一層ｌの不純物濃度により決定され、ド
レイン電極８がソース電極７に対して正となる順方向電
圧印加に対する耐圧と同程度の耐圧を存し、順方向電圧
より低い一定電圧でブレークダウンして一定電圧を保持
する目的には使用できない。FIG. 2 shows a known magneto-transistor type ignition circuit, in which a high-voltage Darlington transistor 21 is currently used as the main current control transistor. Now, when the rotation of the magneto induces a voltage that makes the point A of the ignition coil 22 positive with respect to the point B, the resistance rl
A current flows through the base of the Darlington transistor 21 through +ra, and the transistor 21 becomes conductive.
If the voltage at the point further increases, the shorting transistor 23 will become conductive at a predetermined voltage according to the voltage sharing of the resistors rl+r3, and the Darlington transistor 21 will be turned off, resulting in a high voltage being induced at the point A. A high voltage sufficient to ignite the plug is generated between the secondary side CD of the ignition coil 22 and the plug 24 is ignited. Next, if a voltage is induced that makes point B positive with respect to point A, unless this voltage is suppressed to a constant voltage (varies slightly depending on the ignition coil design), problems such as pre-sparking and erroneous ignition will occur. do. However, if the voltage is kept too low, the next time point A becomes positive with respect to point B, the voltage and it
The phase difference between the two becomes large, and the time delay in the rise of the flow chamber becomes a problem. On the other hand, if you set it too high, unnecessary high pressure will be generated on the secondary side of the ignition coil, causing erroneous ignition.
It is necessary to control the voltage to about 0V. This voltage control is performed by the transistor 2 through the resistor R and diode 25 connected in series between the point B of the ignition coil and the base of the transistor 21 in FIG.
This is done by passing a current from the base to the collector of the Darlington transistor so that the current flows through this Darlington transistor so that point B is within a constant voltage range. If a positive voltage (reverse voltage) is applied to the source side and drain side of the MOSFET, the reverse constant voltage MOSFE will break down within a certain range of voltage.
T and such a MOSFE as shown in Figure 3.
If T26 is used in place of the Darlington transistor 21 of FIG. 2, the circuit will be simplified. Further, the higher the withstand voltage is, the more likely secondary breakdown phenomenon is to occur, and the disadvantage of the Darlington transistor in which the density is limited can be avoided, and the chip area can be reduced, which is economical. However, general MOSFETs do not have reverse blocking ability and only have a forward voltage drop at the PN junction.
As a MOSFET having a stopping ability, an element having a structure as shown in FIG. 4 has been announced as a conductivity modulation MOSFET or an insulated gate transistor. That is, N
The bottom surface of the shaped silicon substrate 1 has 29 layers 2. An N source region 4 surrounded by a P well layer is formed on the upper surface, and an insulating layer II! A gate electrode 6 is provided via I5. Is source electrode 7 a source? It is in contact with the I2 region 4 and the P well 1i3, and the drain electrode 8 is in contact with the 21 layer 2. A MOSFET with this structure is a drain! Since the P'' layer 2 is formed in contact with the MOSFET 1, holes are injected into the drain layer and the conductivity of the drain layer is modulated, which has the effect of reducing the voltage drop, compared to a general MOSFET. In this MOSFET, the source electrode 7
The withstand voltage in the case of applying a reverse voltage when the drain electrode 8 is positive with respect to the drain electrode 8 is determined by the impurity concentration of N and 1, and the withstand voltage in the case of applying a forward voltage when the drain electrode 8 is positive with respect to the source electrode 7. They have similar breakdown voltages, but break down at a constant voltage lower than the forward voltage and cannot be used to maintain a constant voltage.
本発明は、上述の問題を解決してマグネト−トランジス
タ方式の点火回路に用いることができ、逆方向耐圧を所
定の電圧範囲にすることが可能なＭＯＳＦＥＴを提供す
ることを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a MOSFET which can be used in a magneto-transistor type ignition circuit and whose reverse breakdown voltage can be set within a predetermined voltage range.
本発明によれば、第一導電形の低不純物濃度ドレイン層
の一面側の一部に第二導電形のウェル層に囲まれた第一
導電形のソース領域を有し、ソース領域外方でのウェル
層の前記一面への露出部上に絶縁膜を介してゲート電極
が設けられ、ゲート電極の側方においてソース領域およ
びソース領域内方でのウェル層の一面への露出部が共通
にソース電極に接触し、ドレイン層の他面側は高不純物
濃度の第一導電形層および高不純物１度の第二導電形層
を介してドレイン電極に接触することにより、逆方向耐
圧がドレインｉｐｉ側の高不純物濃度の第一導電形層と
第二導電形層により決り、その第一導電形層の不純’＆
７！度および厚さによって調整できるため上記の目的が
達成される。According to the present invention, the source region of the first conductivity type surrounded by the well layer of the second conductivity type is provided on a part of one side of the low impurity concentration drain layer of the first conductivity type, and the source region of the first conductivity type is surrounded by the well layer of the second conductivity type. A gate electrode is provided via an insulating film on the exposed part of the well layer to the one surface, and the source region and the exposed part of the well layer inside the source region to the one surface are commonly connected to the source region on the sides of the gate electrode. The other side of the drain layer is in contact with the drain electrode through a first conductivity type layer with a high impurity concentration and a second conductivity type layer with a high impurity concentration of 1 degree, so that the reverse breakdown voltage is on the drain ipi side. Determined by the high impurity concentration of the first conductivity type layer and the second conductivity type layer, the impurity of the first conductivity type layer is
7! The above objectives are achieved because the thickness and thickness can be adjusted.
第１図は本発明の一実施例を示し、第４図と共通の部分
には同一の符号が付されている。第４図と異なる点はＮ
−ドレイン層１にソースと反対側に同種の導電形で不純
物濃度の高いＮ′層９を形成し、その外側に逆の導電形
のＰ″層２が形成されている。この伝導度変調形ＭＯ５
ＦＥＴをソース１を極７がドレイン電極８に対して正で
ある逆方向電圧印加の際、一定電圧でブレークダウンさ
せるためには、このＮ゛層９不純物濃度および厚さを所
望のブレークダウン電圧に対応して定めればよい、
４００Ｖ程度の順方向耐電圧を得るのにはＮ一層１の不
純物濃度はＩＱ”ａｍ−’程度の値が必要であり、１０
〜５０Ｖの逆方向耐電圧を得るのには、Ｎ゛層９不純物
濃度は１０１ｔｈｅ１１−３程度の値が必要となる。
第３図に示す点火回路中のＭＯＳＦＥＴ２６に第１図に
示したＭＯＳＦＥＴを用いると、イグニションコイル２
２のＡ点がＢ点に対して正となる電圧が、ゲート電極６
にスレシュホールド電圧以上の電圧が加わるような値に
なったとき、このＭＯＳＦＥＴは導通状態となってコイ
ル２２に電流が流れる。Ａ点がさらにより高い電圧にな
ったときトランジスタ２３が導通してＭＯ５ＦＥＴ２６
はオフになり、Ａ点に３００■以上の高電圧が発生して
プラグ２４が点火する０次いでＢ点がＡ点より正の電位
になると、本発明による逆方向一定電圧ブレークダウン
効果により１０〜５０Ｖの電圧範囲でＮ“層９とＰ″７
１２の間にブレークダウンが起こり、ブリスパーク現象
または誤点火が口止され、良好なマグネートトランジス
タ点火システムを構成することケできる。このようなこ
とは、前にも述べたように第４図に示す伝導度変調形Ｍ
ＯＳ Ｆ ＥＴでは、この回路に必要な３００Ｖ以上の
順方向耐圧を持たせるようにＮ一層ｌの不純物４度と厚
さを設定したときに逆方向耐圧も大きくなって達成する
ことができない、こうして本発明によるＭＯＳ Ｆ Ｅ
Ｔを使用することによって、第２図に示したように主電
流制御にダーリントントランジスタ２１を使用した場合
のような逆方向電圧を低く抑えるための余分な回路部品
が必要でなくなる。
さらに、第４図に示した伝導度変調形ＭＯＳＦＥＴでは
ＮＰＮＰの４層構造が形成されるため、電流が大きくな
るとラッチング現象を起こし、ゲート信号により制御不
能になることがあるが、第１図に示した構造ではＮ一層
１のＰ″Ｎ２側にＮ゛層９形成したことにより、２４層
２からの正孔注入効率を下げる。ランチング現象を起こ
す条件であるところのソース電極 のＮ″ＰＮ−からの
電流増幅率α、とドレイン電極側のＰ’ Ｎ−Ｐからの
電流増幅率α８との和が１以上になることは、ドレイン
側のＰ” Ｎ’ Ｎ−Ｐ構成により電流増幅率α、が小
さくなることによって阻止でき、ラッチング現象が起こ
りにくくなる。
以上の説明ではＮチャネル伝導度変調形ＭＯＳＦＥＴに
ついて述べたが、ＰチャネルＭＯＳＦＥＴにおいても同
様に構成することができる。FIG. 1 shows an embodiment of the present invention, and parts common to those in FIG. 4 are given the same reference numerals. The difference from Figure 4 is N.
- An N' layer 9 of the same conductivity type and high impurity concentration is formed on the side opposite to the source in the drain layer 1, and a P'' layer 2 of the opposite conductivity type is formed outside of the N' layer 9.This conductivity modulation type MO5
In order to cause the FET to break down at a constant voltage when a reverse voltage is applied between the source 1 and the drain electrode 8, the impurity concentration and thickness of the N layer 9 must be adjusted to the desired breakdown voltage. It should be determined according to
In order to obtain a forward withstand voltage of about 400V, the impurity concentration of the N layer 1 needs to be about IQ"am-', and 10
In order to obtain a reverse withstand voltage of ~50V, the impurity concentration of the N layer 9 needs to be approximately 101the11-3. When the MOSFET shown in FIG. 1 is used as the MOSFET 26 in the ignition circuit shown in FIG. 3, the ignition coil 2
The voltage at which point A of 2 is positive with respect to point B is applied to the gate electrode 6.
When a voltage equal to or higher than the threshold voltage is applied to the MOSFET, the MOSFET becomes conductive and current flows through the coil 22. When the voltage at point A becomes even higher, the transistor 23 becomes conductive and the MO5FET 26
is turned off, and a high voltage of 300 mm or more is generated at point A, causing the plug 24 to ignite. Then, when point B becomes a more positive potential than point A, the reverse constant voltage breakdown effect of the present invention causes 10 to N" layer 9 and P" layer 7 in the voltage range of 50V
Breakdown occurs between 12 and 12, and the bliss-spark phenomenon or false ignition is suppressed, and a good magnet transistor ignition system can be constructed. As mentioned before, this kind of thing is caused by the conductivity modulation type M shown in Fig. 4.
In OS FET, when setting the impurity thickness of 4 degrees of N and 1 to give the forward breakdown voltage of 300V or more required for this circuit, the reverse breakdown voltage also increases and cannot be achieved. MOS F E according to the present invention
By using T, there is no need for extra circuit components for keeping the reverse voltage low, as in the case where the Darlington transistor 21 is used for main current control as shown in FIG. Furthermore, since the conductivity modulation type MOSFET shown in Fig. 4 has a four-layer structure of NPNP, a latching phenomenon may occur when the current becomes large, and it may become uncontrollable depending on the gate signal. In the structure shown, by forming the N layer 9 on the P''N2 side of the N layer 1, the hole injection efficiency from the 24 layer 2 is reduced. The fact that the sum of the current amplification factor α from P''N' N-P on the drain electrode side and the current amplification factor α8 from P' N-P on the drain electrode side becomes 1 or more means that the current amplification factor α can be prevented by reducing , and the latching phenomenon becomes less likely to occur.In the above explanation, an N-channel conductivity modulation type MOSFET has been described, but a P-channel MOSFET can also be configured in the same way.
【発明の効果】
本発明は、逆方向阻止能力を存する伝導度変調形Ｍ Ｏ
Ｓ Ｆ Ｅ Ｔのドレイン層とドレインＴ１橿側に設け
られる逆Ｒ電形のキャリア注入層の間にドレイン層と同
導電形で不純物濃度の高い層を挿入し、その心の不純物
ンｎ度および厚さを制御することにより逆方向の所定の
電圧でブレークダウンさせるもので、マグネト−トラン
ジスタ方式点火回路の主制御トランジスタに従来のダー
リントントランジスタに代わって使用すればプリスパー
ク現象または誤点火防止のための余分な回路が不要とな
り、信頼性の高い点火回路が経済的に得られるのでその
効果は極めて高い。[Effects of the Invention] The present invention provides a conductivity modulation type M O having reverse blocking ability.
A layer with the same conductivity type as the drain layer and high impurity concentration is inserted between the drain layer of S F E T and the carrier injection layer of reverse R type provided on the side of the drain T1, and the impurity density and By controlling the thickness, breakdown occurs at a predetermined voltage in the opposite direction, and when used in place of the conventional Darlington transistor as the main control transistor of a magneto-transistor type ignition circuit, it can prevent pre-spark phenomena or erroneous ignition. This eliminates the need for an extra circuit, and provides a highly reliable ignition circuit economically, which is extremely effective.
第１図は本発明の一実施例の要部断面図、第２図は従来
のマグネト−トランジスタ点火回路図、第３図は本発明
によるＭＯＳ Ｆ ＥＴを使用した場合のマグネト−ト
ランジスタ点火回路の回路図、第４図は伝導度変調形Ｍ
ＯＳ Ｆ ＥＴの要部断面図である。
１ニドレイン層、３：ウエル石、４：ソース領域、５：
絶帽Ｌ６：ゲートを漸。
・七゛庁又弄肘 山 口 ｙ７１、 、ノ
ー一ノ゛
６ｔｒ’−トｔｂｘ
し
第１図
第３図FIG. 1 is a sectional view of a main part of an embodiment of the present invention, FIG. 2 is a diagram of a conventional magneto-transistor ignition circuit, and FIG. 3 is a diagram of a magneto-transistor ignition circuit using a MOS FET according to the present invention. Circuit diagram, Figure 4 is conductivity modulation type M
FIG. 2 is a sectional view of a main part of an OS FET. 1 Nidrain layer, 3: Well stone, 4: Source region, 5:
Zetsuhat L6: Close the gate.・7゛Agency also play elbow Yamaguchi y71, No. 1 No. 6tr'-tbx Figure 1 Figure 3
Claims (1)
導電形のウェル層に囲まれた第一導電形のソース領域を
有し、ソース領域外方でのウェル層の前記一面への露出
部上に絶縁膜を介してゲート電極が設けられ、ゲート電
極の側方においてソース領域およびソース領域内方での
ウェル層の前記一面への露出部が共通にソース電極に接
触し、ドレイン層の他面側は高不純物濃度の第一導電形
層および高不純物濃度の第二導電形層を介してドレイン
電極に接触することを特徴とするＭＯＳ電界効果トラン
ジスタ。1) A source region of the first conductivity type surrounded by a well layer of the second conductivity type is provided in a part of the low impurity concentration drain layer of the first conductivity type; A gate electrode is provided on the exposed portion of the well layer through an insulating film, and on the side of the gate electrode, the source region and the exposed portion of the well layer inside the source region are in common contact with the source electrode, and the drain A MOS field effect transistor characterized in that the other side of the layer is in contact with a drain electrode via a first conductivity type layer with a high impurity concentration and a second conductivity type layer with a high impurity concentration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60249437A JPS62109366A (en) | 1985-11-07 | 1985-11-07 | Mos field effect transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60249437A JPS62109366A (en) | 1985-11-07 | 1985-11-07 | Mos field effect transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62109366A true JPS62109366A (en) | 1987-05-20 |
Family
ID=17192953
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60249437A Pending JPS62109366A (en) | 1985-11-07 | 1985-11-07 | Mos field effect transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62109366A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013088544A1 (en) * | 2011-12-15 | 2013-06-20 | 株式会社日立製作所 | Semiconductor device and power converting apparatus |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52132233A (en) * | 1976-04-28 | 1977-11-05 | Nippon Gakki Seizo Kk | Ignition apparatus |
| JPS56150870A (en) * | 1980-03-25 | 1981-11-21 | Rca Corp | Vertical mos-fet device |
| JPS5743461A (en) * | 1980-06-26 | 1982-03-11 | Siemens Ag | Controllable semiconductor switch |
-
1985
- 1985-11-07 JP JP60249437A patent/JPS62109366A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52132233A (en) * | 1976-04-28 | 1977-11-05 | Nippon Gakki Seizo Kk | Ignition apparatus |
| JPS56150870A (en) * | 1980-03-25 | 1981-11-21 | Rca Corp | Vertical mos-fet device |
| JPS5743461A (en) * | 1980-06-26 | 1982-03-11 | Siemens Ag | Controllable semiconductor switch |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013088544A1 (en) * | 2011-12-15 | 2013-06-20 | 株式会社日立製作所 | Semiconductor device and power converting apparatus |
| US9349847B2 (en) | 2011-12-15 | 2016-05-24 | Hitachi, Ltd. | Semiconductor device and power converter |
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