JPS619867U - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS619867U
JPS619867U JP9361984U JP9361984U JPS619867U JP S619867 U JPS619867 U JP S619867U JP 9361984 U JP9361984 U JP 9361984U JP 9361984 U JP9361984 U JP 9361984U JP S619867 U JPS619867 U JP S619867U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit device
hybrid integrated
insulating substrate
soldering parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9361984U
Other languages
Japanese (ja)
Inventor
盛大 土屋
康昌 太田
Original Assignee
日本電気アイシ−マイコンシステム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気アイシ−マイコンシステム株式会社 filed Critical 日本電気アイシ−マイコンシステム株式会社
Priority to JP9361984U priority Critical patent/JPS619867U/en
Publication of JPS619867U publication Critical patent/JPS619867U/en
Pending legal-status Critical Current

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Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図a, bt cは本考案の一実施例による混成
集積回路装置の基板の表面図及び2つの側面図、第2図
はその斜視図である。 第3図atbtCは従来の混成集積回路装置の基板の表
面図及び2つの側面図、第4図a, b, cは他の従
来の混成集積回路装置の表面図及び2つの側面図である
。 1・・・セラミック回路基板、2・・・半田付け部、3
・・・導体(配線)、4・・・端面スルーホール、5・
・・スルーホール、6・・・溝。
1a and btc are a top view and two side views of a substrate of a hybrid integrated circuit device according to an embodiment of the present invention, and FIG. 2 is a perspective view thereof. FIG. 3 atbtC is a front view and two side views of a substrate of a conventional hybrid integrated circuit device, and FIGS. 4 a, b, and c are a front view and two side views of another conventional hybrid integrated circuit device. 1... Ceramic circuit board, 2... Soldering part, 3
... Conductor (wiring), 4... End surface through hole, 5.
...Through hole, 6...groove.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板上に複数の半田付け部を有し、これら半田付け
部間の前記絶縁基板間には溝が形成されていることを特
徴とする混成集積回路装置。
1. A hybrid integrated circuit device comprising a plurality of soldering parts on an insulating substrate, and a groove is formed between the soldering parts on the insulating substrate.
JP9361984U 1984-06-22 1984-06-22 Hybrid integrated circuit device Pending JPS619867U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9361984U JPS619867U (en) 1984-06-22 1984-06-22 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9361984U JPS619867U (en) 1984-06-22 1984-06-22 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS619867U true JPS619867U (en) 1986-01-21

Family

ID=30651459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9361984U Pending JPS619867U (en) 1984-06-22 1984-06-22 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS619867U (en)

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