JPS6196822A - Signal switching circuit - Google Patents

Signal switching circuit

Info

Publication number
JPS6196822A
JPS6196822A JP21763684A JP21763684A JPS6196822A JP S6196822 A JPS6196822 A JP S6196822A JP 21763684 A JP21763684 A JP 21763684A JP 21763684 A JP21763684 A JP 21763684A JP S6196822 A JPS6196822 A JP S6196822A
Authority
JP
Japan
Prior art keywords
signal
switching
switching circuit
differential amplifier
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21763684A
Other languages
Japanese (ja)
Inventor
Hitoshi Udagawa
仁 宇田川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21763684A priority Critical patent/JPS6196822A/en
Publication of JPS6196822A publication Critical patent/JPS6196822A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/603Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors with coupled emitters

Landscapes

  • Studio Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To suppress a leakage signal of a switching signal incurring deterioration of picture quality by coupling the 2nd differential amplifier for signal switch to the 1st differential amplifier of a signal switching circuit, giving a signal current and a DC current to the former and giving a DC current brought into the non-signal state to the latter. CONSTITUTION:Trs Q1, Q2 constitute a switching differential amplifier to which a signal current source I1 and a DC current source I2 are connected, Trs Q3, Q4 constitute a switching differential amplifier to which a DC current source I3 is connected. Then figure (a) is a signal current waveform to be switched, a collector output waveform of the Trs Q1, Q4 when a switching signal shown in figure (b) to a terminal 12 is respectively shown in figures c, d and an output waveform of a switching signal reference DC voltage applying terminal 13 is shown in figure (e). That is, only a leakage signal of a switching signal generated by the signal switching circuit is generated by the signal switching circuit of the non-signal input, the signal obtained by the signal switching circuit and the leakage signal are inputted to differential amplifiers Trs 5, 6 of the next stage and only the leakage signal is eliminated by the function of common mode rejection.

Description

【発明の詳細な説明】 産業上の利用分野 この発明は映像信号の切替回路、とくに半導体集積回路
化に好適な映像信号切替回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a video signal switching circuit, and particularly to a video signal switching circuit suitable for semiconductor integrated circuit implementation.

従来例の構成とその問題点 映像信号の処理においては映像期間での映像信号の切替
時に、切替信号のリークによる画質の劣化を抑制するこ
とが要求される。ところで現在、一般的映像信号切替方
法としては映像信号を電流に変換し、切替信号に同期し
たトランジスタのオンオフ動作を用い切替を行っている
Conventional configuration and its problems In video signal processing, it is required to suppress deterioration of image quality due to leakage of switching signals when switching video signals in a video period. By the way, currently, as a general video signal switching method, a video signal is converted into a current, and switching is performed using an on/off operation of a transistor in synchronization with a switching signal.

第1図は従来の映像信号切替回路を示す図であり、1,
2は差動増幅器を構成するnpn形トランジスタであり
、互いに工ばツタは共通接続され、さらに電流源3に接
続されている。トランジスタ1.2のコレクタには各々
4,5の負荷抵抗が接続されており、負荷抵抗4,6の
他端は電圧源6に接続されている。7は切替信号入力端
子、8は切替信号用切替直流電圧印加端子、9,1oは
各々切替出力端子である。
FIG. 1 is a diagram showing a conventional video signal switching circuit.
Reference numeral 2 designates npn type transistors constituting a differential amplifier, which are commonly connected to each other and further connected to a current source 3. Load resistors 4 and 5 are connected to the collectors of the transistors 1 and 2, respectively, and the other ends of the load resistors 4 and 6 are connected to a voltage source 6. 7 is a switching signal input terminal, 8 is a switching signal switching DC voltage application terminal, and 9 and 1o are switching output terminals.

〜この信号切替回路は、第1図の破線で示したトランジ
スタ1のコレクタベース容量のため、第2図に示すOR
の等何回路に置き換えられ、第2図のCはトランジスタ
1のコレクタペース容量であり、Rはトランジスタ1の
コレクタに接続されて   ゛いる負荷抵抗である。第
2図のHの両端電圧をvo。
〜This signal switching circuit has an OR as shown in FIG. 2 due to the collector-base capacitance of transistor 1 shown by the broken line in FIG.
C in FIG. 2 is the collector space capacitance of transistor 1, and R is the load resistance connected to the collector of transistor 1. The voltage across H in FIG. 2 is vo.

信号電圧源をEiとす不と、入出力応答は次式に表この
ことから、第3図のaの切替信号を第1図の切替信号入
力端子7に入力し、トランジスタ′1゜2をオン・オフ
すると、出力端子9の出力信号は信号電流源3が無信号
状態の場合、式(1)に示すよう切替信号に対し微分特
性をもったリーク信号を含むbの波形になる。
Assuming that the signal voltage source is Ei, the input/output response is shown in the following equation.From this, the switching signal a in Fig. 3 is input to the switching signal input terminal 7 in Fig. 1, and the transistor '1゜2 is When turned on and off, when the signal current source 3 is in a no-signal state, the output signal of the output terminal 9 has a waveform b including a leak signal having differential characteristics with respect to the switching signal as shown in equation (1).

当然、このようなリーク信号が映像信号の映像期間に存
在すれば画質の劣化を招き、式(1)より切替信号の変
化、;レクタベース容量の変化、負荷抵抗値の変化の要
因でリーク信号が変化し画像の変化という不都合が生じ
る。
Naturally, if such a leak signal exists during the video period of the video signal, it will cause deterioration of the image quality, and from equation (1), the leak signal will be reduced due to factors such as changes in the switching signal, changes in the reflector base capacitance, and changes in the load resistance value. changes, causing the inconvenience of a change in the image.

発明の目的 この発明は上記の従来例で生じた欠点を排除すべくなさ
れたものであり、画質の劣化を招く切替信号のリーク信
号を抑圧することができ、かつ半導体集積化に好適な信
号切替回路を提供するものである。
Purpose of the Invention The present invention has been made in order to eliminate the drawbacks that occurred in the above-mentioned conventional example, and provides a signal switching method that can suppress leakage signals of switching signals that cause deterioration of image quality and is suitable for semiconductor integration. It provides a circuit.

発明の構成 本発明の構成は、信号の切替回路を形成する第1の差動
増幅器に対し、さらに別の信号切替用の第2の差動増幅
器を結合する。第1の差動増幅器に従来例同様に信号電
流及び直流電流を与え、第2の差動増幅器には無信号状
態にした直流電流のみを与える。このとき第1の差動増
幅器出力では切替信号とリーク信号、第2の差動増幅器
の出力ではリーク信号のみが得られ、これら切替信号と
リーク信号また同一極性のリーク信号を次段の差動増幅
器に入力することで次段の差動増幅器の出力は、リーク
信号が除去された切替信号のみを得ることができる。
Configuration of the Invention In the configuration of the present invention, a second differential amplifier for signal switching is further coupled to a first differential amplifier forming a signal switching circuit. A signal current and a direct current are applied to the first differential amplifier as in the conventional example, and only a direct current in a no-signal state is applied to the second differential amplifier. At this time, the switching signal and the leak signal are obtained at the output of the first differential amplifier, and only the leak signal is obtained at the output of the second differential amplifier. By inputting the signal into the amplifier, only the switching signal from which the leakage signal has been removed can be obtained as the output of the next-stage differential amplifier.

実施例の説明 以下第4図に示す実施例回路を参照してこの発明を説明
する。この信号切替回路において、トランジスタQ1.
Q2は信号電流源工7.直流電流源工2を各々エバツタ
に接続された切替用差動増幅器を構成し、トランジスタ
Q1.Q2Oコレクタニは負荷抵抗R,,R2が各々接
続され、負荷抵抗R9゜R2の他端は直流電圧源Vcc
に接続されている。トランジスタQ3 、Q4は直流電
流源工、を各々の共通エミッタに接続された切替用差動
増幅器を構成し、トランジスタQ3 、Q4のコレクタ
にハ負荷抵抗R3,R4が各々接続され、負荷抵抗R3
,R4の他端は直流電圧源Vcc K接続されている。
DESCRIPTION OF THE EMBODIMENTS The present invention will be described below with reference to the embodiment circuit shown in FIG. In this signal switching circuit, transistor Q1.
Q2 is the signal current source 7. Each DC current source 2 constitutes a switching differential amplifier connected to an evaporator, and transistors Q1 . The Q2O collector is connected to load resistors R, , R2, and the other end of the load resistor R9゜R2 is connected to the DC voltage source Vcc.
It is connected to the. Transistors Q3 and Q4 constitute a switching differential amplifier in which DC current sources are connected to their common emitters, and load resistors R3 and R4 are connected to the collectors of transistors Q3 and Q4, respectively.
, R4 is connected to a DC voltage source VccK.

またトランジスタQ’+Q’のコレクタ出力は、次段の
電流源工。をもつトランジスタQs 、Qeで構成され
た差動増幅器に入力され、トランジスタQ1(7)コレ
クタはトランジスタQ5のベース、トランジスタQ4の
コレクタはトランジスタQaのベースに接続され、トラ
ンジスタQ6のコレクタは負荷抵抗R6を通って接地さ
れ、トランジスタQ6のコレクタは接地されている。
Also, the collector output of transistor Q'+Q' is the current source of the next stage. The collector of transistor Q1 (7) is connected to the base of transistor Q5, the collector of transistor Q4 is connected to the base of transistor Qa, and the collector of transistor Q6 is connected to a load resistor R6. The collector of transistor Q6 is grounded.

端子12は切替信号入力端子、端子11は切替信号用基
準直流電圧印加端子、端子13は出力端子である。また
、第5図は第4図の信号切替回路の各端子及び接続点の
波形であり、aは切替ようとする信号電流波形であり、
bの切替信号を端子12に入力したときのトランジスタ
Q1のコレクタ、トランジスタQ4のコレクタ出力波形
は各々c、dとなり、端子13の出力波形はeの出力波
形となる。すなわち信号切替回路で発生する切替信号の
リーク信号のみを無信号入力の信号切替回路で発生し、
信号切替回路で得られた信号とリーク信号とを次段の差
動増幅器に入力し、同相除去の機能からリーク信号のみ
が除去されることになる。
Terminal 12 is a switching signal input terminal, terminal 11 is a switching signal reference DC voltage application terminal, and terminal 13 is an output terminal. Moreover, FIG. 5 shows the waveforms of each terminal and connection point of the signal switching circuit of FIG. 4, and a is the signal current waveform to be switched,
When the switching signal b is input to the terminal 12, the output waveforms of the collector of the transistor Q1 and the collector of the transistor Q4 are c and d, respectively, and the output waveform of the terminal 13 is the output waveform of e. In other words, only the leak signal of the switching signal generated in the signal switching circuit is generated in the signal switching circuit with no signal input,
The signal obtained by the signal switching circuit and the leak signal are input to the next stage differential amplifier, and only the leak signal is removed by the common mode removal function.

この発明によれば切替信号の大きさによりリーク信号が
式(1)で示すように影響されることなく次段の差動増
幅器で除去可能となる。
According to the present invention, the leakage signal can be removed by the next stage differential amplifier without being affected by the magnitude of the switching signal as shown in equation (1).

発明の効果 以上の説明から明らかなように、この発明の信号切替回
路においては、切替信号のリーク信号発生回路を設は映
像信号の切替時の切替信号のリーク信号を次段の差動増
幅器で同相除去して映像期間での影響をなくシ、従来例
で生じた不都合はことごとく排除される。またこの発明
は信号切替回路に同一特性をもつ差動増幅器を追加した
ものであるだめ、回路の半導体集積回路化に好適な信号
切替回路を得ることができる。
Effects of the Invention As is clear from the above explanation, in the signal switching circuit of the present invention, a switching signal leakage signal generation circuit is provided to generate a leakage signal of the switching signal when switching the video signal by using the next stage differential amplifier. By removing the common phase and eliminating the influence on the video period, all the inconveniences that occurred in the conventional example are eliminated. Furthermore, since the present invention adds a differential amplifier having the same characteristics to the signal switching circuit, it is possible to obtain a signal switching circuit suitable for semiconductor integrated circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の信号切替回路図、第2図は切替信号回
路部の等価回路図、第3図は第2図示等価回路図の入出
力波形を示す図、第4図はこの発明の一実施例の信号切
替回路図、第5図は第4図の回路での実施例の信号波形
図である。 Q1〜Q6・・・・・・トランジスタ、R1−R6・・
・・・・抵抗、■、〜工、・・・・・・電流源、11・
・・・・・信号切替用基準直流電圧印加端子、12・・
・・・・切替信号入力端子、13・・・・・・出力端子
。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図 第3図 (b)ニー、−
Fig. 1 is a signal switching circuit diagram of the conventional example, Fig. 2 is an equivalent circuit diagram of the switching signal circuit section, Fig. 3 is a diagram showing input/output waveforms of the equivalent circuit diagram shown in Fig. 2, and Fig. 4 is a diagram of the present invention. FIG. 5 is a signal switching circuit diagram of an embodiment. FIG. 5 is a signal waveform diagram of an embodiment of the circuit of FIG. Q1-Q6...Transistor, R1-R6...
...Resistance, ■, ...Current source, 11.
...Reference DC voltage application terminal for signal switching, 12...
...Switching signal input terminal, 13...Output terminal. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
Figure 2 Figure 3 (b) Knee, -

Claims (1)

【特許請求の範囲】[Claims] (1)信号電流と直流電流の合成された信号電流の切替
回路でこの切替回路出力と直流電流のみの同一形式切替
回路での切替回路出力とをそれぞれ入力する差動増幅器
をそなえた信号切替回路。
(1) A signal switching circuit equipped with a differential amplifier that inputs the switching circuit output of a signal current that is a combination of signal current and DC current, and the switching circuit output of a switching circuit of the same type that only uses DC current. .
JP21763684A 1984-10-17 1984-10-17 Signal switching circuit Pending JPS6196822A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21763684A JPS6196822A (en) 1984-10-17 1984-10-17 Signal switching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21763684A JPS6196822A (en) 1984-10-17 1984-10-17 Signal switching circuit

Publications (1)

Publication Number Publication Date
JPS6196822A true JPS6196822A (en) 1986-05-15

Family

ID=16707368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21763684A Pending JPS6196822A (en) 1984-10-17 1984-10-17 Signal switching circuit

Country Status (1)

Country Link
JP (1) JPS6196822A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5115151A (en) * 1990-06-08 1992-05-19 Western Digital Corporation Triple comparator circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5115151A (en) * 1990-06-08 1992-05-19 Western Digital Corporation Triple comparator circuit

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