JPS6187398A - Manufacture of multilayer printed circuit board - Google Patents
Manufacture of multilayer printed circuit boardInfo
- Publication number
- JPS6187398A JPS6187398A JP20815284A JP20815284A JPS6187398A JP S6187398 A JPS6187398 A JP S6187398A JP 20815284 A JP20815284 A JP 20815284A JP 20815284 A JP20815284 A JP 20815284A JP S6187398 A JPS6187398 A JP S6187398A
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- multilayer printed
- circuit board
- insulating layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は多層プリント回路板の天道方法に係シ、特に導
体１Ｍ数が比較的多り多層プリント回路板を経済的に製
造するのに好適な、多層プリント回路板の製造方法に関
する。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a Tendo method for manufacturing multilayer printed circuit boards, and in particular, the present invention relates to a Tendo method for manufacturing multilayer printed circuit boards, and in particular, a method suitable for manufacturing multilayer printed circuit boards economically since the number of conductors 1M is relatively large. , relates to a method for manufacturing multilayer printed circuit boards.
〔発明の背景」
従来より計算機、通信機等の産業用電子機器には、部品
搭載と部品間の高￥！ｆ！度配線を効率よく行なうため
、多層プリント回路板が使用されている。[Background of the Invention] Traditionally, industrial electronic equipment such as computers and communication equipment has been burdened with mounting parts and high costs between parts! f! Multilayer printed circuit boards are used for efficient wiring.
通常使用されている多層プリント回路板の製造はつぎの
工程によって行なわれていた。予め内層パタンを形成し
た内層プリント板と外層ｙリント板との各層の間にプリ
プレグを挾んで積層プレスによシ一体化した後、各層の
ランドを貫通してスルホール孔をあけ、孔内に銅めっき
を施して各層を接続する。The production of commonly used multilayer printed circuit boards has been carried out by the following steps. After sandwiching the prepreg between each layer of the inner layer printed board and the outer layer Y-lint board, on which the inner layer pattern has been formed in advance, and integrating them using a lamination press, through holes are drilled through the lands of each layer, and copper is inserted into the holes. Plating is applied to connect each layer.
このような多層プリント板の剣法では、積層プレスの際
に内層ランド位置にばらつきが生じ、貫通孔が正しく内
層ランドの中心を通らない問題があった。このような当
業者には周知の問題は、多層プリント回路板の層数が増
すと、特に４層を越えると著しく大きくなる傾向を有し
ている。In this method of manufacturing multilayer printed boards, there is a problem that variations occur in the positions of the inner layer lands during lamination pressing, and the through holes do not pass through the center of the inner layer lands correctly. These problems, which are well known to those skilled in the art, tend to become more pronounced as the number of layers in a multilayer printed circuit board increases, particularly as the number of layers increases, especially beyond four layers.
３乃至４層の比較的層数の少ない上記の多層プリント回
路板では上記の問題が比較的少ないため、マスラミネー
ション方式と称して、両面スルホール基板と同様の手軽
さで多層板を製造するのが一般化している。この方式は
例えば「電子材料」第２２巻第１０号（昭和５８年）第
７７頁からＭＢ２頁までに掲載された納富、藤平、藤森
著「内層回路入シ多層鋼張積層板」と題する論文に記載
されている。The above-mentioned multilayer printed circuit boards, which have a relatively small number of layers (3 to 4 layers), have relatively few problems, so it is called the mass lamination method, and it is possible to manufacture multilayer boards with the same ease as double-sided through-hole boards. It's becoming common. This method is described, for example, in a paper titled "Multilayer steel-clad laminates with inner layer circuits" by Notomi, Fujihira, and Fujimori published in "Electronic Materials" Vol. 22, No. 10 (1981), pages 77 to MB 2. It is described in.
上記のように積層プレスを用いずに多層プリント回路板
を製造するには、片面もしくは両面に回路を形成したプ
リント基板の回路上に絶縁層を設け、絶縁層上にフルア
ディティブ方式で回路を形成して多層化することができ
る。このような方法の一例は、特公昭５２−８５０４号
に示されているように、バタン形成した片面鋼張積層板
の一部に絶縁層を被着形成し、絶縁層上に化学鋼めっき
に触媒活性なメッキ用インクを用いてバタンを形成し、
その後化学鋼めっきで絶縁層上に導体回路を形成するも
のである。同様の方式で両面基板を用いて多層化する例
が特公昭４９−２５９８１号および５５−１０１６０号
に示されている。上記の例では両面鋼張積層板を出発材
料に用いても、高々４層回路板を製造できるのみである
。例え上記の方法で４層回路を形成し、さらに絶縁層を
介して配線を行なおうとしても、上記の例中には認識さ
れていないつぎのような問題が生じるため、著しく困難
となる。To manufacture a multilayer printed circuit board without using a lamination press as described above, an insulating layer is provided on the circuit of a printed circuit board with circuits formed on one or both sides, and the circuit is formed on the insulating layer using a fully additive method. It can be multi-layered. An example of such a method is as shown in Japanese Patent Publication No. 52-8504, in which an insulating layer is formed on a part of a single-sided steel clad laminate that has been formed with a batten, and chemical steel plating is applied on the insulating layer. Forming a baton using a catalytically active plating ink,
A conductor circuit is then formed on the insulating layer by chemical steel plating. Examples of multilayering using a double-sided substrate in a similar manner are shown in Japanese Patent Publication Nos. 49-25981 and 55-10160. In the above example, even if a double-sided steel clad laminate is used as the starting material, a four-layer circuit board can only be manufactured at most. Even if a four-layer circuit is formed by the method described above and wiring is further performed through an insulating layer, it will be extremely difficult due to the following problems not recognized in the above example.
すなわち、配線層数に比例して化学銅めっき回数が増え
るために経済的に著しく不利となるのに加え、上記例に
は全く示されていない、めっき中に回路と絶縁材料との
密着力が低下し剥離してしまう問題が解決できないこと
である。通常の回路には銅が用いられ、絶縁材料にはエ
ポキシ等の耐熱性のよい熱硬化性樹脂が用いられる。こ
のような場合、銅回路と絶縁材料との密着力は塗布、硬
化時には著しく大であるが、化学銅めっき中に密着力は
低下し、極端な場合剥離にまで至る。これは回路形成用
の厚付は化学銅めっきでは量常７０°Ｃ１ｐＨ１２，２
０ｈ程度の有機材料にとって激しい環境に曝されるのに
加え、銅析出反応に伴う電気化学ポテンシャルの影響が
、銅と絶縁材料の接着界面にまで及び、接着部の結合を
切断してしまうためと推定されている。In other words, in addition to being economically disadvantageous because the number of chemical copper plating increases in proportion to the number of wiring layers, the adhesion between the circuit and the insulating material during plating increases, which is not shown at all in the above example. The problem of deterioration and peeling cannot be solved. Copper is usually used for circuits, and thermosetting resin with good heat resistance, such as epoxy, is used as an insulating material. In such cases, although the adhesion between the copper circuit and the insulating material is extremely high during coating and curing, the adhesion decreases during chemical copper plating, leading to peeling in extreme cases. This is the case for thick chemical copper plating for circuit formation, which is normally 70°C, pH 12,2
In addition to being exposed to a harsh environment for organic materials at about 0 h, the influence of the electrochemical potential associated with the copper precipitation reaction extends to the bonding interface between the copper and the insulating material, breaking the bond at the bond. Estimated.
したがって、銅張積層板の回路上に化学銅めっきで回路
を形成する、以上記載された例の方式は、めっき中の密
着力確保の問題を解決しないかぎシ、実用性にとぼしい
製造法といわなければならない。Therefore, the method described above, in which a circuit is formed by chemical copper plating on the circuit of a copper-clad laminate, is a manufacturing method that does not solve the problem of ensuring adhesion during plating and is of little practical use. There must be.
さらに、フルアディティブ方式を操シ返して層数を増す
には、化学鋼めっきを操）返すので、累積した（ヒ学銅
めっき時間に耐える絶縁材料が必要となシ、製造上の困
難は著しく大きくなってしまう。Furthermore, in order to increase the number of layers by reversing the fully additive method, chemical steel plating is required, which requires an insulating material that can withstand the cumulative copper plating time, which poses significant manufacturing difficulties. It gets bigger.
〔発明の目的Ｊ
本発明の目的は、これまでの多層プリント回路板の製造
法では解決できなかった上記の問題点を解決し、容易か
つ経済的に多層プリント回路板を供給することができる
、新規な多層プリント回路板の製造方法を提供すること
にある。[Object of the Invention J The object of the present invention is to solve the above-mentioned problems that could not be solved by conventional methods of manufacturing multilayer printed circuit boards, and to easily and economically supply multilayer printed circuit boards. An object of the present invention is to provide a novel method for manufacturing a multilayer printed circuit board.
〔発明の概要）
上記目的を解決するために、本発明者は、従来技術の優
れた点のみを用いた全く新しい製造方法によシ谷易に多
層プリント回路板を製造できることを見出した。すなわ
ち、従来の積層プレスとグリプレグを用いて多数の回路
板を一体化した後、スルホール加工を行なう方式では、
内層の位置ずれの問題はあるにしても、４層程度までは
比較的容易【多層板を製造できる。また、形成した回路
上にフルアディティブ方式で絶縁層を介してパタンを形
成して多層化する方式でも、数層のバタン形成は実用性
がある。そこで、これらの方式の長所のみを採シ入れる
ことで、すなわち、積層プレス方式で内層と外層を一体
化した多層プリント回路板の外層バタンを形成した後、
絶縁層を介してさらに化学銅めっきでバタン形成を行な
うこ七によシ、製造上の大な困難を伴なわずに、経済的
に多層プリント回路板を得ることができる。このような
新規な方式で多層プリント回路板を製造するには、回路
銅箔上に絶縁層を設けた状態で化学銅めっき液に浸漬す
るため、化学鋼めっき条件に耐え、）銅箔と、！８８部
間の剥離等を生じない材料を用いるのが良い。このよう
な材料としては、エポキシ樹脂を主剤とし、グアニジン
もしくはその誘導体もしくはその変性物を硬化剤に用い
た熱硬化性樹脂が好ましい。主剤と硬化剤の配合比は、
材料と銅箔との密着力が最大となるように選ばれ、実際
には主剤１００重量部に対し硬化剤２０〜８０部となる
。さらに好ましくは、（ａ）エポキシ樹脂を主剤とし、
（ｂ）１−０−トリルビグアニド変成物が硬化剤として
用いられる。[Summary of the Invention] In order to solve the above object, the present inventor has discovered that a multilayer printed circuit board can be easily manufactured by a completely new manufacturing method using only the advantages of the prior art. In other words, in the conventional method of integrating multiple circuit boards using a laminated press and Gripreg, and then performing through-hole processing,
Although there is the problem of misalignment of the inner layers, it is relatively easy to manufacture multilayer boards with up to about four layers. Furthermore, even in a method in which a pattern is formed on a formed circuit via an insulating layer in a fully additive manner to form a multilayer pattern, it is practical to form a pattern in several layers. Therefore, by incorporating only the advantages of these methods, in other words, after forming the outer layer button of a multilayer printed circuit board that integrates the inner layer and outer layer using the lamination press method,
By further forming the batten by chemical copper plating via an insulating layer, a multilayer printed circuit board can be obtained economically without any great difficulty in manufacturing. In order to manufacture multilayer printed circuit boards using this new method, the circuit copper foil is immersed in a chemical copper plating solution with an insulating layer provided on it, so it can withstand chemical steel plating conditions. ! It is preferable to use a material that does not cause peeling between the 88 parts. As such a material, a thermosetting resin containing an epoxy resin as a main ingredient and using guanidine, a derivative thereof, or a modified product thereof as a curing agent is preferable. The compounding ratio of the main agent and curing agent is
The curing agent is selected so as to maximize the adhesion between the material and the copper foil, and in reality, the amount of curing agent is 20 to 80 parts by weight based on 100 parts by weight of the main agent. More preferably, (a) an epoxy resin is used as the main ingredient;
(b) A modified 1-0-tolyl biguanide is used as a curing agent.
不発ＢＪＪ （Ｃよる方法で用いられる上記（ａ）のエ
ポキシ樹脂としては、平均して１分子当９２個以上のエ
ポキシ基を有する化合物で、例えばビスフェノールＡ１
ハロゲン化ビスフェノール人１カテコール、レゾルシノ
ールなどのような多価フェノール、またはグリセリンの
ような多価アルコールとエピクロルヒドリンとを塩基性
触媒の存在下で反応させて得らｎるポリグリシジルエー
テルあるいはポリグリシジルエステル、さらに、ノボラ
ック型フェノール樹脂とエピクロルヒドリンとを縮合さ
せて得られるエポキシノボラック、さらには過酸化法で
エポキシ化したエポキシ化ポリオレフィン、エポキシ化
ポリブタジェン、ジシクロペンタジェン化オキサイド、
あるいはエポキシ化植物油などである。The epoxy resin (a) used in the method according to unexploded BJJ (C) is a compound having an average of 92 or more epoxy groups per molecule, such as bisphenol A1.
halogenated bisphenol polyglycidyl ether or polyglycidyl ester obtained by reacting a polyhydric phenol such as catechol, resorcinol, etc., or a polyhydric alcohol such as glycerin with epichlorohydrin in the presence of a basic catalyst, Furthermore, epoxy novolak obtained by condensing a novolak type phenol resin and epichlorohydrin, furthermore, epoxidized polyolefin epoxidized by a peroxidation method, epoxidized polybutadiene, dicyclopentadienated oxide,
Alternatively, it may be epoxidized vegetable oil.
本発明による方法で用いられる上記（ｂ）の１−〇−１
−！ｊルビグアニド変性物としては、１−０−トリルビ
グアニドと適量のエポキシド化合物およびｎ−プチルセ
ロンルプ等の有機溶剤を混合攪拌することにより得られ
る。1-0-1 of the above (b) used in the method according to the present invention
-! The modified J-rubiguanide can be obtained by mixing and stirring 1-0-tolylbiguanide, an appropriate amount of an epoxide compound, and an organic solvent such as n-butylseronulp.
１−０−）リルビグアニド変性物でエポキシ樹脂を硬化
させると、化学銅めっき中に銅箔との剥離が生じない層
間材料を得ることができる。このような材料を印刷塗布
するには当業者ｌζ周知の方法で印刷インクに適した粘
度に調整することも可能であシ、そのために通常用いら
れる（ｃ）無機充填剤、（ｄ）粘度調整用謡変剤、（θ
）消泡剤、（ｆ）有機溶剤のような成分を加えてもよい
。1-0-) By curing the epoxy resin with a modified rilbiguanide, it is possible to obtain an interlayer material that does not peel off from the copper foil during chemical copper plating. In order to print and apply such materials, it is possible to adjust the viscosity to a suitable value for printing ink by a method well known to those skilled in the art, and for this purpose, (c) an inorganic filler and (d) viscosity adjustment are usually used. Phrase change agent, (θ
Components such as a) antifoaming agents and (f) organic solvents may also be added.
本発明による方法で用いられる前記（Ｑ）の充填剤とし
ては、メルク、マイカ、アルミナ、硫酸バリウム、５ｉ
ｎ２． ＴｉＯ２などの無機微粉末がある。The filler (Q) used in the method according to the present invention includes Merck, mica, alumina, barium sulfate, 5i
n2. There are inorganic fine powders such as TiO2.
このような微粉末を前記（ａ）のエポキシ樹脂１００重
量部に対し３〜４０重量部添加することが好ましい。４
０部以上刃Ｕえると、塗膜形Ｆｉｌ ＨＥが悪く、３部
よシ少ないと特性同上効果が小さい。It is preferable to add 3 to 40 parts by weight of such fine powder to 100 parts by weight of the epoxy resin (a). 4
If the blade is more than 0 parts, the coating film type FIL HE will be bad, and if it is less than 3 parts, the effect of the same characteristics as above will be small.
本発明による方法で用いられる前記（ｃｌ）の揺変剤と
しては、５ｉ０２などの無機質の超微粉末を適宜添加す
ればよい。As the thixotropic agent (cl) used in the method according to the present invention, ultrafine inorganic powder such as 5i02 may be appropriately added.
本発明による方法で用いられる前記（ｅ）の消泡剤とし
ては、シリコーンオイルなどが用いられ、前記（ｆ）の
有機溶剤としてはカルピトール、七ロ ′メルク等の溶
剤を用いることができる。As the antifoaming agent (e) used in the method of the present invention, silicone oil etc. can be used, and as the organic solvent (f), solvents such as Calpitol and Shichiro'Merck can be used.
以下本発明を実施例を用いて一層詳しく説明する。 The present invention will be explained in more detail below using examples.
実施例１
当業者に周知の方法で、積層プレス方式の多層プリント
回路板を用意する。Ｍ１図（Ａ）は４層プリント回路板
の断面図で、そのプリント回路板１は、通常用いられる
ように、最外層に銅箔２．および２２、内層には電源お
よび接地層それぞれ３１および３２を有し、プリプレグ
を用いて積層プレスで一体化されたものである。このよ
うな多層プリント回路板は、プレスを用いて積層するこ
ともできるし、市販品を購入することも可能である。こ
の多層プリント回路板に孔あけ加工（第１図（Ｂ））し
てスルホール４．および４２を設け、ついで当業者に周
知の方法で最外層鋼箔２．および２２をエツチングして
、回路５およびランド６を形成する＋ＣＩ。Example 1 A laminated press multilayer printed circuit board is prepared in a manner well known to those skilled in the art. FIG. M1 (A) is a cross-sectional view of a four-layer printed circuit board, and the printed circuit board 1 has copper foil 2. and 22, the inner layer has power supply and ground layers 31 and 32, respectively, which are integrated by lamination press using prepreg. Such a multilayer printed circuit board can be laminated using a press or can be purchased commercially. This multilayer printed circuit board is drilled (Fig. 1 (B)) to form through holes 4. and 42, and then the outermost steel foil 2. and 22 to form circuit 5 and land 6 +CI.
つぎにランド部６を除いて絶縁層７を塗布する（Ｄ＋。Next, an insulating layer 7 is applied except for the land portion 6 (D+).
また、この絶縁層７を回路５上に塗布しない部分８を設
ければ、絶縁層上の回路と接続された所謂ビアホールと
することもできる。Further, by providing a portion 8 on which the insulating layer 7 is not coated on the circuit 5, a so-called via hole connected to the circuit on the insulating layer can be formed.
絶縁層７は回路銅箔５上に設けられるので、後の化学銅
めっきに十分耐える必要がある。さらに、基板の半田付
は作業等の高温にも耐え、回路５との密着力が低下しな
い必要がある。このため、本発明では、耐熱性のよいエ
ポキシ樹脂をベースに、銅箔との密着性のよい硬化剤を
用いた、つぎのような樹脂組成分を用いた。Since the insulating layer 7 is provided on the circuit copper foil 5, it needs to be sufficiently resistant to subsequent chemical copper plating. Furthermore, the soldering of the board must be able to withstand high temperatures during work, and the adhesion to the circuit 5 must not deteriorate. Therefore, in the present invention, the following resin composition was used, which is based on an epoxy resin with good heat resistance and uses a curing agent with good adhesion to copper foil.
（ａ）エポキシノボラック樹脂−−−−−１００重量部
（ｂ）ｉ−ｏ−トリルビグアニドのビスフェノールＡジ
グリシジルエーテル変性物−５０ｆｌ−Ｋ（５（ｃ）ア
ルミナ粉末−−−−−−−−−−−−−−−−２０重量
部（ｄ）揺変剤−−−−−−−−−−−−−−−−−−
−−−−−５重量部（ｅ）消泡剤−−−−−−−−−−
−−−−−−−−−−一−−２重量部（ｆ） ｎ−プチ
ルセロンルプー−−−−−−１０Ｍ置部上記組成物を混
練し、当業者だ周知のスクリーン印刷法で印刷し、熱硬
化により絶縁層とする。(a) Epoxy novolac resin --- 100 parts by weight (b) Bisphenol A diglycidyl ether modified product of io-tolyl biguanide - 50 fl-K (5 (c) Alumina powder --- ----------20 parts by weight (d) Thixotropic agent----------------------
------5 parts by weight (e) Antifoaming agent-------
---------1--2 parts by weight (f) n-butylceronlepoux---10M parts The above composition was kneaded and printed by a screen printing method well known to those skilled in the art. Then, it is made into an insulating layer by thermosetting.
つぎにＰ、散層上に回路を設ける前処理として、絶縁層
を自業者に周知の方法で粗面化し、化学銅めっきの触媒
を全面に付着させる。ついで絶ＲＮ上の回路、ランド部
以外をめっきレジスト９でカバーする（Ｅ） 、、この
めっきレジスト９はｍ箔上に設けるものではないため、
化学銅めっきに溶解しない材料であればよく、むろん絶
縁層７と同じ材料でもよい、、ｉｋ終工程で基板を化学
鋼めっき液中に浸漬して、スルホール孔壁最外層回路、
およびランド部に化学銅めっきを析出させる（Ｆ）。こ
の際、前述したビアホール部８で眉間接続も同時に可能
となる。化学鋼めっき液には、っぎの組成のものを用い
た。Next, as a pretreatment for forming a circuit on the P dispersed layer, the surface of the insulating layer is roughened by a method well known to those skilled in the art, and a catalyst for chemical copper plating is deposited on the entire surface. Next, cover the circuit on the RN with a plating resist 9 other than the land portion (E). Since this plating resist 9 is not provided on the m foil,
Any material may be used as long as it does not dissolve in chemical copper plating, and of course it may be the same material as the insulating layer 7.In the final step, the board is immersed in a chemical steel plating solution, and the through-hole wall outermost layer circuit,
And chemical copper plating is deposited on the land portion (F). At this time, the glabella connection can be made at the same time using the via hole portion 8 mentioned above. A chemical steel plating solution with the following composition was used.
ＣｕＳＯ４−５Ｈ２Ｏ１５ｇ ＢＤＴＡ ２Ｎａ ４５ｇ ＮａＯＨｐＨを１２．３とする量 ３７係ホルマリン ３ｍｉ。CuSO4-5H2O15g BDTA 2Na 45g Amount to adjust NaOH pH to 12.3 Section 37 Formalin 3mi.
α、α′−ジピリジル ５０ｍｇ
界面活性剤 １００ｍｇ
水 １１とする量
このようにして製造された多層プリント回路板は、当業
者に周知のンルダレジスト、文字印刷を行ない、外形加
工をすれば與品となる。α,α'-Dipyridyl 50mg Surfactant 100mg Water 11. The multilayer printed circuit board thus produced can be made into a finished product by applying a layer resist, character printing, and external processing as well known to those skilled in the art. .
本発明は、ｆＲ層プレスで一体化された４層プリント回
路板上にフルアディティブ方式で回路形成を行うことに
よシ、１回の化学銅めっきで６層まで形成することかで
きた。４層板外層銅箔２．および２２のエツチング加工
および、絶縁層７、めっきレジスト９の加工には、基板
周辺の基準マークおよび基準孔を用すて位置合せを行な
うから、各層間の位置ズレがなく、容易に６層板を製造
できることがわかった。In the present invention, by performing circuit formation in a fully additive manner on a four-layer printed circuit board integrated by fR layer pressing, it was possible to form up to six layers with one chemical copper plating. 4-layer board outer layer copper foil 2. For the etching processing of 22 and 22, and the processing of the insulating layer 7 and plating resist 9, alignment is performed using reference marks and reference holes around the substrate, so there is no misalignment between each layer, and the 6-layer board can be easily assembled. It was found that it is possible to produce
積層プレス方式で６層板を製造するのに問題となる層間
の位置ずれは、本発明では４層板を使用いるために問題
とならなかった。The misalignment between layers, which is a problem when manufacturing a six-layer board using a lamination press method, does not pose a problem because a four-layer board is used in the present invention.
本発明による方法は、ｆＡ層プレス方式で一体化された
多層ズリント回路板の最外層に、絶縁層を介してフルア
ディティブ方式で回路形成を行なうものであるため、プ
リント板製造に際して、上述した例にとどまらず、任意
の組合せが可能となる。The method according to the present invention forms a circuit in a fully additive manner via an insulating layer on the outermost layer of a multilayer Zlint circuit board integrated by an fA layer press method, so that it is possible to form a circuit in a fully additive manner through an insulating layer. Any combination is possible.
すなわち積層プレス方式で歩留シよく製造できる多層板
を基に最外層加工を行なえば良く、さらに最外層加工も
位置合せ精度等に支障をきたさない限シ、任意の回数繰
）返すこともできることがわかった。In other words, it is sufficient to process the outermost layer based on a multilayer board that can be manufactured with a high yield using a laminated press method, and furthermore, the outermost layer processing can be repeated an arbitrary number of times as long as it does not impede alignment accuracy, etc. I understand.
最も効率良く多層プリント回路板を製造すめには、積層
プレス方式で歩留シ良く製造できる最大層数の多層プリ
ント回路板を基に、フルアディティブ方式で形成できる
実用的な最大の層数の組合せを選択すれば良いこともわ
かった。In order to manufacture multilayer printed circuit boards most efficiently, it is necessary to combine the maximum number of layers that can be practically formed using a fully additive method, based on the multilayer printed circuit board that can be manufactured with the maximum number of layers with a high yield using the lamination press method. I also found out that I should choose .
実施例２
以下に、本発明の眉間絶縁材料の非常に優れた耐めっき
性を利用して、両面銅張積層板を利用して多ｊθ板を製
造した例を示す。Example 2 Below, an example will be shown in which a multi-jθ board was manufactured using a double-sided copper-clad laminate by taking advantage of the excellent plating resistance of the glabellar insulating material of the present invention.
第２図ｒＡ）に示す基材１の両面に銅箔２Ｉおよび２２
を積層した両面鋼張積層板を用いて多層板を製造した。Copper foils 2I and 22 are coated on both sides of the base material 1 shown in Figure 2 rA).
A multilayer board was manufactured using double-sided steel-clad laminates.
基板１にドリルでスルホール４をあけ（Ｂ）た後、実施
例１と同様の方法で回路を形成（Ｃ）し、ついで実施例
１と同じ層間絶縁層７を設けた（Ｄ）。このときビアホ
ール部８は後の化学銅めっき工程で層間接続を行なうた
め、絶縁材料を塗布しなかった。ついで絶縁層７上に化
学銅めっきの触媒を付着させた後、回路およびランド部
以外をめっきレジスト９でカバーした（Ｅ）、、このレ
ジストには前例と同様に絶縁層７と同じ材料を用いた。After drilling a through hole 4 in the substrate 1 (B), a circuit was formed in the same manner as in Example 1 (C), and then the same interlayer insulating layer 7 as in Example 1 was provided (D). At this time, no insulating material was applied to the via hole portion 8 because interlayer connection would be made in a later chemical copper plating process. Next, after depositing a catalyst for chemical copper plating on the insulating layer 7, areas other than the circuit and land areas were covered with a plating resist 9 (E). As in the previous example, the same material as the insulating layer 7 was used for this resist. there was.
最後に、実施例１と同じ方法で化学銅めっき１０を施し
、最外層回路形成とスルホールおよびビアホールの接続
を行なった、
以上の方法によシ化学銅めっ亨１回で４層回路基板を得
ることができた。積層プレスは、銅箔を張シ付ける工程
に必要があるが、市販品を購入すればプレス設備を必要
としないこともわかった。Finally, chemical copper plating 10 was applied in the same manner as in Example 1 to form the outermost layer circuit and connect through-holes and via-holes. Using the above method, a 4-layer circuit board was fabricated with one chemical copper plating. I was able to get it. Although a lamination press is necessary for the process of applying copper foil, it was also found that if you purchase a commercially available product, you do not need press equipment.
上記の製造方法によれば、およそ２０時間の化学鋼めっ
きによって、銅箔回路と層間絶縁材料との密着力は低下
せず、その後のはんだ付（２６０た１０秒）によっても
剥離、膨れ等の異常は発生しなかった。According to the above manufacturing method, the adhesion between the copper foil circuit and the interlayer insulation material does not deteriorate after approximately 20 hours of chemical steel plating, and the subsequent soldering (260°C for 10 seconds) does not cause peeling, blistering, etc. No abnormality occurred.
以上説明した通シ、本発明によれば、積層プレス方式で
多層板を製造するのに最大の問題であった内層の位置ず
れの問題を回避して、よシ多くの層数の多層プリント回
路板を容易に製造することができるので、その経済的な
効果には測り知れないものがある。As described above, according to the present invention, the problem of misalignment of inner layers, which is the biggest problem when manufacturing multilayer boards using the lamination press method, can be avoided, and a multilayer printed circuit with a large number of layers can be manufactured. Since the plates can be manufactured easily, their economic benefits are immeasurable.
第１図は本発明による多層プリント回路板の製造工程を
示す図、第２図は本発明の他の実施の態様による多層プ
リント回路板の製造工程を示す図である。
１・・・・・・積層プレスで一体化した多層７゛リント
回路板、２．．２２・・・・・・鋼箔、５．．５２・・
・・・・内層鋼箔、４、 、４２・・・・・・スルホー
ル部、５・・・・・・外層ライン部、６・・・・・・ラ
ンド部、７・−・・・・絶縁層、８・−・・・ビアホー
ル部、９・・・・・・耐めっきレジスト、１０・・・・
化学銅めっき層。
グｌ 閃
−Ｘ２Ｉ！ＩFIG. 1 is a diagram showing a manufacturing process of a multilayer printed circuit board according to the present invention, and FIG. 2 is a diagram showing a manufacturing process of a multilayer printed circuit board according to another embodiment of the invention. 1...Multilayer 7゜lint circuit board integrated by lamination press, 2. ．． 22... Steel foil, 5. ．． 52...
...Inner layer steel foil, 4, ,42...Through hole part, 5...Outer layer line part, 6...Land part, 7...Insulation Layer, 8... Via hole portion, 9... Plating resistant resist, 10...
Chemical copper plating layer. Gl Sen-X2I! I
Claims (1)
び回路形成を行なう工程と、上記積層板に形成された回
路のうちランド部およびビアホール部を除いて層間絶縁
層を設ける工程と、該絶縁層上およびスルホール孔内に
化学鋼めっきを用いるフルアディティブ方式で銅を析出
させ、回路を形成する工程とからなることを特徴とする
多層プリント回路板の製造方法。 ２、上記積層板が、内層回路を有する基材と銅箔もしく
は銅箔を有する基材をプリプレグを用いて一体化した積
層プレス方式の積層板であることを特徴とする、特許請
求の範囲第１項記載の多層プリント回路板の製造方法。 ３、上記層間絶縁層が、エポキシ樹脂と、グアニジンも
しくはその誘導体もしくはその変成物を必須成分とする
絶縁材料からなることを特徴とする、特許請求の範囲第
１項記載の多層プリント回路板の製造方法。 ４、上記層間絶縁層が、エポキシ樹脂１００部、グアニ
ジンもしくはその誘導体もしくはその変成物２０〜８０
部、充填剤３〜４０部、若干部の揺変剤、消泡剤および
有機溶剤からなる絶縁材料であることを特徴とする、特
許請求の範囲第３項記載の多層プリント回路板の製造方
法。[Claims] 1. A step of drilling through holes and forming a circuit in a laminate having steel foil on both sides, and removing an interlayer insulating layer from the circuit formed in the laminate except for land portions and via hole portions. 1. A method for manufacturing a multilayer printed circuit board, comprising the steps of: providing a circuit; and depositing copper on the insulating layer and in the through-holes by a fully additive method using chemical steel plating to form a circuit. 2. The above-mentioned laminate is a laminate using a lamination press method in which a base material having an inner layer circuit and a copper foil or a base material having a copper foil are integrated using prepreg. A method for manufacturing a multilayer printed circuit board according to item 1. 3. Production of a multilayer printed circuit board according to claim 1, wherein the interlayer insulating layer is made of an insulating material containing an epoxy resin and guanidine, a derivative thereof, or a modified product thereof as essential components. Method. 4. The interlayer insulating layer contains 100 parts of epoxy resin and 20 to 80 parts of guanidine or its derivative or modified product.
3 to 40 parts of a filler, some parts of a thixotropic agent, an antifoaming agent, and an organic solvent. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20815284A JPS6187398A (en) | 1984-10-05 | 1984-10-05 | Manufacture of multilayer printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20815284A JPS6187398A (en) | 1984-10-05 | 1984-10-05 | Manufacture of multilayer printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6187398A true JPS6187398A (en) | 1986-05-02 |
| JPH0434839B2 JPH0434839B2 (en) | 1992-06-09 |
Family
ID=16551499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20815284A Granted JPS6187398A (en) | 1984-10-05 | 1984-10-05 | Manufacture of multilayer printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6187398A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05334771A (en) * | 1990-12-17 | 1993-12-17 | Internatl Business Mach Corp <Ibm> | Guide for flexible mobile web, tape guide and tape driving device |
| JP2016072472A (en) * | 2014-09-30 | 2016-05-09 | 住友ベークライト株式会社 | Multilayer circuit board, and method for manufacturing multilayer circuit board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5171957A (en) * | 1974-12-18 | 1976-06-22 | Tokyo Print Kogyo Co Ltd | KANITASOINSATSUHAISENBAN OYOBI SONOSEIZOHOHO |
| JPS59121995A (en) * | 1982-12-28 | 1984-07-14 | 日本電気株式会社 | Method of producing multilayer printed circuit board |
-
1984
- 1984-10-05 JP JP20815284A patent/JPS6187398A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5171957A (en) * | 1974-12-18 | 1976-06-22 | Tokyo Print Kogyo Co Ltd | KANITASOINSATSUHAISENBAN OYOBI SONOSEIZOHOHO |
| JPS59121995A (en) * | 1982-12-28 | 1984-07-14 | 日本電気株式会社 | Method of producing multilayer printed circuit board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05334771A (en) * | 1990-12-17 | 1993-12-17 | Internatl Business Mach Corp <Ibm> | Guide for flexible mobile web, tape guide and tape driving device |
| JP2016072472A (en) * | 2014-09-30 | 2016-05-09 | 住友ベークライト株式会社 | Multilayer circuit board, and method for manufacturing multilayer circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0434839B2 (en) | 1992-06-09 |
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