JPS6177639U - - Google Patents
Info
- Publication number
- JPS6177639U JPS6177639U JP16351884U JP16351884U JPS6177639U JP S6177639 U JPS6177639 U JP S6177639U JP 16351884 U JP16351884 U JP 16351884U JP 16351884 U JP16351884 U JP 16351884U JP S6177639 U JPS6177639 U JP S6177639U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- current fluctuations
- load
- large current
- compensation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Stand-By Power Supply Arrangements (AREA)
- Motor And Converter Starters (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Description
第１図は本考案の１実施例の回路図である。
２……３端子レギユレータ、３……電流変動の
大きい負荷、４……電流変動の小さい負荷、Ｔｒ
，Ｒ，ＺＤ……スイツチング回路。
FIG. 1 is a circuit diagram of one embodiment of the present invention. 2...3-terminal regulator, 3...Load with large current fluctuation, 4...Load with small current fluctuation, Tr
, R, ZD...Switching circuit.
Claims (1)
数の電源のうち最も低い電圧の電源は前記複数の
電源の全電圧範囲で動作可能な３端子レギユレー
タを介して電流変動の大きい負荷に接続され、他
の電源は前記各独立の電流変動の小さい負荷に直
接または適当なレギユレータを介して接続される
とともに前記最も低い電圧の電源が所定の電圧値
より低下したときに閉路するスイツチ回路を介し
て前記３端子レギユレータの入力に接続されるこ
とを特徴とする電源補償回路。 Among multiple power supplies that supply different voltages to different loads, the lowest voltage power supply is connected to a load with large current fluctuations through a three-terminal regulator that can operate over the entire voltage range of the multiple power supplies, and is connected to a load with large current fluctuations. is connected to each of the independent loads with small current fluctuations directly or through a suitable regulator, and is connected to the three-terminal regulator via a switch circuit that closes when the lowest voltage power supply drops below a predetermined voltage value. A power supply compensation circuit characterized in that it is connected to an input of the power supply compensation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16351884U JPH0223069Y2 (en) | 1984-10-29 | 1984-10-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16351884U JPH0223069Y2 (en) | 1984-10-29 | 1984-10-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6177639U true JPS6177639U (en) | 1986-05-24 |
| JPH0223069Y2 JPH0223069Y2 (en) | 1990-06-22 |
Family
ID=30721379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16351884U Expired JPH0223069Y2 (en) | 1984-10-29 | 1984-10-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0223069Y2 (en) |
-
1984
- 1984-10-29 JP JP16351884U patent/JPH0223069Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0223069Y2 (en) | 1990-06-22 |