JPS6175657U - - Google Patents
Info
- Publication number
- JPS6175657U JPS6175657U JP16022984U JP16022984U JPS6175657U JP S6175657 U JPS6175657 U JP S6175657U JP 16022984 U JP16022984 U JP 16022984U JP 16022984 U JP16022984 U JP 16022984U JP S6175657 U JPS6175657 U JP S6175657U
- Authority
- JP
- Japan
- Prior art keywords
- phase detector
- output
- communication device
- wireless communication
- controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000002159 abnormal effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Superheterodyne Receivers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Transmitters (AREA)
Description
第１図は本考案の実施例を示すブロツク回路図
、第２図は本考案の適用されるべき同期系の概念
図、第３図は従来の同期系のブロツク回路図であ
る。
図において、１はパイロツト抽出用の帯域波
器、２は周波数同期発振回路、３は電圧制御自励
発振器、３′は電圧制御水晶発振器、４は位相検
出器、５は送信信号開閉回路、６は制御論理回路
、７は変調器、８は復調器、Ａは送信入力端子、
Ｂは受信出力端子、Ｃは送信出力端子、Ｄは受信
入力端子、Ｔ１，Ｔ２は送信装置、Ｒ１，Ｒ２は
受信装置、を示す。
FIG. 1 is a block circuit diagram showing an embodiment of the present invention, FIG. 2 is a conceptual diagram of a synchronization system to which the present invention is applied, and FIG. 3 is a block circuit diagram of a conventional synchronization system. In the figure, 1 is a band wave generator for pilot extraction, 2 is a frequency synchronized oscillation circuit, 3 is a voltage-controlled self-excited oscillator, 3' is a voltage-controlled crystal oscillator, 4 is a phase detector, 5 is a transmission signal switching circuit, and 6 is a control logic circuit, 7 is a modulator, 8 is a demodulator, A is a transmission input terminal,
B indicates a receiving output terminal, C indicates a transmitting output terminal, D indicates a receiving input terminal, T 1 and T 2 indicate a transmitting device, and R 1 and R 2 indicate a receiving device.
Claims (1)
御自励発振器、該発振器の出力信号と受信同期基
準パイロツト信号との位相差を検出する位相検出
器、該位相検出器の出力異常時に無線送信信号を
停止せしめる制御回路とを備えてなることを特徴
とするＳＳＢ無線通信装置。 A voltage-controlled self-excited oscillator whose frequency is controlled by the output of a phase detector, a phase detector that detects the phase difference between the output signal of the oscillator and a reception synchronization reference pilot signal, and a wireless transmission signal when the output of the phase detector is abnormal. An SSB wireless communication device comprising: a control circuit for stopping the SSB wireless communication device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16022984U JPS6175657U (en) | 1984-10-23 | 1984-10-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16022984U JPS6175657U (en) | 1984-10-23 | 1984-10-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6175657U true JPS6175657U (en) | 1986-05-21 |
Family
ID=30718154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16022984U Pending JPS6175657U (en) | 1984-10-23 | 1984-10-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6175657U (en) |
-
1984
- 1984-10-23 JP JP16022984U patent/JPS6175657U/ja active Pending
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