JPS6168523U - - Google Patents
Info
- Publication number
- JPS6168523U JPS6168523U JP15175684U JP15175684U JPS6168523U JP S6168523 U JPS6168523 U JP S6168523U JP 15175684 U JP15175684 U JP 15175684U JP 15175684 U JP15175684 U JP 15175684U JP S6168523 U JPS6168523 U JP S6168523U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- input terminal
- differential amplifier
- inverting input
- grounded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000007493 shaping process Methods 0.000 description 1
Landscapes
- Manipulation Of Pulses (AREA)
- Networks Using Active Elements (AREA)
Description
第１図は本考案の一実施例としての差動入力形
低域フイルタの回路図、第２図は第１図の低域フ
イルタを利用した波形整形回路の回路図、第３図
は従来形の差動入力形低域フイルタの回路図であ
る。
Ｑ１…差動増幅器、Ｒ１〜Ｒ７…抵抗器、Ｃ１
〜Ｃ３…キヤパシタ。
Figure 1 is a circuit diagram of a differential input type low-pass filter as an embodiment of the present invention, Figure 2 is a circuit diagram of a waveform shaping circuit using the low-pass filter of Figure 1, and Figure 3 is a conventional type. FIG. 2 is a circuit diagram of a differential input type low-pass filter. Q1...Differential amplifier, R1-R7...Resistor, C1
~C3...capacitor.
Claims (1)
との間に第１の抵抗器および第２の抵抗器が直列
接続され、該第１および第２の抵抗器の共通接続
点が第１のキヤパシタを経て接地され、該非反転
入力端子が第３の抵抗器を経て接地され、第２の
入力端子と該差動増幅器の反転入力端子との間に
第４の抵抗器および第５の抵抗器が直列接続され
、該第４および第５の抵抗器の共通接続点が第２
のキヤパシタを経て接地され、該差動増幅器の出
力端子と反転入力端子の間に第６の抵抗器が接続
された差動入力形抵域フイルタ。 A first resistor and a second resistor are connected in series between the first input terminal and the non-inverting input terminal of the differential amplifier, and a common connection point of the first and second resistors is connected to the first resistor. is grounded through a capacitor of the differential amplifier, the non-inverting input terminal is grounded through a third resistor, and a fourth resistor and a fifth resistor are connected between the second input terminal and the inverting input terminal of the differential amplifier. the fourth and fifth resistors are connected in series, and the common connection point of the fourth and fifth resistors is connected to the second resistor.
A differential input type resistance filter is grounded through a capacitor of the differential amplifier, and a sixth resistor is connected between the output terminal and the inverting input terminal of the differential amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15175684U JPS6168523U (en) | 1984-10-09 | 1984-10-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15175684U JPS6168523U (en) | 1984-10-09 | 1984-10-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6168523U true JPS6168523U (en) | 1986-05-10 |
Family
ID=30709853
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15175684U Pending JPS6168523U (en) | 1984-10-09 | 1984-10-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6168523U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56156053A (en) * | 1980-05-02 | 1981-12-02 | Fujitsu Ten Ltd | Waveform shaping circuit |
| JPS5789327A (en) * | 1980-11-25 | 1982-06-03 | Fujitsu Ten Ltd | Duty control type frequency multiplying circuit |
| JPS59149416A (en) * | 1983-02-16 | 1984-08-27 | Hitachi Ltd | Waveform shaping circuit |
-
1984
- 1984-10-09 JP JP15175684U patent/JPS6168523U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56156053A (en) * | 1980-05-02 | 1981-12-02 | Fujitsu Ten Ltd | Waveform shaping circuit |
| JPS5789327A (en) * | 1980-11-25 | 1982-06-03 | Fujitsu Ten Ltd | Duty control type frequency multiplying circuit |
| JPS59149416A (en) * | 1983-02-16 | 1984-08-27 | Hitachi Ltd | Waveform shaping circuit |