JPS6163088A - Method of producing through hole circuit board - Google Patents
Method of producing through hole circuit boardInfo
- Publication number
- JPS6163088A JPS6163088A JP18404484A JP18404484A JPS6163088A JP S6163088 A JPS6163088 A JP S6163088A JP 18404484 A JP18404484 A JP 18404484A JP 18404484 A JP18404484 A JP 18404484A JP S6163088 A JPS6163088 A JP S6163088A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- layer
- circuit conductor
- insulating substrate
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は磁気記録再生装置やテレビジョン受像機など広
範な電子機器に用いられるスルーホール配線板の製造方
法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing through-hole wiring boards used in a wide variety of electronic devices such as magnetic recording and reproducing devices and television receivers.
従来例の構成とその問題点
近年、電子機器の軽薄短小化に対する要求が増大してく
るにつれ、これらの電子機器に用いられる印刷配線板の
高密度化が必要不可欠となっており、とりわけスルーホ
ール配線板の需要はますます高まってきている。Conventional configurations and their problems In recent years, as the demand for lighter, thinner, and shorter electronic devices has increased, it has become essential to increase the density of printed wiring boards used in these electronic devices. Demand for wiring boards is increasing.
スルーホール配線板は、絶縁基板の表裏両面に回路導体
層を有し、その両者の回路導体層を貫通する孔を導通化
することによって電気的に接続したものであり、昨今こ
のスルーホール配線板において配線回路導体層の微細化
する技術が大きな課題となっている。A through-hole wiring board has circuit conductor layers on both the front and back sides of an insulating substrate, and is electrically connected by making the holes that pass through both circuit conductor layers conductive. Technology for miniaturizing wiring circuit conductor layers has become a major issue.
スルーホーン配線板の製造方法は従来から様々な方法が
実施されているが、回路導体層の微細化をはかる製造方
法として第１図Ａ−Ｆに示す製造工程を経て作るスルー
ホール配線板がある。Various methods have been used to manufacture through-hole wiring boards, but as a manufacturing method that aims to miniaturize the circuit conductor layer, there is a through-hole wiring board manufactured through the manufacturing process shown in Figure 1 A to F. .
この製造方法は、まず第１図Ａに示すようにガラスエポ
キシなどのプラスチック絶縁基板１の表裏両面は銅はく
などの金属箔を接着したいわゆる銅張り絶縁基板を使用
して、フォトエツチング技術により絶縁基板１の表裏両
面に所望とする回路導体層２ａ、２ｂｆ形成し、この回
路導体層２ａ。This manufacturing method first uses a so-called copper-clad insulating substrate in which metal foil such as copper foil is bonded to both the front and back surfaces of a plastic insulating substrate 1 made of glass epoxy or the like, as shown in FIG. Desired circuit conductor layers 2a and 2bf are formed on both the front and back surfaces of the insulating substrate 1, and this circuit conductor layer 2a.
２ｂの接続を必要とする個所に貫通孔３をあける工程、
第１図Ｂに示すように、活性化処理を行って、貫通孔３
と絶縁基板１の全面に金属パラジウムの微粒子核から成
る活性化層４を付着させる工程、第１図Ｃに示すように
、無電解鋼めっきを行って、活性化層４が付着した面に
導電金属層５を析出させる工程、第１図りに示すように
貫通孔３と必要な回路導体層２ａ、２ｂの一部が露出す
るように絶縁基板１の表裏両面にそれぞれ耐めっき性を
有するレジスト層６を被覆する工程、第１図Ｅに示すよ
うに露出した貫通孔３と回路導体層２ａ、２ｂの一部に
電気めっき法によって導電金属層７を厚付けする工程、
第１図Ｆに示すように耐めっき性のレジスト層６を除去
し、露出した無電解銅めっきによる導電金属層５をエツ
チング法により溶解除去する工程から成るものである。a step of drilling a through hole 3 at a location where connection 2b is required;
As shown in FIG. 1B, the through-hole 3 is
and a process of attaching an activation layer 4 made of fine particle nuclei of metallic palladium to the entire surface of the insulating substrate 1. As shown in FIG. In the step of depositing the metal layer 5, a resist layer having plating resistance is applied on both the front and back surfaces of the insulating substrate 1 so that the through hole 3 and a part of the necessary circuit conductor layers 2a and 2b are exposed, as shown in the first diagram. 6, a step of applying a thick conductive metal layer 7 to the exposed through hole 3 and part of the circuit conductor layers 2a, 2b by electroplating as shown in FIG. 1E;
As shown in FIG. 1F, this step consists of removing the plating-resistant resist layer 6 and dissolving and removing the exposed conductive metal layer 5 formed by electroless copper plating by an etching method.
ところがこのような方法によるスルーホール配線板は、
サイドエツチングが少なく、微細配線化が比較的容易に
行なえる利点がある反面、スル揖ホールの導通化をはか
るのに活性化処理や無電解めっき工程などの湿式プロセ
スによる煩雑な処理工程を必要とし、廃液処理を含めそ
の設備が犬がかりとなること、これらの工程′を経て形
成された導電金属層は均一性やつきまわり性を欠き、従
ってスルーホール導通の安定化をはかるにはその膜厚は
できるだけ厚く形成する必要があるが最終エツチング工
程でオーバーエツチングによる回路導体層の線細シや線
不良が発生し、歩留りが低下すること、さらには、金属
パラジウムの微粒子核から成る活性化層が絶縁基板の全
表面に残存するため、回路導体層間の電気絶縁特性が劣
化するなどの不都合があった。However, through-hole wiring boards made using this method,
Although it has the advantage that side etching is small and fine wiring can be formed relatively easily, it requires complicated treatment steps using wet processes such as activation treatment and electroless plating process to make the through holes conductive. However, the equipment, including waste liquid treatment, is complicated, and the conductive metal layer formed through these processes lacks uniformity and throwing power. Therefore, in order to stabilize through-hole conduction, the thickness of the film must be adjusted. It is necessary to form the layer as thick as possible, but in the final etching process, over-etching can cause line fine lines and line defects in the circuit conductor layer, lowering the yield. Since it remains on the entire surface of the insulating substrate, there are disadvantages such as deterioration of electrical insulation properties between circuit conductor layers.
発明の目的
本発明の目的は、比較的簡単な工程でスルーホール接続
の安定性と、微細配線化を容易にし、かつ電気絶縁特性
が劣化しない高信頼性スルーホール配線板の製造方法を
提供することである。OBJECTS OF THE INVENTION An object of the present invention is to provide a method for manufacturing a highly reliable through-hole wiring board that facilitates the stability of through-hole connections and fine wiring through a relatively simple process, and that does not cause deterioration of electrical insulation properties. That's true.
発明の構成
本発明によるスルーホール配線板は、貫通孔を設けた絶
縁基板の表裏両面に所望とする回路導体層を形成する工
程、貫通孔と絶縁基板の全表面に金属薄膜層を形成する
工程、貫通孔とその周辺部および必要とする回路導体層
の一部が露出するように耐めっき性のレジスト層を選択
的に被覆する工程、露出した貫通孔と回路４体層に電気
めっき法により導電金属層を厚付けする工程、耐めっき
性のレジスト層を除去し、露出した金属薄膜層をエツチ
ング法により溶解除去する工程により作られるものであ
り、特に真空蒸着法やスパッタリング法などのドライプ
ロセスを用いて金属薄膜層を形成することによりスルー
ホール接続の安定化と、微細配線の形成および電気絶縁
特性が劣化しないスルーホール配線板を作ることを最大
の特徴としたものである。Structure of the Invention The through-hole wiring board according to the present invention includes a step of forming a desired circuit conductor layer on both the front and back surfaces of an insulating substrate provided with a through hole, and a step of forming a metal thin film layer on the through hole and the entire surface of the insulating substrate. , a step of selectively covering the through-hole and its surrounding area with a plating-resistant resist layer so that a part of the necessary circuit conductor layer is exposed; and a process of electroplating the exposed through-hole and the four circuit layers. It is made by a process of thickening a conductive metal layer, removing a plating-resistant resist layer, and dissolving and removing the exposed metal thin film layer using an etching method, especially dry processes such as vacuum evaporation and sputtering. The main feature is that by forming a metal thin film layer using a metal thin film layer, through-hole connections can be stabilized, fine wiring can be formed, and a through-hole wiring board can be created without deterioration of electrical insulation properties.
実施例の説明
以下本発明の一実施例について図面を参照しながら説明
する。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.
第２図Ａ−Ｅは本発明の一実施例におけるスルーホール
配線板の製造工程図を示したものである。FIGS. 2A to 2E show manufacturing process diagrams of a through-hole wiring board according to an embodiment of the present invention.
第２図において、８は絶縁基板、９ａ、９ｂは回路導体
層、１０は貫通孔、１１は金属薄膜層、１２は耐めっき
レジスト層、１２は導電金属層である。In FIG. 2, 8 is an insulating substrate, 9a and 9b are circuit conductor layers, 10 is a through hole, 11 is a metal thin film layer, 12 is a plating-resistant resist layer, and 12 is a conductive metal layer.
以上のように構成された本実施例のスルーホール配線板
について以下その製造工程を詳細に説明する。The manufacturing process of the through-hole wiring board of this embodiment configured as described above will be explained in detail below.
まず、第２図Ａに示すように、絶縁基板８の表裏両面に
所望の回路導体層９ａ、９ｂを形成し、電気的接続を必
要とする回路導体層９ａ、ｓｂ間に貫通孔１１をあける
。First, as shown in FIG. 2A, desired circuit conductor layers 9a and 9b are formed on both the front and back surfaces of the insulating substrate 8, and a through hole 11 is formed between the circuit conductor layers 9a and sb that require electrical connection. .
本実施例では、絶縁基板８の表裏両面に回路導体層９ａ
、９ｂを形成する方法として、次の２通りの方法を実施
した。その１つはガラスエポキシ基材などのプラスチッ
ク絶縁基板の表裏両面に厚さ、１８μ、３５μなどの各
種電解銅箔を接着したいわゆる銅張り絶縁基板を使用し
て、フォトエ。In this embodiment, circuit conductor layers 9a are provided on both the front and back surfaces of the insulating substrate 8.
, 9b were formed using the following two methods. One of them is photo-etching using a so-called copper-clad insulating substrate, in which electrolytic copper foil of various thicknesses such as 18 μm and 35 μm is adhered to both the front and back sides of a plastic insulating substrate such as a glass epoxy base material.
ソチ／グ法などの公知の技術によって所望とする微細配
線化した回路導体層を形成し、電気的接続を必要とする
回路導体層を貫通する孔をドリルを用いてあけた。なお
本実施例においては、厚さ０．６ ｍ／ｍのガラスエポ
キシ基板に１８μの電解銅はくを接着しフォトエツチン
グ法によって最小線間、線幅が５０μの回路導体層を形
成するとともに、貫通孔は最小０．３φの孔をあけた。A circuit conductor layer with desired fine wiring was formed using a known technique such as the Sochi/G method, and a hole was drilled through the circuit conductor layer requiring electrical connection. In this example, an 18μ electrolytic copper foil was bonded to a glass epoxy substrate with a thickness of 0.6 m/m, and a circuit conductor layer with a minimum line spacing and a line width of 50μ was formed by photoetching. The through hole was made with a minimum diameter of 0.3φ.
また一方、２つ目の方法としては、ガラスエポキシ基材
などのプラスチック絶縁基板１の表裏両面に銀粉や銅粉
などの金属粉末を熱硬化性樹脂に分散、混合して作った
導電性ペーストを用いてスクリーン印刷法により所望の
配線回路状に塗布し、加熱硬化させることによって回路
導体層に形成し、ドリルを用いて貫通孔をあけた。On the other hand, the second method is to apply a conductive paste made by dispersing and mixing metal powder such as silver powder or copper powder into a thermosetting resin on both the front and back surfaces of a plastic insulating substrate 1 such as a glass epoxy base material. A circuit conductor layer was formed by applying the film in a desired wiring circuit shape using a screen printing method, heating and curing it, and making through holes using a drill.
このような回路導体層の形成方法では回路導体層の微細
化は前者の方法に比べかなり劣るが、実施例では、Ｏ，
Ｓｔのガラスエポキシ基板上に線間線幅で最小０．２ｍ
／ｍの回路導体層を形成した。In this method of forming a circuit conductor layer, the miniaturization of the circuit conductor layer is considerably inferior to that of the former method, but in the example, O,
Minimum line width of 0.2m on St glass epoxy substrate
/m of circuit conductor layer was formed.
次に、第２図Ｂに示すごとく、絶縁基板８の表裏両面に
回路導体層９ａ、９ｂと、その両者を貫通する孔１ｏを
設けた印刷配線基板の貫通孔内壁面を含む全面に金属薄
膜層１１を形成する。Next, as shown in FIG. 2B, a metal thin film is applied to the entire surface including the inner wall surface of the through hole of the printed circuit board, which has circuit conductor layers 9a and 9b on both the front and back surfaces of the insulating substrate 8, and a hole 1o that passes through both. Form layer 11.
この場合、金属薄膜層１１を形成する方法として本実施
例では、真空蒸着法とスパッタリング法を用いて行った
。In this case, the metal thin film layer 11 was formed using a vacuum evaporation method and a sputtering method in this embodiment.
即ち、真空蒸着法では、貫通孔１ｏを設けた両面印刷配
線板を高真空中に放置し、金属銅を真空中で高温に加熱
して蒸発させることにより、金属銅から成る金属薄膜層
１１を貫通孔１ｏの内壁面を含む、絶縁基板８の表裏全
面に約１〜２μの厚さに均一に付着させた。That is, in the vacuum evaporation method, a double-sided printed wiring board provided with through holes 1o is left in a high vacuum, and metallic copper is heated to a high temperature in vacuum to evaporate, thereby forming a metallic thin film layer 11 made of metallic copper. It was uniformly adhered to a thickness of about 1 to 2 μm over the entire front and back surfaces of the insulating substrate 8, including the inner wall surface of the through hole 1o.
この場合、真空蒸着法により析出させる金属銅は均一性
とともに高速析出性やつきまわり性をよくするために真
空度やチャンバー内での基板の配置にいろいろな工夫を
こらし、特に貫通孔１０の内壁面に均一にかつ密着性、
つきまわり性の良い金属薄膜層１１を形成することがで
きた。In this case, in order to improve the uniformity of the metallic copper deposited by the vacuum evaporation method, as well as high-speed deposition and throwing power, various measures have been taken in the degree of vacuum and the arrangement of the substrate in the chamber. Uniform and adhesion to the wall surface,
A metal thin film layer 11 with good throwing power could be formed.
また一方、スバリング法によっても銅から成る金属薄膜
層１１を付着させる方法を試みたが、この方法によって
も極めて良好なつきまわり性や密着性を有する金属薄膜
層１１を形成することができた。On the other hand, a method of attaching the metal thin film layer 11 made of copper by the svaring method was also attempted, and it was possible to form the metal thin film layer 11 having extremely good throwing power and adhesion using this method as well.
そして、本実施例では第２図Ｃに示すように、貫通孔１
ｏとその周辺部、および貫通孔周辺部以外の必要とする
回路導体層９ａ、９ｂが露出するように、金属薄膜層１
１の表面にそれぞれ耐めっき性を有し、しかも特定な化
学薬品を用いて最終工程で容易にばくりかできるレジス
ト層１２を、スクリーン印刷法か又は感光性を有するド
ライフィルムを用いたフォト技術を利用して選択的に被
覆した。In this embodiment, as shown in FIG. 2C, the through hole 1
metal thin film layer 1 so that the necessary circuit conductor layers 9a and 9b other than the area around the through hole and the area around the through hole are exposed.
A resist layer 12 that has plating resistance and can be easily exposed in the final process using specific chemicals is formed on each surface of the resist layer 12 using a screen printing method or a photo technique using a photosensitive dry film. was selectively coated using
それから、第２図りに示すように、耐めっき性のレジス
ト層１２を選択的に形成した両面配線板に銅の電気めっ
きを行ない露出した貫通孔１０の内へき部と、回路導体
層９ａ、９ｂの一部に金属銅から成る導電金属層１３を
３０〜４０μの厚さにめっきした。Then, as shown in the second diagram, the double-sided wiring board on which the plating-resistant resist layer 12 has been selectively formed is electroplated with copper, and the inner part of the exposed through hole 10 and the circuit conductor layers 9a and 9b are coated with copper. A conductive metal layer 13 made of copper metal was plated to a thickness of 30 to 40 μm on a part of the plate.
本実施例では、電気銅めっき法として硫酸鋼浴せること
ができた。In this example, a sulfuric acid steel bath could be used as the electrolytic copper plating method.
このようにして必要な部分に導電金属層１３を厚付けし
たものは、最終工程として第２図Ｅに示すように、耐め
っき性のレジスト層１２をアルカリ溶液や溶剤を用いて
除去するとともに、耐めっきレジスト１２で被覆されて
いた銅から成る金属薄膜層１１を塩化第２鉄や塩化第２
銅などの腐食液を用いてごく短時間に溶解除去すること
により、貫通孔１０と必要とする回路導体層９ａ、９に
一部に厚い導電金属層１３を具備したスルーネル配線板
を作った。After thickening the conductive metal layer 13 in the necessary areas in this way, as a final step, as shown in FIG. 2E, the plating-resistant resist layer 12 is removed using an alkaline solution or solvent. The metal thin film layer 11 made of copper that was covered with the plating-resistant resist 12 is coated with ferric chloride or dichloride.
By dissolving and removing copper or the like in a very short time using a corrosive liquid, a through-hole wiring board having a thick conductive metal layer 13 in a part of the through hole 10 and the necessary circuit conductor layers 9a, 9 was fabricated.
ここで最終のエツチング工程では金属薄膜層１と電気め
っき法により析出させた導電金属層１ことの厚ぐの差が
大きく、しかも金属薄膜層１１仁厚みのばらつきがほと
んど均一に形成されてぃまためにエツチング工程におい
て、溶解も均一に求こり従って、必要な回路導体層のダ
メージも全くなく、微細配線化した回路導体層が高い歩
留９″″Ｃ形成できた。Here, in the final etching process, there is a large difference in thickness between the metal thin film layer 1 and the conductive metal layer 1 deposited by electroplating, and the variation in the thickness of the metal thin film layer 11 is almost uniform. Therefore, in the etching process, the dissolution was uniform, and therefore, there was no damage to the necessary circuit conductor layer, and a circuit conductor layer with fine wiring could be formed at a high yield of 9''C.
なお、本実施例においては絶縁基板としてガラスエポキ
シ基材から成る硬質のグラスチック基藝を使用したが、
本発明では、この絶縁基板の材乍については特に限定す
るものではなく、アルミｔなどのセラミックス絶縁基板
やポリイミドフィルムなどのフレキシブル絶縁基板を使
用して、こゎらの絶縁基材の表裏両面にいろいろな方法
により回路導体層を形成したものを用いてもよいことは
いうまでもない。Note that in this example, a hard glass base material consisting of a glass epoxy base material was used as the insulating substrate.
In the present invention, the material of this insulating substrate is not particularly limited, and a ceramic insulating substrate such as aluminum T or a flexible insulating substrate such as a polyimide film is used, and various types of materials can be applied to both the front and back of these insulating substrates. It goes without saying that a circuit conductor layer formed by any method may also be used.
発明の効果
以上の説明から明らかなように本発明によるスルーホー
ル配線板は絶縁基板の表裏両面にまず、所望の回路導体
層を７オトエノチング法や導電ペーストを塗布する方法
によって形成してから接続を必要とする回路導体層間を
貫通する孔をあけ、真空蒸着法やスパッタリング法など
の完全ドライプロセスによって貫通孔内壁部と回路導体
層を形成した絶縁基板の全面に金属薄膜層を均一に付着
させ、貫通孔と必要な回路導体層の一部が露出するよう
に他の部分に耐めっき性のレジストを選択的に被覆させ
、しかる後に電気めっきによって貫通孔と必要とする回
路導体層の一部に導電金属層を厚付けするとともに、耐
めっき性のレジストを除去して金属はく膜層を軽くエツ
チングして溶解することによりスルーホール配線板を作
ったものである。Effects of the Invention As is clear from the above explanation, the through-hole wiring board according to the present invention first forms a desired circuit conductor layer on both the front and back surfaces of an insulating substrate by an etching method or a method of applying a conductive paste, and then connects the board. A hole is made that penetrates between the required circuit conductor layers, and a metal thin film layer is uniformly adhered to the inner wall of the through hole and the entire surface of the insulating substrate on which the circuit conductor layer has been formed using a completely dry process such as vacuum evaporation or sputtering. A plating-resistant resist is selectively coated on other parts so that the through hole and a necessary part of the circuit conductor layer are exposed, and then the through hole and a necessary part of the circuit conductor layer are covered with electroplating. A through-hole wiring board is made by thickening the conductive metal layer, removing the plating-resistant resist, and lightly etching and dissolving the metal foil layer.
従って本発明によるスルーホール配線板は、従来例のよ
うな活性化処理や無電解めっき工程を必要とせずに金属
薄膜層を形成するので、その処理作業が比較的簡単に行
なうことができ、しかも活性化層が最終的に絶縁基板の
表面に残存することがないので、回路導体層間の電気絶
縁特性が劣化することがない。また一方、本発明では、
回路導体層を前もって形成し、絶縁基板の全面に金属は
く膜層が均一に析出することができるので、最終のエツ
チング工程においてエツチングのむらが起らず均一に金
属はく膜層が溶解できるので、微細配線化した回路導体
層のエツチングによる損傷がなく、かつスルーホール接
続の安定化がはかれるなどの従来例にない多くの効果が
得られるものである。Therefore, the through-hole wiring board according to the present invention forms a metal thin film layer without the need for activation treatment or electroless plating process as in conventional examples, so the processing operation can be performed relatively easily. Since the activation layer does not ultimately remain on the surface of the insulating substrate, the electrical insulation properties between the circuit conductor layers will not deteriorate. On the other hand, in the present invention,
Since the circuit conductor layer is formed in advance and the metal foil layer can be deposited uniformly over the entire surface of the insulating substrate, the metal foil layer can be dissolved uniformly without uneven etching in the final etching process. Many advantages not found in the prior art can be obtained, such as no damage caused by etching to the finely wired circuit conductor layer and stabilization of through-hole connections.
第１図Ａ−Ｆは従来例によるスルーホール配線板の製造
工程図、第２図Ａ−Ｅは本発明の一実施例におけるスル
ーホール配線板の製造方法を説明するための製造工程図
である。
８・・・・・・絶縁基板、９ａ、 ｓｂ・・・・・・
回路導体層、１０・・・・・・貫通孔、１１・・・・・
・金Ｂ薄膜層、１２・・・・・・耐めっきレジスト層、
１３・・川・導電金属層。
弔１図FIGS. 1A to 1F are manufacturing process diagrams of a through-hole wiring board according to a conventional example, and FIGS. 2A to 2E are manufacturing process diagrams for explaining a method of manufacturing a through-hole wiring board according to an embodiment of the present invention. . 8...Insulating board, 9a, sb...
Circuit conductor layer, 10... Through hole, 11...
・Gold B thin film layer, 12... plating resistant resist layer,
13... River/conductive metal layer. Funeral diagram 1
Claims (5)
導体層を形成する工程、前記貫通孔と絶縁基板の全表面
に金属薄膜層を形成する工程、前記貫通孔とその周辺部
および必要とする回路導体層の一部分が露出するように
耐めっき性のレジスト層を選択的に被覆する工程、前記
露出した貫通孔と回路導体層に電気めっき法により導電
金属層を厚付けする工程および、前記耐めっき性のレジ
スト層を除去し、露出した金属薄膜層をエッチング法に
より溶解除去する工程から成るスルーホール配線板の製
造方法。(1) A step of forming a desired circuit conductor layer on both the front and back surfaces of an insulating substrate provided with a through hole, a step of forming a metal thin film layer on the through hole and the entire surface of the insulating substrate, a step of forming a thin metal film layer on the through hole and its surrounding area, and a step of selectively covering a plating-resistant resist layer so that a part of the required circuit conductor layer is exposed; a step of applying a thick conductive metal layer to the exposed through hole and the circuit conductor layer by electroplating; . A method for manufacturing a through-hole wiring board, which comprises the steps of removing the plating-resistant resist layer and dissolving and removing the exposed metal thin film layer by an etching method.
方法によって形成したことを特徴とする特許請求の範囲
第１項記載のスルーホール配線板の製造方法。(2) The method for manufacturing a through-hole wiring board according to claim 1, wherein the circuit conductor layer is formed by etching a copper-clad insulating substrate.
とを特徴とする特許請求の範囲第１項記載のスルーホー
ル配線板の製造方法。(3) The method for manufacturing a through-hole wiring board according to claim 1, wherein the circuit conductor layer is formed using a conductive paste.
徴とする特許請求の範囲第１項記載のスルーホール配線
板の製造方法。(4) The method for manufacturing a through-hole wiring board according to claim 1, wherein the metal thin film layer is formed by a vacuum evaporation method.
とを特徴とする特許請求の範囲第１項記載のスルーホー
ル配線板の製造方法。(5) The method for manufacturing a through-hole wiring board according to claim 1, wherein the metal thin film layer is formed by a sputtering method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18404484A JPS6163088A (en) | 1984-09-03 | 1984-09-03 | Method of producing through hole circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18404484A JPS6163088A (en) | 1984-09-03 | 1984-09-03 | Method of producing through hole circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6163088A true JPS6163088A (en) | 1986-04-01 |
Family
ID=16146376
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18404484A Pending JPS6163088A (en) | 1984-09-03 | 1984-09-03 | Method of producing through hole circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6163088A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998007302A1 (en) * | 1996-08-09 | 1998-02-19 | Matsushita Electric Works, Ltd. | Method for plating independent conductor circuit |
| US6938875B2 (en) | 2003-04-25 | 2005-09-06 | Mitsubishi Denki Kabushiki Kaisha | Proportional solenoid valve |
-
1984
- 1984-09-03 JP JP18404484A patent/JPS6163088A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998007302A1 (en) * | 1996-08-09 | 1998-02-19 | Matsushita Electric Works, Ltd. | Method for plating independent conductor circuit |
| GB2321908A (en) * | 1996-08-09 | 1998-08-12 | Matsushita Electric Works Ltd | Method for plating independent conductor circuit |
| GB2321908B (en) * | 1996-08-09 | 2000-08-30 | Matsushita Electric Works Ltd | Process of plating on isolated conductor circuit |
| US6938875B2 (en) | 2003-04-25 | 2005-09-06 | Mitsubishi Denki Kabushiki Kaisha | Proportional solenoid valve |
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