JPS6155872A - Soldering structure of multiterminal - Google Patents

Soldering structure of multiterminal

Info

Publication number
JPS6155872A
JPS6155872A JP17882784A JP17882784A JPS6155872A JP S6155872 A JPS6155872 A JP S6155872A JP 17882784 A JP17882784 A JP 17882784A JP 17882784 A JP17882784 A JP 17882784A JP S6155872 A JPS6155872 A JP S6155872A
Authority
JP
Japan
Prior art keywords
terminals
solder
soldering
spacer
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17882784A
Other languages
Japanese (ja)
Inventor
鷲見 弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP17882784A priority Critical patent/JPS6155872A/en
Publication of JPS6155872A publication Critical patent/JPS6155872A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 皿韮上旦五里立… この発明はHIIAELマトリクス型ディスプレディス
プレィパネルリクス型ディスプレイパネルなどに形成さ
れた多数のW、膜状の端子と、この端子と対応する外部
のフレキシブルリード端子とを電気的及び機械的に接続
固着した半田付構造に関する。
[Detailed Description of the Invention] Tangoritatsu Saranijo... This invention relates to a large number of W, film-like terminals formed on a HIIAEL matrix type display panel, etc., and external terminals corresponding to these terminals. This invention relates to a soldering structure in which flexible lead terminals are electrically and mechanically connected and fixed.

従来立技上 ff1lj!ELや液晶のマトリクス型ディスプレイパ
ネルはマトリクス型の多数の電極の外部取出し用端子を
ガラス基板上に微小なピッチで一連に形成し、この多数
の各端子に別のフレキシブルリード基板に形成した端子
を半田付けして電極の外部取出しを行うのが一般的であ
る。
Traditional standing technique ff1lj! EL and liquid crystal matrix display panels have a large number of matrix-type electrode terminals formed in series at minute pitches on a glass substrate, and each of these many terminals has a terminal formed on a separate flexible lead substrate. It is common to take out the electrodes externally by soldering.

例えば薄IIELマトリクス型ディスプレイパネルの一
般的構造を第10図乃至第13図を参照して説明する。
For example, the general structure of a thin IIEL matrix type display panel will be explained with reference to FIGS. 10 to 13.

なお、第10図は断面図で、左半分はX方向の断面図を
、右半分はY方向の断面図を示す0図において、(1)
は透明なガラス基板、(2)はガラス基板(1)上に形
成されたマトリクス型EL素子、(3)はガラス基板(
1)上でEL素子(2)を気密封止するガラスの背面板
(カバーガラス)、(4)はEL素子(2)の電極外部
取出し用フレキシブルリード部材である。EL素子(2
)における(5)はガラス基板(1)上に1.’l’、
O,を蒸着法やスパッタ法でX方向に所定ピッチで多数
のストライプ状に形成した透明電極、(6)は透明電極
(5)上を覆うY2O3等の透明な第1絶縁眉、(7)
は第1絶縁眉(6)上に形成したZnS:Mn等の(螢
光体)発光層、(8)は発光層(7)上を覆うY2O3
等の透明な第2絶縁層、(9)は第2絶縁層(8)上に
透明電極(5)と直交するY方向に所定ピッチで多数の
ストライプ状に形成したAl蒸着膜による背面電極であ
る。
In addition, Fig. 10 is a cross-sectional view, the left half is a cross-sectional view in the X direction, and the right half is a cross-sectional view in the Y direction.
is a transparent glass substrate, (2) is a matrix type EL element formed on the glass substrate (1), and (3) is a glass substrate (
1) A glass back plate (cover glass) on which the EL element (2) is hermetically sealed, and (4) a flexible lead member for taking out the electrodes of the EL element (2) to the outside. EL element (2
) in (5) is 1. on the glass substrate (1). 'l',
(6) is a transparent first insulating layer such as Y2O3 that covers the transparent electrode (5); (7)
(8) is a light emitting layer (phosphor) such as ZnS:Mn formed on the first insulating layer (6), and (8) is a Y2O3 layer covering the light emitting layer (7).
The transparent second insulating layer (9) is a back electrode made of an Al vapor-deposited film formed on the second insulating layer (8) in a number of stripes at a predetermined pitch in the Y direction perpendicular to the transparent electrode (5). be.

EL素子(2)の各電極(5)、(9)の一端部はガラ
ス基板(1)の周辺部上まで延ばして形成され、この電
極端部の一部を横切る形で背面板(3)がエポキシ樹脂
等の絶縁シール材(10)を介してガラス基板(1)上
に固着され、その後背面Fi(3)とEL素子(2)の
間にシリコンオイル等の防湿材(1))が先議される。
One end of each electrode (5), (9) of the EL element (2) is formed to extend above the peripheral part of the glass substrate (1), and a back plate (3) is formed to cross a part of this electrode end. is fixed on the glass substrate (1) via an insulating sealant (10) such as epoxy resin, and then a moisture-proof material (1) such as silicone oil is placed between the back Fi (3) and the EL element (2). It will be discussed first.

フレキシブルリード部材(4)はフレキシブルな絶縁基
板(12)の裏面に多数の導電1!5i! (13)を
被着形成したもので、絶縁基板(12)の裏面周辺の導
電膜(13)  (以下第2端子(b)と称す)はガラ
ス基板(1)の上面周辺に微小ピッチで一連に並ぶ各電
極(5)、(9)の端部(以下第1端子(a)と称す)
と対応し、対応する第1、第2@子(a)、(b)の各
々が半田(14)を介して電気的及び機械的に接続固着
される。この半田付けは、例えば築13図に示すように
、第2端子(b)上に定量の予備半田(14’)を電気
メツキ法などで被着形成しておいて、この第2端子(b
)と第1端子(a)が予備半田(14”)を介して重な
るようガラス基板(1)上にフレキシブルリード部材(
4)を目合せして重ね、全体を均等の力で加圧して予備
半田(14’)を赤外線加熱で熔融させることにより行
われる(特公昭5G −2157号公報、特公昭59−
14872号公報)。
The flexible lead member (4) has a large number of conductive 1!5i! The conductive film (13) (hereinafter referred to as the second terminal (b)) around the back surface of the insulating substrate (12) is formed in a series at a minute pitch around the top surface of the glass substrate (1). The ends of each electrode (5) and (9) lined up (hereinafter referred to as the first terminal (a))
Correspondingly, each of the corresponding first and second @ elements (a) and (b) are electrically and mechanically connected and fixed via solder (14). This soldering is carried out by first depositing a certain amount of preliminary solder (14') on the second terminal (b) by electroplating or the like, as shown in Fig. 13, for example.
) and the first terminal (a) are placed on the glass substrate (1) so that the first terminal (a) overlaps with the preliminary solder (14”) interposed therebetween.
4) are aligned and stacked, the whole is pressurized with uniform force, and the preliminary solder (14') is melted by infrared heating (Japanese Patent Publication No. 5G-2157, Japanese Patent Publication No. 59-1982).
14872).

が ° しようとする問題φ 上記二端子(a)、(b)を良好に半田付けするために
予備半田(14’)を加熱溶融させる時に適当71静圧
を加えているが、この加圧力は、第1端子(a)及び第
2端子(b)が数百個もあり、半田付は部が長いことに
よって、ガラス基板(1)とフレキシブルリード部材(
4)の平行出しが困難なことや、フレキシブルリード部
材(4)が軟いことや、基板(1)  (12)の反り
などで場所によってバラツキがあって、加圧力が小さ過
ぎるところでは二端子(a)、(b)の接着強度不足、
導電不良が起き、一方加圧力が大き過ぎるところでは二
端子(a)、(b)の両側から第12図の鎖線で示すよ
うに食み出す半田量が多くなって、この食み出し半田(
14”)が隣接する端子間からの食み出し半田とショー
トすることがあった。このショート事故は端子ピンチが
最近0.4w+++以下と益々小さくなる傾向に伴い増
大し、製品の歩留りを悪くする大きな要因になっていた
。また上述のように二端子(a)、(b)の半田付けは
予備半田(14’)の加熱Rの加圧力制御が難しくて、
半田付作業性が悪く、半田付設備に高精度、高価なもの
を必要とした。
° Problem to be solved φ In order to properly solder the two terminals (a) and (b) above, an appropriate static pressure of 71 is applied when heating and melting the preliminary solder (14'), but this pressurizing force is , there are hundreds of first terminals (a) and second terminals (b), and since the soldering part is long, the glass substrate (1) and the flexible lead member (
4) are difficult to align, the flexible lead member (4) is soft, and the boards (1) and (12) are warped. Insufficient adhesive strength of (a) and (b),
Poor conductivity occurs, and on the other hand, in areas where the pressure is too large, a large amount of solder protrudes from both sides of the two terminals (a) and (b) as shown by the chain lines in Figure 12, and this protruding solder (
14") could cause a short circuit due to solder protruding from between adjacent terminals. This short circuit accident has increased as terminal pinches have recently become smaller and smaller, below 0.4W+++, and this has resulted in poor product yields. Also, as mentioned above, when soldering the two terminals (a) and (b), it was difficult to control the pressure applied to the heating R of the preliminary solder (14').
Soldering workability was poor, requiring high precision and expensive soldering equipment.

問題点を解決するための手段 本発明の上記問題点を解決する技術的手段は第1絶縁基
板上に微小ピンチで多数形成された第1端子と、第2絶
縁基板上に前記第1端子と対応して多数形成された第2
端子とを半田付けしたものにおいて、前記第1端子と第
2@子間の半田内に当該半田の食み出しを防止するスペ
ーサを埋設したことである。
Means for Solving the Problems A technical means for solving the above problems of the present invention is to provide a plurality of first terminals formed with minute pinches on a first insulating substrate, and a plurality of first terminals formed on a second insulating substrate. A correspondingly large number of second
In the device in which the terminals are soldered, a spacer is embedded in the solder between the first terminal and the second terminal to prevent the solder from protruding.

皿 この技術的手段によるスペーサは金属粒子、絶縁体粒子
などが通用され、これを第1、第2端子間に介在させて
第1、第2端子間の半田の食み出しを防止することによ
り、第1第2端子は常に一定厚の半田で接続されるので
、接触強度、導通性共に良好な半田付けが実行できる。
The spacer using this technical means is generally made of metal particles, insulator particles, etc., and is interposed between the first and second terminals to prevent solder from protruding between the first and second terminals. Since the first and second terminals are always connected with solder of a constant thickness, soldering with good contact strength and conductivity can be performed.

また第1、第2端子の半田付けは両者間の予備半田を加
圧加熱して行われるが、この時の加圧力を十分大きくし
てもスペーサにより二端子間から食み出す半田の量が抑
制されて隣接端子間のショート事故が無くなる。また半
田付は時の加圧力制御がスペーサにより容易になり、半
田付作業が容易になる。
In addition, the first and second terminals are soldered by applying pressure and heating to the preliminary solder between them, but even if the pressure is sufficiently increased, the amount of solder that protrudes from between the two terminals due to the spacer is small. This prevents short-circuit accidents between adjacent terminals. Furthermore, the spacer makes it easier to control the pressure during soldering, making the soldering work easier.

ユ」脳組 第1θ図の薄IQELマトリクス型ディスプレイパネル
の多端子半田付構造に本発明を通用した実施例を第1図
及び第2図に基づき説明する。
An embodiment in which the present invention is applied to a multi-terminal soldering structure of a thin IQEL matrix type display panel shown in Fig. 1[theta] of the brain assembly will be described with reference to Figs. 1 and 2.

なお、第1図は断面図で、左半分はX方向の断面図を、
右半分はY方向の断面図を示す。この実施例の特徴は、
第1端子(a)と第2端子(b)端の半田(14)内に
、この半田(14)の加熱、加圧による食み出しを防止
する粒径りのスペーサ(15)を埋設したことである。
Note that Figure 1 is a cross-sectional view, and the left half is a cross-sectional view in the X direction.
The right half shows a cross-sectional view in the Y direction. The features of this embodiment are:
In the solder (14) at the ends of the first terminal (a) and the second terminal (b), a spacer (15) with a particle diameter of about 100 mm is embedded to prevent the solder (14) from protruding due to heating and pressurization. That's true.

尚、第1図及び第2図の第10図と同一部分には同一参
照符号を付して説明は省略する。
Note that the same parts in FIGS. 1 and 2 as in FIG. 10 are designated by the same reference numerals, and explanations thereof will be omitted.

スペーサ(15)は半ド1とのなじみ性の良い金属粒子
や、ガラス等の絶縁体粒子、又は絶縁体粒子の表面に金
や錫などの半田となじみ易い金属膜をコーティングした
もので、一定粒径のものが一組の第1、第2端子(a)
、(b)間に複数個埋設される。このスペーサ(15)
の粒径は第1、第2端子(a)、(b)が良好に半田付
けされる時の半田厚(約20μl1))の大きさに設定
される。このようなスペーサ(15)を用いた第1、第
2端子(a)、(b)の半田付は例えば第3図乃至第6
図、又は第7図乃至第9図に示す要領で行われる。
The spacer (15) is made of metal particles that are compatible with the solder 1, insulating particles such as glass, or coated with a metal film such as gold or tin that is compatible with solder on the surface of the insulating particles. A set of first and second terminals (a) with particle size
, (b). This spacer (15)
The particle size is set to the solder thickness (approximately 20 μl) when the first and second terminals (a) and (b) are soldered well. Soldering of the first and second terminals (a) and (b) using such a spacer (15) is performed as shown in FIGS. 3 to 6, for example.
This is carried out in the manner shown in FIG.

第3図乃至第6図の場合を説明すると、先ず第3図に示
すようにフレキシブルリード部材(4)の各第1端子(
b)上に予備半田(14°)を形成して、この第1端子
(b)を多数のスペーサ(15)が点在するフラットな
台(16)上に押し付けてから引き上げる。すると第4
図に示すように第1端子(b)の予備半田(14’)に
スペーサ(15)が少し食い込んで付着する。このとき
、フレキシブルな絶縁基板(12)にもスペーサ(15
)が軽く付着することがある。いまスペーサ(15)が
金属粒子又は絶縁体粒子表面に金属をコーティングした
粒子のいわゆる導電粒子であるとすると、次に第5図に
示すように絶縁基板(12)に付着したスペーサ(15
)のみをエアーブロー法等で除去してから、第6図に示
すようにガラス基板(1)の第1端子(a)上に対応す
る第2端子(b)をスペーサ(15)と予備半田(14
’)を介し重ね合せる。そして、予備半田(14“)を
加圧しながら赤外線ランプ等で加熱して溶融させて、第
1、第2端子(a)、(b)を半田付けする。
To explain the cases shown in FIGS. 3 to 6, first, as shown in FIG. 3, each first terminal (
b) Form a preliminary solder (14°) on top, press this first terminal (b) onto a flat platform (16) dotted with a number of spacers (15), and then pull it up. Then the fourth
As shown in the figure, the spacer (15) slightly bites into and adheres to the preliminary solder (14') of the first terminal (b). At this time, spacers (15) are also placed on the flexible insulating substrate (12).
) may be slightly attached. Assuming that the spacer (15) is a so-called conductive particle, which is a metal particle or an insulator particle whose surface is coated with a metal, then the spacer (15) attached to the insulating substrate (12) as shown in FIG.
) only by an air blow method, etc., and then connect the corresponding second terminal (b) on the first terminal (a) of the glass substrate (1) with a spacer (15) and preliminary solder as shown in Fig. 6. (14
'). Then, the preliminary solder (14'') is heated and melted with an infrared lamp or the like while being pressurized, and the first and second terminals (a) and (b) are soldered.

この半田付は時の加圧力はスペーサ(15)が圧潰され
ない程度の大きさでよく、この加圧力でスペーサ(15
)は溶融した予備半田(14“)内に入り、第1、第2
端子(a)、(b)間の半田厚りがスペーサ(15)の
粒径以下にならないように規制する。この半田厚りの規
制により第1、第2端子(a)、(b)の両側からの半
田食み出し量が抑制されて隣接する端子間のショート事
故発生が皆無となる。また第1、第2端子(a)、(b
)は一定W、Dの半田(14)で接続されるため、接着
強度、導通性共に良好に半田付けされる。更に、この半
田付は作業において、予備半H−1(14’)の加熱時
の加圧力をスペーサ(15)が圧潰されない程度に十分
大きくすることができて微妙な加圧力制御が不必要とな
り、而も加圧力に場所的なバラツキが生じても問題無い
ので、半田付は作業が容易で且つ簡単な設備で実行でき
る。またスペーサ(15)に導電粒子を使用すれば、こ
のスペーサ(15)も第1、第2端子(a)、(b)の
電気的接続を行うので、第1、第2端子(a)、(b)
間の導電性が尚更良好になる。
The pressure during this soldering should be large enough to prevent the spacer (15) from being crushed;
) enters the melted preliminary solder (14"), and the first and second
The solder thickness between the terminals (a) and (b) is controlled so that it does not become less than the grain size of the spacer (15). By regulating the solder thickness, the amount of solder protruding from both sides of the first and second terminals (a) and (b) is suppressed, thereby eliminating the occurrence of short-circuit accidents between adjacent terminals. Also, the first and second terminals (a), (b
) are connected with solder (14) of constant W and D, so that the soldering has good adhesive strength and conductivity. Furthermore, during this soldering process, the pressure applied when heating the preliminary half H-1 (14') can be made sufficiently large to the extent that the spacer (15) is not crushed, making delicate pressure control unnecessary. Moreover, since there is no problem even if there are local variations in the applied pressure, soldering is easy and can be performed with simple equipment. Furthermore, if conductive particles are used for the spacer (15), this spacer (15) also connects the first and second terminals (a) and (b), so the first and second terminals (a) and (b)
The conductivity between the two becomes even better.

次に第7図乃至第9図の場合を説明する。先ず第7図に
示すように第2端子(b)の予備半田(14’)上にフ
ラックス(17)を塗布する。
Next, the cases shown in FIGS. 7 to 9 will be explained. First, as shown in FIG. 7, flux (17) is applied onto the preliminary solder (14') of the second terminal (b).

フラックス(17)は第1.第2端子(a)、(b)の
半田付は性をより良好にするもので、十分に粘着性のあ
るものが使用される。次に第2端子(b)側を上にした
フレキシブルリード部材(4)の上方よりスペーサ(1
5)をフラ。
Flux (17) is the first. The soldering of the second terminals (a) and (b) is to improve the soldering properties, and a material with sufficient adhesiveness is used. Next, the spacer (1) is inserted from above the flexible lead member (4) with the second terminal (b) side facing up.
5) Hula.

クス(17)に向は散布して、第8図に示すようにフラ
ックス(17)上にその粘着力を利用してスペーサ(1
5)を付着させる0次にスペーサ(15)が導電粒子の
場合はフラックス(17)上以外に付着したスペーサ(
15)をエアープロー法等で除去しておいて、第9図に
示すように第1、第2端子(a)、(b)をスペーサ(
15)、フラックス(17) 、予備半01 (14’
)を介して重ね合せて加圧加熱する。この半田付けはフ
ラックス(17)が加熱により蒸発するので、結果的に
第6図の半田付けと同様に実行される。
Spray the spacer (17) onto the flux (17) and use its adhesive force to place the spacer (17) on the flux (17) as shown in Figure 8.
If the zero-order spacer (15) to which 5) is attached is a conductive particle, the spacer (15) attached to a surface other than the flux (17) may be
15) using an air blow method, etc., and connect the first and second terminals (a) and (b) with spacers (as shown in Figure 9).
15), Flux (17), Reserve Half 01 (14'
) and heat under pressure. This soldering is performed in the same way as the soldering shown in FIG. 6, since the flux (17) is evaporated by heating.

上記スペー−!) (15)にガラスやセラミック等の
絶縁粒子を用いた場合は、上記製造工程におけるエアー
ブローによるスペーサ選択除去工程は必ずしも必要でな
い。
Above space! ) When insulating particles such as glass or ceramic are used in (15), the step of selectively removing spacers by air blowing in the above manufacturing process is not necessarily necessary.

またスペーサ(15)はガラス基板(1)上の第1端子
(a)上に付着させておいて、第1)第2端子(a)、
(b)を半田接続するようにしてもよい。
Further, the spacer (15) is attached on the first terminal (a) on the glass substrate (1), and the first) second terminal (a),
(b) may be connected by soldering.

尚、本発明はWIIQELマトリクス型ディスプレディ
スプレィパネル以外スプレイパネルやプラズ、ディスプ
レイパネルなどの多婦子半田付構造においても同様に適
用し得る。
The present invention can be similarly applied to polygon soldering structures such as spray panels, plasma panels, display panels, etc. other than the WIIQEL matrix type display panel.

光ユニ立米 本発明によれば微小ピッチで多数並び第1端圧加熱によ
り半田付けしても、スペーサによって両端子m1の半田
の食み出しによる端子間のショート事故が無くなり、而
も二端子は一定厚の半田で常に良好に且つ均等の強さで
半田付けされる。
According to the present invention, even if a large number of optical units are arranged at a minute pitch and soldered by first end pressure heating, there will be no short-circuit between the terminals due to solder protruding from both terminals m1 due to the spacer. Soldering is always done well and with uniform strength using a constant thickness of solder.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の半田付構造を有する薄1)ELマトリ
クス型ディスプレイパネルの断面図で、左半分は、X方
向の断面図、右半分はY方向の断面図、第2図は第1図
の71−T、線に沿う拡大断面図、第3図乃至刀6図と
第7図乃至第9図はそれぞれ本発明の半田付構造の具体
的組立順序の二側を説明するための各断面図である、第
1θ図は一般的薄膜ELマトリクス型ディスプレイパネ
ルの断面図で、左半分はX方向の断面図、右半分はY方
向の断面図、第1)図は第10図のディスプレイパネル
の一部平面図、第12図は第10図のT!  T2rA
に沿う拡大断面図、第13図は@12図の半田付前の断
面図である。 (L ) −第1絶縁基板(ガラス基板)、(12)−
・−・第2絶縁基板、(a ) ・−第1f4子、(b
 ) ・−・fS2端子、(1,1)・−・半田、(1
5) −・−・スペーサ。
FIG. 1 is a cross-sectional view of a thin 1) EL matrix type display panel having a soldering structure according to the present invention, the left half is a cross-sectional view in the X direction, the right half is a cross-sectional view in the Y direction, and FIG. 71-T in the figure, an enlarged cross-sectional view taken along the line 71-T, and FIGS. The cross-sectional view, Figure 1θ, is a cross-sectional view of a general thin film EL matrix type display panel, the left half is a cross-sectional view in the X direction, the right half is a cross-sectional view in the Y direction, and the 1st) figure is a cross-sectional view of the display panel in Figure 10. A partial plan view of the panel, Figure 12, is the T of Figure 10! T2rA
FIG. 13 is an enlarged cross-sectional view along FIG. 12 before soldering. (L) -First insulating substrate (glass substrate), (12)-
・-・Second insulating substrate, (a) ・-1st f4 child, (b
) ・-・fS2 terminal, (1, 1)・-・Solder, (1
5) −・−・Spacer.

Claims (1)

【特許請求の範囲】[Claims] (1)第1絶縁基板上に微小ピッチで多数形成された第
1端子と、第2絶縁基板上に前記第1端子と対応して多
数形成された第2端子とを半田付けしたものにおいて、
前記第1端子と第2端子間の半田内に当該半田の食み出
しを防止するスペーサを埋設したことを特徴とする多端
子の半田付構造。
(1) A device in which a large number of first terminals formed at a minute pitch on a first insulating substrate and a large number of second terminals formed on a second insulating substrate corresponding to the first terminals are soldered,
A multi-terminal soldering structure, characterized in that a spacer is embedded in the solder between the first terminal and the second terminal to prevent the solder from protruding.
JP17882784A 1984-08-28 1984-08-28 Soldering structure of multiterminal Pending JPS6155872A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17882784A JPS6155872A (en) 1984-08-28 1984-08-28 Soldering structure of multiterminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17882784A JPS6155872A (en) 1984-08-28 1984-08-28 Soldering structure of multiterminal

Publications (1)

Publication Number Publication Date
JPS6155872A true JPS6155872A (en) 1986-03-20

Family

ID=16055353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17882784A Pending JPS6155872A (en) 1984-08-28 1984-08-28 Soldering structure of multiterminal

Country Status (1)

Country Link
JP (1) JPS6155872A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6431126A (en) * 1987-07-28 1989-02-01 Optrex Kk Terminal connecting structure
JPH0329831U (en) * 1989-07-28 1991-03-25
JPH0554245U (en) * 1991-12-25 1993-07-20 レンゴー株式会社 Packing box for powder

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6431126A (en) * 1987-07-28 1989-02-01 Optrex Kk Terminal connecting structure
JPH0329831U (en) * 1989-07-28 1991-03-25
JPH0554245U (en) * 1991-12-25 1993-07-20 レンゴー株式会社 Packing box for powder

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