JPS6152838U - - Google Patents
Info
- Publication number
- JPS6152838U JPS6152838U JP13816684U JP13816684U JPS6152838U JP S6152838 U JPS6152838 U JP S6152838U JP 13816684 U JP13816684 U JP 13816684U JP 13816684 U JP13816684 U JP 13816684U JP S6152838 U JPS6152838 U JP S6152838U
- Authority
- JP
- Japan
- Prior art keywords
- mixer
- output
- control circuit
- local oscillator
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Superheterodyne Receivers (AREA)
Description
第１図はこの考案の一実施例を示すブロツク図
、第２図は従来の出力制御回路のブロツク図であ
る。
図において１は直流電源、２は局部発振器、３
はミキサ、４は方向性結合器、５はパワーメータ
、６は抵抗、７は制御回路、８は誤差増幅器、９
は基準電源である。なお、図中同一符号は同一ま
たは相当部分を示す。
FIG. 1 is a block diagram showing an embodiment of this invention, and FIG. 2 is a block diagram of a conventional output control circuit. In the figure, 1 is a DC power supply, 2 is a local oscillator, and 3
is a mixer, 4 is a directional coupler, 5 is a power meter, 6 is a resistor, 7 is a control circuit, 8 is an error amplifier, 9
is the reference power supply. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
の制御回路の出力端に接続された局部発振器と、
その局部発振器に接続されたミキサと、一端が上
記ミキサの出力端につながり、他端が接地してあ
る抵抗と、二つの入力端のうちの一方が上記ミキ
サの出力端に、また、他方の入力端が基準電源に
つながり、かつその出力端が上記の制御回路につ
ながつている誤差増幅器とからなる局部発振器出
力回路。 A DC power supply, a control circuit connected to it, a local oscillator connected to the output terminal of the control circuit,
A mixer connected to the local oscillator, a resistor whose one end is connected to the output end of the mixer and the other end is grounded, one of the two input ends is connected to the output end of the mixer, and the other end is connected to the output end of the mixer. A local oscillator output circuit consisting of an error amplifier whose input terminal is connected to a reference power supply and whose output terminal is connected to the above-mentioned control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13816684U JPS6152838U (en) | 1984-09-12 | 1984-09-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13816684U JPS6152838U (en) | 1984-09-12 | 1984-09-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6152838U true JPS6152838U (en) | 1986-04-09 |
Family
ID=30696562
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13816684U Pending JPS6152838U (en) | 1984-09-12 | 1984-09-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6152838U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006203489A (en) * | 2005-01-20 | 2006-08-03 | Matsushita Electric Ind Co Ltd | High frequency signal receiver, integrated circuit for use therein, and electronic apparatus employing high frequency signal receiver |
-
1984
- 1984-09-12 JP JP13816684U patent/JPS6152838U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006203489A (en) * | 2005-01-20 | 2006-08-03 | Matsushita Electric Ind Co Ltd | High frequency signal receiver, integrated circuit for use therein, and electronic apparatus employing high frequency signal receiver |