JPS6151697A - Data storing in nonvolatile memory - Google Patents
Data storing in nonvolatile memoryInfo
- Publication number
- JPS6151697A JPS6151697A JP59173822A JP17382284A JPS6151697A JP S6151697 A JPS6151697 A JP S6151697A JP 59173822 A JP59173822 A JP 59173822A JP 17382284 A JP17382284 A JP 17382284A JP S6151697 A JPS6151697 A JP S6151697A
- Authority
- JP
- Japan
- Prior art keywords
- data
- ram
- volatile memory
- area
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Static Random-Access Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
【発明の詳細な説明】
並業上の利用分計
本発明に不揮発注メモリへのデータストア方法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for storing data in a non-volatile order memory.
従来の技術
一般に、電ＩＭ断時においてもデータの保証？行う必要
があるシステムにおいてに、）くツナ１ツノ（ツクアッ
プ方式や、不揮発性メモ１ＪｋｌＦ４う方ｆ：、などが
めるが、メンテナンスフリーと云う条件がある場会には
、不揮発注メモリで対処しなけ２ｔばならない。その際
不揮発性メモリといつ℃も、そｎぞＢｌ爵性が芦なり、
一度〕゛き込み動作をしてから矢の沓き込み動作をする
筐での時間、すなわちライトサクルタイムの非常に長い
（１０ｍｓ以上）素子が用いらｎる場仕が多い。Conventional technology In general, is data guaranteed even in the event of power outage? In a system where it is necessary to perform a It must be 2T.At that time, non-volatile memory and temperature are also important.
There are many situations in which devices are used that have a very long write cycle time (10 ms or more), that is, the time it takes for the arrow to enter the arrow once in the housing.
発明が解決しようとする問題点
ライトアクセスタイムの長いメモリの場合における通常
の処理では、１００バイトの舊き込み金行うとすると、
１０１） （バイト） ｘ １ ｏ （ｍｓ／バイ））
＝：１ｓｅｃとなり時間が非常にかかりすぎるものとな
っている。ｌまたデータを書き込んでいる途中に、再度
新たなデータケ書き込む必要性が生じ７’Ｃ楊合には、
前回と同一エリアに二度書き込むことになり時間的にロ
スを生じる間聰ヲ有している。Problems to be Solved by the Invention Assuming that a 100-byte deposit is made in normal processing for a memory with a long write access time,
101) (byte) x 1 o (ms/byte))
=: 1 sec, which is extremely time consuming. lAlso, while writing data, it becomes necessary to write new data again, and at 7'C,
This results in writing twice in the same area as the previous time, resulting in a time loss.
本発明は不揮発性を保証するために用いらｎるライトア
クセスタイムの長い不揮発注メモリを用いた場合の処理
全短くするようにしたものである。The present invention is designed to shorten the total processing time when a non-volatile memory having a long write access time is used to ensure non-volatility.
間聰点を解決するための手段
不揮発性を保証するために用いらｎるライトアクセスタ
イムの長い不揮発性メモリと共に、このメモリと同一の
フォーマットを有するＲＡＭ （５ンダムアクセスメモ
リで、以下’ＲＡＭと云う）を設け、このＲＡＭに対し
てアクセスを行うプログラムと、ＲＡＭと不揮発性メモ
リ間のデータ転送を行うプログラムと七分離し、このデ
ータ転送プログラムにおいてＵＲＡＭエリアと不揮発性
メモリエリアの先Ｖ１より比較し、不一致点（変更点）
のエリアのみ？不揮発性メモリにストアすることにより
、不Ｕ発性メモ＋３ｇ）４込みバイト数を最小、すなわ
ち処理時間を最小としｍものでめる。Means for resolving the gap point In addition to non-volatile memory with a long write access time used to ensure non-volatility, RAM (random access memory, hereinafter referred to as 'RAM') has the same format as this memory. The program that accesses this RAM is separated from the program that transfers data between RAM and non-volatile memory, and in this data transfer program, the URAM area and the non-volatile memory area are compared starting from V1. and discrepancies (changes)
Area only? By storing in non-volatile memory, the number of non-volatile memo + 3g) 4 included bytes can be minimized, that is, the processing time can be minimized.
実施例 以下図に基いて本発明の一実施例全詳述する。Example An embodiment of the present invention will be described in full detail below with reference to the drawings.
第１図は機能溝成図を示し友もので、１は１ｌｌ）ＩＩ
御部で通常のアプリケーションモジュールエフなってい
る。＋ ２にＲＡＭで、このＲＡ Ｍ ２は不揮発性メ
モリ（Ｎ、Ｖ、ＲＡＭ）３と同一のフォーマットをもっ
たものが用意さｎるが、プログラムのアクセスには何等
制限がなく、電源断時にはそのデータは保証さしない。Figure 1 shows the functional groove diagram, and 1 is 1ll) II
The control section is a normal application module. + 2 is RAM, and this RAM 2 has the same format as non-volatile memory (N, V, RAM) 3, but there are no restrictions on program access, and when the power is turned off, The data is not guaranteed.
４は比較手段、５は不一致データ１バイトコピ一手段、
６はタイマ一部でおる。こｎら５，６の手段にＲＡＭ
２の内接？不揮発性メモリ３に移すプログラムによって
実行さｎ、こｆ′Ｌハブログラム上でライトアクセスタ
イムに制限がある。4 is a comparison means, 5 is a means for copying 1 byte of mismatched data,
6 is a part of the timer. RAM for these 5 and 6 methods
Inscribed in 2? There is a limit to the write access time on the f'L hub program executed by the program transferred to the non-volatile memory 3.
以上のような不揮発性メモリシステムにおいて、制御部
１を介して行なわｎるＲＡＭ２に対するデータの処理に
、ライトアクセスタイムＩＣは制限を受けないプログラ
ムによって行なわｎる。このＲＡＭ２に書き込ｎｆｃデ
ータを不揮発性メモリ３に移す場合に、第２図のフロー
チャート及び第３図で示すように比較手段４によってＲ
ＡＭエリアと不揮発性メモリエリアの先願より順欠比較
し、両者の不一致点（変更点）のデータ見見時にエリア
１バイト’ｉＲＡＭｊり不揮発性メモリにストアし、ラ
イトアクセスタイム（１１）ｍｓ）後に不一致データ発
見時に上記処理を繰返してすべて一致しｔ時点にて処理
終了となる。このため１ ＋１ｎｎｓＷＡＩＴ中にＪ［
たにＲＡＭエリアにデータが杏かｎでも、１回のシーケ
ンスで処理が行なわｎ、℃源断復帰時には不揮発性メモ
リの同容はＲＡＭにコピーさＣる。In the nonvolatile memory system as described above, the write access time IC performs data processing in the RAM 2 via the control unit 1 using a program that is not subject to any restrictions. When transferring the written NFC data to the RAM 2 to the non-volatile memory 3, the comparing means 4 performs R as shown in the flowchart of FIG. 2 and FIG.
Compare AM area and non-volatile memory area sequentially from the previous application, and when looking at the data of discrepancies (changes) between the two, save 1 byte of area 'iRAMj and store it in non-volatile memory, write access time (11) ms) Later, when unmatched data is found, the above process is repeated, and when all data match, the process ends at time t. Therefore, J[
Even if there is only a small amount of data in the RAM area, processing is performed in one sequence, and when the power is turned off and the data is restored, the same content in the non-volatile memory is copied to the RAM.
犯４図は２バイトの計測データ＋１３５ Ｄ Ｈが１＋
３６５ Ｈとなつｆｃ場会の例？示したもので、ＲＡ
Ｍ２と不揮発性メモリ３のエリアゲバイト比較するが、
その際２バイト七七の１１不揮発性メモリ３にストアす
るものではなく、５（）Ｈ→６５１［（の１バイトのみ
ストアする。こルによって処理時間の短縮２５士ってい
る。Crime 4 figure is 2 bytes of measurement data + 135 D H is 1 +
365 H and Natsu fc venue example? As shown, RA
Comparing the area size bytes of M2 and non-volatile memory 3,
At this time, instead of storing 2 bytes in the 11 non-volatile memory 3, only 1 byte of 5()H→651[() is stored.This reduces the processing time by 25%.
Ｉ；ｇ５図ぼ、例えば１００バイトの内容がＦＦのデー
タｔすべて０（）に変更すべく不揮発性メモリにストア
処理中、５０バイト時点にてＲＡＭＶ）１７’３容が８
８になつ九場せを示したものである。このような場合一
般には第５図ｉ）で示すようＦＦの内容ｆ ＋ｌ Ｏに
するのに１０（）バイト、そｎｋ史に８８にするのに１
００バイトの計２００バイトの変更が必要となるが、本
発明においては毎回両エリアの先頭よυ比較し並行処理
ができるため第５図ｔｂ＋で示すように５（）バイトの
途中でＲＡＭがすべて８８となったとしても、５０バイ
トにあと１００バイト力Ω算し之計１５（）バイトです
む。I; g5 figure, for example, 100 bytes of FF data t is being stored in non-volatile memory to change to all 0(), and at 50 bytes RAMV)17'3 content is 8
This shows the 9th stage of the 8th year. In such a case, generally, as shown in Figure 5 i), it takes 10() bytes to make the FF content f+lO, and 1 to make it 88.
00 bytes, a total of 200 bytes, but in the present invention, since parallel processing can be performed by comparing the beginning of both areas every time, the RAM is completely used up in the middle of 5() bytes, as shown by tb+ in Figure 5. Even if it becomes 88, the remaining 100 bytes will be added to the 50 bytes, resulting in a total of 15 () bytes.
発明の効果
以上本発明によｎばＲＡＭと不揮発性メモリの両エリア
ｔバイト比較し、不一致の１バイトのみ不揮発性メモリ
にストアするため処理時間が短縮さＣる。また不揮発性
メモリにストア処理中、ＲＡＭが変更さ几ても毎回両エ
リアの先頭より比較するため並行処理が可能となる。ま
たストア処理終了時には、データはすべて一致している
のでストア後のチェックに不要となる等の効果を有する
。Effects of the Invention According to the present invention, processing time is shortened because t bytes of both areas of the RAM and nonvolatile memory are compared and only the one byte that does not match is stored in the nonvolatile memory. Furthermore, even if the RAM is changed during the storage process to the nonvolatile memory, parallel processing is possible because the comparison is made from the beginning of both areas each time. Furthermore, since all the data match when the store process is finished, there is no need for post-store checking.
第１図は本発明の機能構成図、第２図に本発明のフロー
チャート図、第３図〜第５図に夫々説明□
のためのメモリ空間の概略図である。
１は制御部、２はＲＡＭ、３は不揮発性メモリ、４は比
較手段、５は不一致データ１バイトコピ一手段。
６Ｃ
第３図
第４図FIG. 1 is a functional configuration diagram of the present invention, FIG. 2 is a flowchart diagram of the present invention, and FIGS. 3 to 5 are schematic diagrams of memory spaces for explanation, respectively. 1 is a control unit, 2 is a RAM, 3 is a non-volatile memory, 4 is a comparison means, and 5 is a means for copying 1 byte of mismatched data. 6C Figure 3 Figure 4
Claims (1)
制御部とを備えたシステムに於て、前記不揮発性メモリ
と同一フォーマットを有するＲＡＭを設け、このＲＡＭ
に対するアクセスはライトサイクルタイムとは無関係に
行うと共に、ＲＡＭに書き込れたデータを不揮発性メモ
リに転送時は、ＲＡＭと不揮発性メモリの両エリアの先
頭より比較し、不一致点のエリアのみを不揮発性メモリ
にストアするようにしたことを特徴とする不揮発性メモ
リへのデータストア方法。In a system equipped with a non-volatile memory having a relatively long write cycle time and a control section, a RAM having the same format as the non-volatile memory is provided, and this RAM
Access is performed regardless of the write cycle time, and when data written in RAM is transferred to non-volatile memory, it is compared from the beginning of both areas of RAM and non-volatile memory, and only the area where there is a mismatch is transferred to non-volatile memory. A method for storing data in a non-volatile memory, characterized in that data is stored in a static memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59173822A JPS6151697A (en) | 1984-08-21 | 1984-08-21 | Data storing in nonvolatile memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59173822A JPS6151697A (en) | 1984-08-21 | 1984-08-21 | Data storing in nonvolatile memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6151697A true JPS6151697A (en) | 1986-03-14 |
Family
ID=15967789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59173822A Pending JPS6151697A (en) | 1984-08-21 | 1984-08-21 | Data storing in nonvolatile memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6151697A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63168755A (en) * | 1987-01-06 | 1988-07-12 | Arimura Giken Kk | Backup system for ic card |
| EP0843112A2 (en) | 1996-11-19 | 1998-05-20 | Aichi Kikai Kogyo Kabushiki Kaisha | Speed-change operating device for automated mechanical gearbox |
| US5970811A (en) * | 1997-08-15 | 1999-10-26 | Aichi Kikai Kogyo Kabushiki Kaisha | Automatic speed-change apparatus for a gear transmission |
| EP1001193A2 (en) | 1998-11-13 | 2000-05-17 | Aichi Kikai Kogyo Kabushiki Kaisha | Automatic speed-change selector apparatus for a gear transmission |
| WO2006003781A1 (en) * | 2004-06-30 | 2006-01-12 | Pioneer Corporation | Backup device, and car-mounted device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50131723A (en) * | 1974-04-04 | 1975-10-18 | ||
| JPS5279630A (en) * | 1975-12-25 | 1977-07-04 | Toshiba Corp | Data processing unit |
| JPS54156442A (en) * | 1978-05-31 | 1979-12-10 | Toshiba Corp | Data write-in method ror rewritable non-volatile semiconductor memory device |
| JPS5870491A (en) * | 1981-10-21 | 1983-04-26 | Nec Corp | Integrated circuit device |
| JPS58215795A (en) * | 1982-06-08 | 1983-12-15 | Toshiba Corp | Non-volatile memory device |
-
1984
- 1984-08-21 JP JP59173822A patent/JPS6151697A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50131723A (en) * | 1974-04-04 | 1975-10-18 | ||
| JPS5279630A (en) * | 1975-12-25 | 1977-07-04 | Toshiba Corp | Data processing unit |
| JPS54156442A (en) * | 1978-05-31 | 1979-12-10 | Toshiba Corp | Data write-in method ror rewritable non-volatile semiconductor memory device |
| JPS5870491A (en) * | 1981-10-21 | 1983-04-26 | Nec Corp | Integrated circuit device |
| JPS58215795A (en) * | 1982-06-08 | 1983-12-15 | Toshiba Corp | Non-volatile memory device |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63168755A (en) * | 1987-01-06 | 1988-07-12 | Arimura Giken Kk | Backup system for ic card |
| EP0843112A2 (en) | 1996-11-19 | 1998-05-20 | Aichi Kikai Kogyo Kabushiki Kaisha | Speed-change operating device for automated mechanical gearbox |
| US5970811A (en) * | 1997-08-15 | 1999-10-26 | Aichi Kikai Kogyo Kabushiki Kaisha | Automatic speed-change apparatus for a gear transmission |
| EP1001193A2 (en) | 1998-11-13 | 2000-05-17 | Aichi Kikai Kogyo Kabushiki Kaisha | Automatic speed-change selector apparatus for a gear transmission |
| US6286380B1 (en) | 1998-11-13 | 2001-09-11 | Aichi Kikai Kogyo Kabushiki Kaisha | Automatic speed-change apparatus for a gear transmission |
| WO2006003781A1 (en) * | 2004-06-30 | 2006-01-12 | Pioneer Corporation | Backup device, and car-mounted device |
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