JPS6150363A - Ohmic electrode - Google Patents

Ohmic electrode

Info

Publication number
JPS6150363A
JPS6150363A JP17194384A JP17194384A JPS6150363A JP S6150363 A JPS6150363 A JP S6150363A JP 17194384 A JP17194384 A JP 17194384A JP 17194384 A JP17194384 A JP 17194384A JP S6150363 A JPS6150363 A JP S6150363A
Authority
JP
Japan
Prior art keywords
layer
metal layer
electrode
type
ingaasp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17194384A
Other languages
Japanese (ja)
Inventor
Kenichi Matsuda
賢一 松田
Atsushi Shibata
淳 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17194384A priority Critical patent/JPS6150363A/en
Publication of JPS6150363A publication Critical patent/JPS6150363A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/452Ohmic electrodes on AIII-BV compounds

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To form a non-alloyed ohmic electrode having a low-contact resistance by a method wherein a first metal layer consisting of a P type or N type impurity metal layer, a second metal layer consisting of a barrier metal layer and a third metal layer consisting of an electrode parent material layer are laminated in order on the compound semiconductor substrate and a thermal treatment is performed. CONSTITUTION:A Zn layer 13, which is used as the impurity metal layer, a Cr layer 14, which is used as the barrier metal layer and an Au layer 15, which is used as the electrode parent material layer, are evaporated in order on a semiconductor laser substrate 11 and a thermal treatment is performed. By this thermal treatment, Zn is diffused in the InGaAsP layer 11, a high-concentration Zn doped layer is formed on the surface of the InGaAsP layer 11 and the mutual diffusion between the Au layer 15 and the InGaAsP layer 11 is stopped by the Cr layer 14. Therefore, an alloy layer is not formed. Accordingly, there is no possibility that Au is diffused in a P type InP confinement layer 16 and an InGaAsP active layer 17. The contact resistance of the ohmic electrode formed in such a way becomes lower.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は化合物半導体基板上に形成されたオーミック電
極に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an ohmic electrode formed on a compound semiconductor substrate.

従来例の構成とその問題点 従来、p型1nPもしくけp型rnGのムsP基板に対
して、コンタクト抵抗の低いオーミック電極を得る方法
としては、合金化電極を用いるものが多かった。これは
、主にムUを電極母材として、これにZn、Bθ等のp
型不純物金属を10%程度含有させた金属層を基板上に
蒸着した後、熱処理を施して合金化反応を生じさせるも
のである。この合金化反応によって基板のIn、P等と
電極母材のムUが相互拡散をし、ムu3In、ムu2P
5等よりなる合金層が形成される。この合金層およυ・
その直下の基板結晶層中に多(の不純物金属原子が含ま
れているので、電極と基板間のフンタクト抵抗は低くな
る。このような合金化電極を半導体レーザに適用した場
合の断面図を第1図に示す。第1図において、電極母材
のAu層1とp型InG&AgP層2の界面に合金層3
が存在している。しかし、半導体レーザの電極として、
このような合金化電極を用いると動作中にAuがさらに
基板結晶中を拡散していき、やがてはp型InP閉込め
層4を突き抜けてrnGaAsP活性層6に達する。A
uが活性層5にまで達すると半導体レーザは急速に劣化
をする。ここで、本発明との直接的な関係はないが、5
in2膜6け電極ストライブを形成するだめのもので、
れ型1nP層7、p型InP層8け埋込み層であり、n
型InP基板9上にはムu−3n電極1゜が形成されて
いる。このような人Uの侵入による特性の劣化は、半導
体レーザに限らず多くの化合物半導体デバイスにおいて
観測されるものであムこのような特性の劣化を防ぐため
に用いられてきた第2の従来例さしては、ムUと基板の
間に相互拡散を防止するバリア金属を挿入する方法があ
る。バリア金属としてはCr、Ti等が用いられる。
Conventional Structures and Problems Conventionally, alloyed electrodes have often been used to obtain ohmic electrodes with low contact resistance for p-type 1nP or p-type rnG musP substrates. This is mainly done by using MuU as the electrode base material, and adding P such as Zn and Bθ to it.
After a metal layer containing about 10% of type impurity metal is deposited on a substrate, heat treatment is performed to cause an alloying reaction. Through this alloying reaction, In, P, etc. of the substrate and MuU of the electrode base material interdiffuse, and Mu3In and Mu2P
An alloy layer consisting of 5, etc. is formed. This alloy layer and υ・
Since a large number of impurity metal atoms are contained in the substrate crystal layer immediately below, the direct resistance between the electrode and the substrate is low.The cross-sectional view when such an alloyed electrode is applied to a semiconductor laser is shown in Fig. 1. In FIG. 1, an alloy layer 3 is formed at the interface between the Au layer 1 of the electrode base material and the p-type InG&AgP layer 2.
exists. However, as an electrode for a semiconductor laser,
When such an alloyed electrode is used, Au further diffuses into the substrate crystal during operation, eventually penetrating the p-type InP confinement layer 4 and reaching the rnGaAsP active layer 6. A
When u reaches the active layer 5, the semiconductor laser rapidly deteriorates. Here, although there is no direct relationship with the present invention, 5
This is a useless material for forming 6 in2 film electrode stripes.
1 nP layer 7, p type InP layer 8 buried layer, n
A mu-U-3n electrode 1° is formed on the InP type substrate 9. Such deterioration of characteristics due to the intrusion of a person U is observed not only in semiconductor lasers but also in many compound semiconductor devices.The second conventional example that has been used to prevent such deterioration of characteristics is There is a method of inserting a barrier metal between the mu and the substrate to prevent mutual diffusion. Cr, Ti, etc. are used as the barrier metal.

このような非合金化電極において汀、ムUの侵入による
特性の劣化は生しないが、コンタクト抵抗が合金化電極
に比へて高(なるという欠点を有している。さらに、コ
ンタクト抵抗を丁けるためには、電極蒸着前にp型不純
物を気相拡散してあらかじめ基板の表面不純物濃度を高
くしておくことが不可欠であり、この気相拡散を必ずし
も必要としない合金化電極に比へて工程が複雑になる。
Although such non-alloyed electrodes do not suffer from deterioration of their properties due to the intrusion of slag and silica, they have the disadvantage that their contact resistance is higher than that of alloyed electrodes. In order to achieve this, it is essential to increase the surface impurity concentration of the substrate by vapor-phase diffusion of p-type impurities before electrode deposition, which is compared to alloyed electrodes that do not necessarily require vapor-phase diffusion. The process becomes complicated.

発明の目的 本発明は上記従来の欠点を改善するもので、電1   
     極蒸着前。気相ヶ散エヮを必要おオず、ヵ、
93゜タクト抵抗の低い非合金化オーミック電極の構成
法を提供するものである。
OBJECTS OF THE INVENTION The present invention aims to improve the above-mentioned conventional drawbacks, and
Before polar deposition. It is necessary to dissipate the vapor phase.
A method of constructing an unalloyed ohmic electrode with low 93° tact resistance is provided.

発明の構成 本発明のオーミック電極は、化合物半導体よりなる基板
上に前記化合物半導体に対してp型もしくin型の不純
物となる金属よりなる第1の金属層と、前記化合物半導
体と電極母材の相互拡散を防止するバリア金属よりなる
第2の金属層と、前記電極母材よりなる第3の金属層を
順次積層し、熱処理を施したものである。
Structure of the Invention The ohmic electrode of the present invention comprises, on a substrate made of a compound semiconductor, a first metal layer made of a metal serving as a p-type or in-type impurity with respect to the compound semiconductor, the compound semiconductor and an electrode base material. A second metal layer made of a barrier metal that prevents interdiffusion of the metal and a third metal layer made of the electrode base material are sequentially laminated and subjected to heat treatment.

実施例の説明 以下、本発明の具体的な実施例を図面を用いて説明する
。第2図は本発明を埋込み構造半導体レーザに適用した
場合の断面図である。半導体レーザ基板の表面層11は
波長に換算した組成が161pmのInGaAsP層(
キャリア密度2 y 10 cm  )である。また、
5102膜12け電極ストライプ構造を形成するために
設けられている。この半導体レーザ基板に対して、不純
物金属としてのZn層13、バリア金属としてのcr層
14、電極母材としてのムU層16を順次蒸着し、熱処
理を施す。
DESCRIPTION OF EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a cross-sectional view when the present invention is applied to a buried structure semiconductor laser. The surface layer 11 of the semiconductor laser substrate is an InGaAsP layer (with a wavelength-converted composition of 161 pm).
The carrier density is 2 y 10 cm). Also,
Twelve 5102 films are provided to form an electrode stripe structure. A Zn layer 13 as an impurity metal, a Cr layer 14 as a barrier metal, and a MuU layer 16 as an electrode base material are sequentially deposited on this semiconductor laser substrate, and then heat treated.

この蒸着は、例えば各層の膜厚をそれぞれ1ooi、1
000A 12000A とし、例えば電子ビーム蒸着
装置スパッタ蒸着装置などによって一回の排気サイクル
中に行えばよい。また、熱処理は例えばN2雰囲気中で
420°C18分間行う。第2図は、熱処理前の状態を
示しているが、熱処理によってZn ? InGaAs
P層11中へ拡散きれて、InGaAsP層11表面に
層温1表面nドープ層が形成される。
In this vapor deposition, for example, the film thickness of each layer is 1ooi and 1ooi, respectively.
000A to 12000A, and may be performed during one exhaust cycle using, for example, an electron beam evaporator or sputter evaporator. Further, the heat treatment is performed, for example, at 420° C. for 18 minutes in a N2 atmosphere. Figure 2 shows the state before heat treatment, but as a result of heat treatment, Zn? InGaAs
After being diffused into the P layer 11, a layer temperature 1 surface n-doped layer is formed on the surface of the InGaAsP layer 11.

しかし、Au層15とInGaAsP層11の相互層数
1Or層14によって阻止されているので、第1図の従
来例で示しだような合金層3は形成されない。従って、
pljllnP閉込め層16、I n G a A s
F’(1,−外層17にムUが拡散していくおそれはな
い。ここで、本発明との直接的な関係はないが、n型工
nP層18、p型InP層19け埋込み層であり、n型
InP基板2o上にけAu −Sn電極21が形成きれ
ている。
However, since the Au layer 15 and the InGaAsP layer 11 are prevented from forming by the Or layer 14, the alloy layer 3 as shown in the conventional example of FIG. 1 is not formed. Therefore,
pljllnP confinement layer 16, In Ga As
F'(1, - There is no fear that the mu will diffuse into the outer layer 17. Although this is not directly related to the present invention, the n-type InP layer 18 and the p-type InP layer 19 are buried layers. The Au--Sn electrode 21 has been completely formed on the n-type InP substrate 2o.

このようにして形成したオーミック電極のコンタクト抵
抗率を伝送線モデル(TLM)法によって評価した。評
価した試料の形状は第2図に示したものとは異なるが、
基板の表面層と電極の構成法は全く同一である。第3図
は、420°Cで熱処理した場合の熱処理時間とコンタ
クト抵抗率の関係を示す。同図より42 oOCで8分
間の熱処理を施すことにより良好なオーミック電極が形
成されることがわかる。また同図には、同一の基板に対
してCr(1000f)、Au (2oooX)のみを
蒸着熱処理した場合のコンタクト抵抗率と、Znの気相
拡散後Or、Auを蒸着熱処理した場合のコンタクト抵
抗率も示しである。これより、Or、 Auのみでオー
ミック電極を構成した場合VCV′i、電極蒸着前jc
Znの気相拡散を行うことか不可欠であることがわかる
The contact resistivity of the ohmic electrode thus formed was evaluated using a transmission line model (TLM) method. Although the shape of the evaluated sample is different from that shown in Figure 2,
The construction methods for the surface layer of the substrate and the electrodes are exactly the same. FIG. 3 shows the relationship between heat treatment time and contact resistivity in the case of heat treatment at 420°C. It can be seen from the figure that a good ohmic electrode can be formed by heat treatment at 42 oC for 8 minutes. The same figure also shows the contact resistivity when the same substrate is heat-treated for vapor deposition of only Cr (1000f) and Au (2oooX), and the contact resistance when heat-treated for vapor deposition of Or and Au after vapor phase diffusion of Zn. The rate is also indicative. From this, when an ohmic electrode is composed of only Or and Au, VCV′i, jc before electrode deposition
It can be seen that it is essential to carry out vapor phase diffusion of Zn.

また、第2図に示した半導体レーザ((対して寿命試験
を行った結果、第1図に示した合金化電極を用いたもの
に比べて大幅に特性が改善された。
Furthermore, as a result of a life test performed on the semiconductor laser shown in FIG. 2, the characteristics were significantly improved compared to that using the alloyed electrode shown in FIG.

これ汀、先に述へたムUの侵入による劣化が防止された
ためである。
This is because the deterioration caused by the intrusion of the mucus mentioned above was prevented.

以上本発明を半導体レーザに適用した場合について説明
を行ったが、本発明は他のデバイス、例えば受光素子や
トランジスタに対しても適用可能である。また、化合物
半導体基板としてもp型InCaAsPのみに限定され
るものではなく、他の化合物半導体基板、例えばInP
 、 GaAs 、 A4CraAs、GlLP等に対
しても適用可能である。この場合、n型基板に対しては
S、 Se、 Te、 Ge、 Sn等が、p型基板に
対してけBe、 Mg、 Zn、 Cd等が不純物とな
る金属として用いられる。さらに、バリア金属としては
Cr以外にTi、 Mo、W等を用いてもよく、電極母
材としてはAu以外にAg、 Pt、Pd、Aノおよび
これらの金属よりなる多層膜を用いてもよい。
Although the present invention has been described above in the case where it is applied to a semiconductor laser, the present invention can also be applied to other devices, such as light receiving elements and transistors. Furthermore, the compound semiconductor substrate is not limited to p-type InCaAsP, and may be other compound semiconductor substrates, such as InP.
, GaAs, A4CraAs, GlLP, etc. In this case, S, Se, Te, Ge, Sn, etc. are used as impurity metals for the n-type substrate, and Be, Mg, Zn, Cd, etc. are used as impurity metals for the p-type substrate. Further, as the barrier metal, Ti, Mo, W, etc. may be used in addition to Cr, and as the electrode base material, in addition to Au, Ag, Pt, Pd, Al, and a multilayer film made of these metals may be used. .

発明の効果 本発明によれは、電極蒸着前に気相拡散工程を必要とせ
す、かつコンタクト抵抗の低い非合金化オーミック電極
を構成することができる。また、このオーミック電極で
け合金層が形成されないの+     7・11i!H
”;<b@@ss“@r!PKKJtH,zvき特性を
劣化させるという問題を生じることもない。
Effects of the Invention According to the present invention, it is possible to construct a non-alloyed ohmic electrode that requires a vapor phase diffusion process before electrode deposition and has low contact resistance. Also, the alloy layer is not formed on this ohmic electrode +7・11i! H
”;<b@@ss“@r! There is no problem of deterioration of PKKJtH,zv characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のオーミック電極の断面図、第2図は本発
明の一実施例のオルミンク電極の断面図、第3図は熱処
理時間とコンタクト抵抗率の関係を示す特性図である。 11 ・・化合物半導体基板、13・・・第1の金属層
(Zn)、14−−−第2の金属層(Cr )、16・
・・・第3の金属層(Au )。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図 第3図 塾ム理lI8眉(lか)
FIG. 1 is a sectional view of a conventional ohmic electrode, FIG. 2 is a sectional view of an Olminc electrode according to an embodiment of the present invention, and FIG. 3 is a characteristic diagram showing the relationship between heat treatment time and contact resistivity. 11...Compound semiconductor substrate, 13...First metal layer (Zn), 14---Second metal layer (Cr), 16...
...Third metal layer (Au). Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Juku Murri I8 Eyebrow (l?)

Claims (1)

【特許請求の範囲】[Claims] 化合物半導体よりなる基板上に前記化合物半導体に対し
てp型もしくはn型の不純物となる金属よりなる第1の
金属層と、前記化合物半導体と電極母材の相互拡散を阻
止するバリア金属よりなる第2の金属層と、前記電極母
材よりなる第3の金属層を順次積層し、熱処理を施した
ことを特徴とするオーミック電極。
A first metal layer made of a metal that acts as a p-type or n-type impurity for the compound semiconductor on a substrate made of a compound semiconductor, and a first metal layer made of a barrier metal that prevents mutual diffusion between the compound semiconductor and the electrode base material. An ohmic electrode characterized in that a second metal layer and a third metal layer made of the electrode base material are sequentially laminated and subjected to heat treatment.
JP17194384A 1984-08-18 1984-08-18 Ohmic electrode Pending JPS6150363A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17194384A JPS6150363A (en) 1984-08-18 1984-08-18 Ohmic electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17194384A JPS6150363A (en) 1984-08-18 1984-08-18 Ohmic electrode

Publications (1)

Publication Number Publication Date
JPS6150363A true JPS6150363A (en) 1986-03-12

Family

ID=15932681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17194384A Pending JPS6150363A (en) 1984-08-18 1984-08-18 Ohmic electrode

Country Status (1)

Country Link
JP (1) JPS6150363A (en)

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