JPS6148223A - Tuner input circuit - Google Patents

Tuner input circuit

Info

Publication number
JPS6148223A
JPS6148223A JP16925884A JP16925884A JPS6148223A JP S6148223 A JPS6148223 A JP S6148223A JP 16925884 A JP16925884 A JP 16925884A JP 16925884 A JP16925884 A JP 16925884A JP S6148223 A JPS6148223 A JP S6148223A
Authority
JP
Japan
Prior art keywords
vhf
uhf
tuner
input terminal
coupling loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16925884A
Other languages
Japanese (ja)
Inventor
Akio Iwase
岩瀬 彰男
Isao Ariyoshi
有可 功
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16925884A priority Critical patent/JPS6148223A/en
Publication of JPS6148223A publication Critical patent/JPS6148223A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00Continuous tuning
    • H03J3/02Details
    • H03J3/16Tuning without displacement of reactive element, e.g. by varying permeability
    • H03J3/18Tuning without displacement of reactive element, e.g. by varying permeability by discharge tube or semiconductor device simulating variable reactance
    • H03J3/185Tuning without displacement of reactive element, e.g. by varying permeability by discharge tube or semiconductor device simulating variable reactance with varactors, i.e. voltage variable reactive diodes

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

PURPOSE:To cope with a CATV by a VHF tuner by providing a switching element between an input terminal of an LPF provided to the VHF tuner of UHF, VHF turner sections connected to a common input terminal and a common. CONSTITUTION:An input signal fed to an input terminal 1 common to VHF, UHF is given to a coupling loop 2 and a UHF signal is extracted from a turning circuit comprising a resonance line 3, a varicap diode 4 and a tracking correction capacitor 5. The input terminal of the VHF reception LPF is grounded at UHF reception by closing a switching element 12 to exclude the effect of the impedance of the VHF circuit. Thus, the matching condition of the UHF tuner is set only with the relation of position between the coupling loop 2 and the resonance line 3. The element 12 is opened at the VHF reception so as to input a signal from the coupling loop 2 to the LPF thereby excluding the out-band UHF signal. Thus, the VHF tuner receives a CATV up to 470MHz without deteriorating the gain and the characteristic of noise figure of the UHF tuner.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、VHF及びUHF共通の入力端子を有する影
へ′コンビネーションタイゾのチューナ入力回路の構成
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to the configuration of a tuner input circuit for a high-frequency combination type having a common input terminal for VHF and UHF.

(従来例の構成とその問題点) 従来、この種のチューナ入力回路は、例えば第1図に示
すようにVHF 、 UHF共通入力端子1より結合ル
ープ2を経てUHF信号を共振線路3.バリキャッジダ
イオード4.及びトラ1.キング補正用コンデンザ5と
で構成される共振回路で散り出し、VHF信号はコンデ
ンサ6.8及びインダクタンス7で構成されるローパス
フィルタ及0: I F l−ラップ9を経て同調回路
へ導く構成になっていた。
(Configuration of conventional example and its problems) Conventionally, this type of tuner input circuit has been used to transmit a UHF signal from a VHF/UHF common input terminal 1 through a coupling loop 2 to a resonant line 3, for example, as shown in FIG. Varicage diode 4. and tiger 1. The VHF signal is scattered by a resonant circuit composed of a capacitor 5 for King correction, and is led to a tuning circuit via a low-pass filter composed of a capacitor 6.8 and an inductance 7, and a IF wrap 9. was.

しかしながら上記のような構成では、前記ローパスフィ
ルタのカットオフ周波数にはUHFチューナの利得及び
雑音指数特性との関係で、上限を3501VIT(z以
上にすることは不可能である。一方CATVチャネルも
大幅に増加し、VHFチューナで470 MHz以下の
チャネルが全て受信可能なものの開発が望1れていた。
However, in the above configuration, it is impossible to set the upper limit of the cutoff frequency of the low-pass filter to 3501 VIT (z or more) due to the relationship with the gain and noise figure characteristics of the UHF tuner. With the increase in frequency, it has been desired to develop a VHF tuner that can receive all channels below 470 MHz.

この市場の要望を満足させるためには、前記ロー・ぐス
フィルタのカットオフ周波数を第2図に示すように55
0 MHz以上にする必要があるが、第3図に示すよう
に、UHFの低チャンネル近傍での利得の大幅な低下と
雑音指数の劣化が避けられ々い問題であった。つまり従
来回路方式では、470 MHz ’f、でのCATV
対応のUHF 、 VHF共通入力端子をもつU/Vコ
ンビネーションチューナの開発は、不可能であった。
In order to satisfy this market demand, the cutoff frequency of the low gas filter must be set at 55% as shown in Figure 2.
0 MHz or higher, but as shown in FIG. 3, a significant decrease in gain and deterioration of noise figure near the low UHF channels are unavoidable problems. In other words, with the conventional circuit system, CATV at 470 MHz 'f.
It was impossible to develop a U/V combination tuner with a compatible UHF and VHF common input terminal.

(発明の目的) 本発明は、このよう々従来の欠点を解決するもので、U
HF 、 VHF共通入力端子構造のチューナで、CA
TV帯、 470 MHzまでの受信をUHF’HF−
ナの特性(利得、雑音指数)を劣化させずに、従来のU
HFチューナと同等の水準で受信可能とすることを目的
とするものである。
(Object of the invention) The present invention solves these conventional drawbacks, and
A tuner with a common input terminal structure for HF and VHF.
TV band, reception up to 470 MHz is UHF'HF-
without degrading the characteristics (gain, noise figure) of the conventional U
The purpose is to enable reception at a level equivalent to that of an HF tuner.

(発明の構成) この目的を達成するために本発明は、UHF 。(Structure of the invention) To achieve this objective, the present invention uses UHF.

VHF共通の入力端子に接続されたUHFチューナとの
結合ループ、及びこの結合ループの他端にロー・ぐスフ
ィルタを接続するとともに、前記ロー・Pスフィルタの
入力端子とアースとの間にスイッチング素子を接続した
ものである。
A coupling loop with a UHF tuner connected to a common VHF input terminal, a low-pass filter connected to the other end of this coupling loop, and a switching circuit between the input terminal of the low-pass filter and ground. This is a connection of elements.

この構成によって、UHFチューナ部の利得、雑音指数
の特性を劣化させることなく、VHFチューナ部で47
0 MI(zまで受信可能なC,ATV対応チューナが
出現できた。
With this configuration, the VHF tuner can receive up to 47kHz without deteriorating the gain and noise figure characteristics of the UHF tuner.
A C and ATV compatible tuner that can receive up to 0 MI (z) has appeared.

(実施例の説明) 以下、本発明の実施例について、第4図〜第6図を用い
て説明する。
(Description of Examples) Examples of the present invention will be described below with reference to FIGS. 4 to 6.

第4図は、本発明の基本回路を示したものである。UH
F ’、 VI(F共通の入力端子1に供給される入力
信号は結合ループ2を経て、UHF信号は共振線路3、
バリキャッジダイオード4、及びトラッキング補正用コ
ンデンサ5とで構成される同調回路で取り出される。ス
イッチング素子12はUHF受信時には短絡状態となり
、コンデンサ6.8.インダクタンス7で構成されるπ
型、あるいはインダクタンス19.20.コンデンサ2
1で構成されるT型ローパスフィルタ以降のVHF回路
のインピーダンスの影響は完全に排除できる。従ってU
HFチューナの整合条件は、結合ルーツ2と共振線路3
との位置関係だけで決定できる。一方VHF’受信時に
は前記スイッチング素子12を開放状態とし、結合ルー
プ2を介して直接前記ローパスフィルタに入力信号は供
給され、ローパスフィルタの帯域外のUHF信号は排除
する。
FIG. 4 shows the basic circuit of the present invention. UH
F', VI (The input signal supplied to the F common input terminal 1 passes through the coupling loop 2, and the UHF signal passes through the resonant line 3,
It is taken out by a tuning circuit composed of a varicage diode 4 and a tracking correction capacitor 5. The switching element 12 is short-circuited when receiving UHF, and the capacitors 6, 8, . π composed of inductance 7
type or inductance 19.20. capacitor 2
The influence of the impedance of the VHF circuit after the T-type low-pass filter composed of 1 can be completely eliminated. Therefore, U
The matching conditions for the HF tuner are coupling roots 2 and resonant line 3.
It can be determined only by the positional relationship with. On the other hand, when receiving VHF', the switching element 12 is opened, the input signal is directly supplied to the low-pass filter via the coupling loop 2, and UHF signals outside the band of the low-pass filter are excluded.

第5図は本発明の実施例を示したもので、前述したスイ
ッチング素子12をスイッチングダイオード14で構成
するものである。コンデンサ15は、DCカット用であ
シ切換端子13より印加された電圧は、電流制限抵抗1
7を介して前記スイッングダイオードのアノード側に印
加される。一方カンード側は結合ループとローパスフィ
ルタの接続点に接続する。
FIG. 5 shows an embodiment of the present invention, in which the above-mentioned switching element 12 is constituted by a switching diode 14. The capacitor 15 is for DC cut, and the voltage applied from the switching terminal 13 is connected to the current limiting resistor 1.
7 to the anode side of the switching diode. On the other hand, the cand side is connected to the connection point between the coupling loop and the low-pass filter.

UHF受信時には正極性の直流電圧を印加し、スイッチ
ングダイオード14を普通状態とし、VHF受信時には
負極性の直流電圧を印加し、スイッチングダイオード1
4を開放状態とする。
When receiving UHF, a positive DC voltage is applied to put the switching diode 14 in a normal state, and when receiving VHF, a negative DC voltage is applied and the switching diode 1
4 is in an open state.

第6図は本発明の別の実施例を示したもので、前記スイ
ッチング素子12をトランジスタスイッチ方式で実現し
たものである。結合ルーツ2と口一、eスフィルタの接
続点にスイッチングトランジスタ18のコレクタを接続
し、エミッタは直接接地する。ペースは電流制限用抵抗
17を介してBu端子に接続する。UHF受信時にはB
u端子にB電圧が印加されるため、前記スイッチングト
ランジスタ18は導通し、結合ループ2の出力側は接地
状態となる。又VHF受信時には、Bu端子には電圧は
印加されず、スイッチングトランジスタ18のコレクタ
・エミッタ間は開放状態となる。
FIG. 6 shows another embodiment of the present invention, in which the switching element 12 is implemented using a transistor switch system. The collector of the switching transistor 18 is connected to the connection point between the coupling roots 2 and the e-s filter, and the emitter is directly grounded. The pace is connected to the Bu terminal via a current limiting resistor 17. B when receiving UHF
Since voltage B is applied to the u terminal, the switching transistor 18 becomes conductive, and the output side of the coupling loop 2 becomes grounded. Further, when receiving VHF, no voltage is applied to the Bu terminal, and the collector-emitter of the switching transistor 18 is in an open state.

この実施例の方式を使用すれば切換端子13は不要とな
り、現行チューナのUHFのB電源端子Bu16に直接
接続するだけでよく、しかもセット側に正負電圧を発生
させる切換用電源も不要となり、大幅なコストダウンが
図れるという特徴がある。
If the method of this embodiment is used, the switching terminal 13 will be unnecessary, and it will be sufficient to connect it directly to the UHF B power supply terminal Bu16 of the current tuner.Moreover, the switching power supply that generates positive and negative voltages on the set side will also be unnecessary, which will significantly It has the characteristic of being able to reduce costs.

(発明の効果) 以上のように本発明によれば、UHF・VHF共通入力
端子を有するチューナにおいて、 UHFチューナの利
得・雑音指数を劣化させることなく、VHFチューナ部
で470 MHz ’!での全CATVチャンネルを受
信可能なシステムを提供することができる。
(Effects of the Invention) As described above, according to the present invention, in a tuner having a common UHF/VHF input terminal, the VHF tuner section can transmit up to 470 MHz'! without deteriorating the gain and noise figure of the UHF tuner. It is possible to provide a system that can receive all CATV channels.

特に米国市場でのCATVチャンネルの増加には著しい
ものがあり、将来的にはCATV対応がテレビセットと
して主流に々ってくることは明らかであり、一方、UH
F部部の雑音指数はFCCの規制強化に見られるように
より厳しい方向に向っており、本発明の実用的効果は大
なるものがある。
There has been a remarkable increase in the number of CATV channels, especially in the US market, and it is clear that CATV compatible TV sets will become mainstream in the future.
The noise figure of the F section is becoming stricter as seen in the stricter regulations of the FCC, and the present invention has great practical effects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はUHF −vHF共通入力端子を有するチュー
ナ入力回路の従来例を示す図、 第2図は従来チューナとCATV対応チューナのLPF
の特性図、 第3図(、)は本発明回路方式と従来回路方式のUHF
部の利得特性図、第3図(b)は同雑音指数特性図、 第4図は本発明の基本回路を示す図、 第5図は本発明の実施例を示す図、 第6図は本発明の”Ah施例を示す図、である。 1・・・UHF −VHF共通入力端子、2・・・結合
ループ、3・・・共振線路、4・・・バリキャップダイ
オード、5・・・トラッキング補正用コンデンサ、9・
・・IF)ラッ7’、10.11・・・マツチングコイ
ル、12・・・スイッチング素子、13・・・切換端子
、14・・スイッチングダイオード、15・・・DCカ
ット用コンデンサ、16・・・Bu両端子17・・・抵
抗、18・・・スイッチングトランジスタ。 第1図 第2図 第3図 (a)                 (b)第4
Figure 1 is a diagram showing a conventional example of a tuner input circuit having a UHF-vHF common input terminal, and Figure 2 is an LPF of a conventional tuner and a CATV compatible tuner.
Figure 3 (,) shows the UHF characteristics of the circuit system of the present invention and the conventional circuit system.
Figure 3(b) is a noise figure characteristic diagram, Figure 4 is a diagram showing the basic circuit of the present invention, Figure 5 is a diagram showing an embodiment of the present invention, Figure 6 is a diagram showing the same noise figure characteristic. It is a diagram showing an "Ah embodiment" of the invention. 1... UHF-VHF common input terminal, 2... Coupling loop, 3... Resonant line, 4... Varicap diode, 5... Tracking correction capacitor, 9.
...IF) Lat 7', 10.11...Matching coil, 12...Switching element, 13...Switching terminal, 14...Switching diode, 15...DC cut capacitor, 16...・Both Bu terminals 17...Resistor, 18...Switching transistor. Figure 1 Figure 2 Figure 3 (a) (b) 4th
Ward

Claims (3)

【特許請求の範囲】[Claims] (1)UHF、VHF共通の入力端子に接続されたUH
Fチューナ部との結合ループ、及びこの結合ループの他
端にローパスフィルタを接続するとともに、前記ローパ
スフィルタの入力端子とアースとの間にスイッチング素
子を接続したことを特徴とするU/Vコンビネーション
タイプのチューナ入力回路。
(1) UH connected to the common input terminal for UHF and VHF
A U/V combination type characterized in that a low-pass filter is connected to the coupling loop with the F tuner section and the other end of this coupling loop, and a switching element is connected between the input terminal of the low-pass filter and the ground. tuner input circuit.
(2)前記スイッチング素子にスイッチングダイオード
を用いたことを特徴とする、特許請求の範囲第(1)項
記載のチューナ入力回路。
(2) The tuner input circuit according to claim (1), wherein a switching diode is used as the switching element.
(3)前記スイッチング素子にトランジスタを用いたこ
とを特徴とする特許請求の範囲第(1)項記載のチュー
ナ入力回路。
(3) The tuner input circuit according to claim (1), wherein a transistor is used as the switching element.
JP16925884A 1984-08-15 1984-08-15 Tuner input circuit Pending JPS6148223A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16925884A JPS6148223A (en) 1984-08-15 1984-08-15 Tuner input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16925884A JPS6148223A (en) 1984-08-15 1984-08-15 Tuner input circuit

Publications (1)

Publication Number Publication Date
JPS6148223A true JPS6148223A (en) 1986-03-08

Family

ID=15883170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16925884A Pending JPS6148223A (en) 1984-08-15 1984-08-15 Tuner input circuit

Country Status (1)

Country Link
JP (1) JPS6148223A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100593168B1 (en) * 1999-06-30 2006-06-26 대우전자부품(주) A tuner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100593168B1 (en) * 1999-06-30 2006-06-26 대우전자부품(주) A tuner

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