JPS6148208A - Automatic gain control circuit - Google Patents
Automatic gain control circuitInfo
- Publication number
- JPS6148208A JPS6148208A JP16908484A JP16908484A JPS6148208A JP S6148208 A JPS6148208 A JP S6148208A JP 16908484 A JP16908484 A JP 16908484A JP 16908484 A JP16908484 A JP 16908484A JP S6148208 A JPS6148208 A JP S6148208A
- Authority
- JP
- Japan
- Prior art keywords
- current
- differential amplifier
- constant
- output
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007423 decrease Effects 0.000 claims description 11
- 230000003247 decreasing effect Effects 0.000 claims description 9
- 230000003321 amplification Effects 0.000 abstract description 15
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 15
- 238000010586 diagram Methods 0.000 description 2
- 206010008631 Cholera Diseases 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/02—Manually-operated control
- H03G3/04—Manually-operated control in untuned amplifiers
- H03G3/10—Manually-operated control in untuned amplifiers having semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
- H03G1/0023—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier in emitter-coupled or cascode amplifiers
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は、差動増幅器の動作電流を増減して利得を制
御する自動利得制御回路に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to an automatic gain control circuit that controls the gain of a differential amplifier by increasing or decreasing its operating current.
従来の技術
従来、制御電圧の増減に応じて増幅利得を制御する自動
利得制御回路には、例えば、第２図に示すように構成し
た差動増幅器が用いられている。2. Description of the Related Art Conventionally, a differential amplifier configured as shown in FIG. 2, for example, has been used in an automatic gain control circuit that controls amplification gain in accordance with increases and decreases in control voltage.
この差動増幅器は、一対のトランジスタ２．４のエミッ
タを共通に接続するとともに、このエミッタを利得制御
用のトランジスタ６および抵抗８を介して接地し、各ト
ランジスタ２．４のコレクタを抵抗１０．１２を介して
正側電源ラインに接続したものである。In this differential amplifier, the emitters of a pair of transistors 2.4 are connected in common, the emitters are grounded via a gain control transistor 6 and a resistor 8, and the collectors of each transistor 2.4 are connected to a resistor 10. 12 to the positive power supply line.
トランジスタ２．４のベースには、入力端子１４Ａ、１
４Ｂから入力信号が加えられ、トランジスタ６のベース
には、制御入力端子１６から制御電圧が加えられる。ま
た、トランジスタ２．４のコレクタには、出力端子１８
Ａ、１８Ｂが形成され、出力が取り出される。そして、
正側電源ラインと接地ラインとの間には、所定の電源が
供給され、■ｃｃはその電圧である。The base of the transistor 2.4 has input terminals 14A, 1
An input signal is applied from the transistor 4B, and a control voltage is applied from the control input terminal 16 to the base of the transistor 6. Further, the collector of the transistor 2.4 has an output terminal 18.
A and 18B are formed and the output is taken out. and,
A predetermined power supply is supplied between the positive power supply line and the ground line, and cc is its voltage.
このような自動利得制御回路では、制御入力端子１６に
加えられる制御電圧を調整することによって、トランジ
スタ２．４のエミッタ電流を増減し、差動増幅器の増幅
利得を制御することができる。In such an automatic gain control circuit, by adjusting the control voltage applied to the control input terminal 16, the emitter current of the transistor 2.4 can be increased or decreased, and the amplification gain of the differential amplifier can be controlled.
すなわち、抵抗１０．１２の抵抗値をＲ、トランジスタ
２．４のエミッタ微分抵抗をｒｅとすれば、差動増幅器
の増幅利得Ｃｖは、
Ｇｖ＝Ｒ／ｒｅ ・・・・（１）で与えられ
る。エミッタ微分抵抗ｒｅは、エミッタ電流に反比例す
るため、増幅利得Ｇｖは、エミッタ電流に比例すること
から、エミッタ電流を外部から加減すれば、所望の増幅
利得を差動増幅器に設定することができる。That is, if the resistance value of resistor 10.12 is R and the emitter differential resistance of transistor 2.4 is re, the amplification gain Cv of the differential amplifier is given by Gv=R/re (1) . Since the emitter differential resistance re is inversely proportional to the emitter current, the amplification gain Gv is proportional to the emitter current. Therefore, by adjusting the emitter current from the outside, a desired amplification gain can be set in the differential amplifier.
発明が解決しようとする問題点
このような差動増幅器を用いた自動利得制御回路におい
て、エミッタ電流を増減した場合、各トランジスタ２．
４のコレクタ電流が変化し、負荷抵抗１０．１２の電圧
降下が増幅利得に応じて変化する。すなわち、エミッタ
電流の変化によって、出力点直流電位が変動し、出力の
ダイナミックレンジが制御電圧によって変化する欠点が
ある。Problems to be Solved by the Invention In an automatic gain control circuit using such a differential amplifier, when the emitter current is increased or decreased, each transistor 2.
4 changes, and the voltage drop across the load resistor 10.12 changes in accordance with the amplification gain. That is, there is a drawback that the DC potential at the output point changes due to a change in the emitter current, and the dynamic range of the output changes depending on the control voltage.
そこで、この発明は、差動増幅器の動作電流の増減に対
して差動増幅器の出力点直流電位の変動を抑え、出力の
ダイナミックレンジの変化を生じないようにした自動利
得制御回路を提供しようとするものである。Therefore, the present invention aims to provide an automatic gain control circuit that suppresses fluctuations in the DC potential at the output point of a differential amplifier in response to increases and decreases in the operating current of the differential amplifier, and prevents changes in the dynamic range of the output. It is something to do.
問題点を解決するための手段
この発明は、差動増幅器の動作電流を増減させて利得を
制御する自動利得制御回路において、前記差動増幅の負
荷をダイオードで構成し、このダイオードに流れる電流
を前記差動増幅器に流れる動作電流の増減とは無関係に
一定にする定電流源を設置するとともに、前記差動増幅
器の動作電流の増減分を補償する電流補償回路を設置し
たものである。Means for Solving the Problems The present invention provides an automatic gain control circuit that controls the gain by increasing or decreasing the operating current of a differential amplifier, in which the load of the differential amplifier is composed of a diode, and the current flowing through the diode is A constant current source is installed to keep the operating current flowing through the differential amplifier constant regardless of increases or decreases, and a current compensation circuit is installed to compensate for the increase or decrease in the operating current of the differential amplifier.
作用
差動増幅器の負荷にダイオードを設置し、差動増幅器に
動作電流の増減に応じた電流をダイオードを介さないで
流し込むとともに、前記ダイオードに流れる電流を一定
に保持することにより、差動増幅器の出力点直流電位を
一定にする。By installing a diode in the load of the differential amplifier, allowing current to flow into the differential amplifier according to the increase or decrease of the operating current without going through the diode, and keeping the current flowing through the diode constant, the differential amplifier Keep the output point DC potential constant.
実施例
以下、この発明を図面に示した実施例を参照して詳細に
説明する。Embodiments Hereinafter, the present invention will be explained in detail with reference to embodiments shown in the drawings.
第１図はこの発明の自動利得制御回路の実施例を示して
いる。FIG. 1 shows an embodiment of the automatic gain control circuit of the present invention.
この自動利得制御回路は差動２設地幅器を構成している
。すなわち、この自動利得制御回路には、第１および第
２の差動増幅器２０．２２が設置されているとともに、
第１の差動増幅器２０に対して利得制御に対応する動作
電流の増減を補償する電流補償回路２４が設置されてい
る。This automatic gain control circuit constitutes a differential two-ground width switch. That is, this automatic gain control circuit is provided with first and second differential amplifiers 20 and 22, and
A current compensation circuit 24 is installed for the first differential amplifier 20 to compensate for increases and decreases in operating current corresponding to gain control.
第１の差動増幅器２０は、第２図に示す差動増幅器と同
様にトランジスタ２６．２８のエミッタを共通にし、こ
のエミッタと接地（ＧＮＤ）ラインとの間にトランジス
タ３０および抵抗３２を接続したものであり、各トラン
ジスタ２６．２８のコレクタと正側電位ラインとの間に
負荷としてのダイオード３４．３６を接続したものであ
る。各ダイオード３４．３６には、定電流源３８．４０
によって定電流が与えられる。The first differential amplifier 20 has transistors 26 and 28 having common emitters, and a transistor 30 and a resistor 32 connected between the emitters and the ground (GND) line, similar to the differential amplifier shown in FIG. A diode 34, 36 as a load is connected between the collector of each transistor 26, 28 and the positive potential line. Each diode 34.36 has a constant current source 38.40
gives a constant current.
トランジスタ２Ｇ、２８のベースには、入力端子４２Ａ
、４２Ｂが形成され、所定の入力信号が加えられる。ま
た、トランジスタ３０のベースには制御入力端子４４が
形成され、増幅利得を制御するための制御電圧が加えら
れる。すなわち、制御入力端子４４に加えられる制御電
圧に応じてトランジスタ２６．２８のエミッタ電流で与
えられる差動増幅器２０の動作電流が増減する結果、差
動増幅器２０の増幅利得が調整されるが、この増幅利得
の調整による動作電流の増減分は、電流補償回路２４か
らトランジスタ２６．２８のコレクタ側に供給される。The input terminal 42A is connected to the base of the transistors 2G and 28.
, 42B are formed and a predetermined input signal is applied thereto. Further, a control input terminal 44 is formed at the base of the transistor 30, and a control voltage for controlling the amplification gain is applied thereto. That is, the operating current of the differential amplifier 20 given by the emitter current of the transistors 26 and 28 increases or decreases in accordance with the control voltage applied to the control input terminal 44, and as a result, the amplification gain of the differential amplifier 20 is adjusted. An increase or decrease in the operating current due to the adjustment of the amplification gain is supplied from the current compensation circuit 24 to the collector side of the transistors 26 and 28.
電流補償回路２４は、トランジスタ４６．４８．５０．
５２および抵抗５４からなる可変電流源で構成され、ト
ランジスタ５２および抵抗５４は、差動増幅器２０のト
ランジスタ３０および抵抗３２と全く同様に半導体集積
回路上に形成され、そのベースには制御入力端子４４か
ら差動増幅器２０と共通の制御電圧が加えられる。トラ
ンジスタ４６．４８．５０は、電流ミラー回路を構成し
、トランジスタ４８には共通のベースおよびエミッタに
対して２つのコレクタＣ，、Ｃ，が形成されている。こ
のため、トランジスタ４６に流れる電流の１／２の電流
がトランジスタ４８の各コレクタＣ，、Ｃ２からトラン
ジスタ２６．２８に分流する。この実施例では、トラン
ジスタ４８に２つのコレクタＣ＋、Ｃｚを表示したが、
トランジスタ４６のベースと共通にベースを接続した２
つのトランジスタで構成しても良い。Current compensation circuit 24 includes transistors 46, 48, 50 .
The transistor 52 and the resistor 54 are formed on a semiconductor integrated circuit in exactly the same way as the transistor 30 and the resistor 32 of the differential amplifier 20, and have a control input terminal 44 at their base. A common control voltage is applied to the differential amplifier 20 from the differential amplifier 20. The transistors 46, 48, 50 constitute a current mirror circuit, and the transistor 48 has two collectors C, , C, formed with respect to a common base and emitter. Therefore, 1/2 of the current flowing through the transistor 46 is shunted from each collector C, C2 of the transistor 48 to the transistors 26 and 28. In this embodiment, the transistor 48 has two collectors C+ and Cz.
2 whose base is connected in common with the base of the transistor 46
It may also be configured with one transistor.
また、第２の差動増幅器２２は、トランジスタ５６．５
８のエミッタを共通にし、このエミッタと接地（ＧＮＤ
）ラインとの間に定電流源６０を接続し、各トランジス
タ５６．５８のコレクタと正側電位ラインとの間に負荷
抵抗６２．６４を接続したものである。そして、この差
動増幅器２２の出力は、トランジスタ５６．５８のコレ
クタ側に形成された出力端子６５Ａ、６５Ｂから取り出
される。Further, the second differential amplifier 22 includes a transistor 56.5.
Make the emitter of 8 common and connect this emitter to ground (GND).
) line, and a load resistor 62.64 is connected between the collector of each transistor 56.58 and the positive potential line. The output of the differential amplifier 22 is taken out from output terminals 65A and 65B formed on the collector side of the transistors 56 and 58.
以上の構成に基づき、その動作を説明する。The operation will be explained based on the above configuration.
制御電圧■。に対してトランジスタ３０．５２に流れる
電流を■１、定電流源３８．４０に流れ為定電流を１２
、定電流源６０に流れる定電流を１３とする。Control voltage■. The current flowing through the transistor 30.52 is 1, and the constant current flowing through the constant current source 38.40 is 12.
, the constant current flowing through the constant current source 60 is assumed to be 13.
この場合、トランジスタ５２に流れる電流１゜はトラン
ジスタ４６に流れるが、トランジスタ４６のコレクタに
は、電流Ｉ、が流れ、トランジスタ４８の各コレラ＆Ｃ
＋、Ｃｚには、それぞれ電流Ｉ、／２が流れる。このた
め、トランジスタ２６．２８には、■、／２で与えられ
る電流が流れ込むので、トランジスタ３０には、両型流
が合成された電流ｒ１が流れる。In this case, the current 1° flowing through the transistor 52 flows through the transistor 46, but the current I flows through the collector of the transistor 46, and each of the cholera & C of the transistor 48 flows through the collector of the transistor 46.
Currents I and /2 flow through + and Cz, respectively. Therefore, a current given by {circle around (2) and /2} flows into the transistors 26 and 28, so a current r1, which is a combination of both types of currents, flows into the transistor 30.
一方、ダイオード３４．３Ｇには、定電流源３８．４０
によって定電流■２が引かれる結果、電流Ｉ、には無関
係の定電流Ｉ２が流れる。On the other hand, the diode 34.3G has a constant current source 38.40G.
As a result, a constant current I2, which is unrelated to the current I, flows.
この結果、電流ＩＩ／２で定まるトランジスタ２６．２
８のエミッタ微分抵抗をｒｅ、、定電流■２で定まるダ
イオード３４．３６の微分抵抗をｒｅＱとすると、制御
電圧Ｖｃの差動増幅器２０の増幅利得Ｇｖ、は、
ＧｖＩ＝ｒｅ０／ｒ ｅｌ ” ・・（２１で与
えられる。As a result, the transistor 26.2 determined by the current II/2
If the emitter differential resistance of 8 is re, and the differential resistance of diode 34 and 36 determined by constant current 2 is reQ, then the amplification gain Gv of the differential amplifier 20 for control voltage Vc is GvI=re0/r el ”・(Given by 21.
また、制御電圧Ｖｃを±ΔＶだけ増減させた場合、トラ
ンジスタ３０．５２に流れる電流の変動 分を±Δ■と
すると、トランジスタ４８のコレクタＣ，およびＣ１に
は、（ｒ、±Δ■）／２の電流が流れる。この電流（Ｉ
ｔ ±ΔＩ）／２は、差動増幅器２０の各トランジスタ
２６．２日のコレクタに流れ込み、トランジスタ３０に
電流（ｒ＋±Δ■）として流れる。すなわち、制御電圧
Ｖｃを±ΔＶだけ増減させた場合のトランジスタ３０に
引き込まれる電流と、電流補償回路２４から差動増幅器
２０に供給される電流とは等しくなり、差動増幅器２０
に利得制御のための動作電流の増減が補償されている。Furthermore, when the control voltage Vc is increased or decreased by ±ΔV, and if the variation in the current flowing through the transistor 30.52 is ±Δ■, then the collectors C and C1 of the transistor 48 have (r, ±Δ■)/ 2 current flows. This current (I
t ±ΔI)/2 flows into the collector of each transistor 26.2 of the differential amplifier 20 and flows into the transistor 30 as a current (r+±Δ■). That is, the current drawn into the transistor 30 when the control voltage Vc is increased or decreased by ±ΔV is equal to the current supplied from the current compensation circuit 24 to the differential amplifier 20,
Increases and decreases in operating current for gain control are compensated for.
このとき、ダイオード３４．３６には、定電流源３８．
４０から定電流■２が与えられ、ダイオード３４．３６
に流れる電流は、差動増幅器２０のトランジスタ２６．
２８．３０を流れる電流とは無関係となり、ダイオード
３４．３６のカソードの直流電位は一定に保持される。At this time, the diodes 34, 36 are connected to the constant current sources 38.
A constant current ■2 is given from 40, and the diode 34.36
The current flowing through transistors 26 .
Independent of the current flowing through 28.30, the DC potential at the cathode of diode 34.36 remains constant.
そして、差動増幅器２０のトランジスタ２Ｇ、２８の電
流（１，±ΔＩ）／２で与えられるエミッタ微分抵抗を
ｒｅｇとすると、制御電圧（Ｖｃ±Δ■）の差動増幅器
２０の利得Ｇｖ、は、Ｇｖ２＝ｒｅｏ／ｒｅ２
・・・（３）で与えられる。Then, if the emitter differential resistance given by the current (1, ±ΔI)/2 of the transistors 2G and 28 of the differential amplifier 20 is reg, then the gain Gv of the differential amplifier 20 at the control voltage (Vc±Δ■) is , Gv2=reo/re2
... is given by (3).
したかっ−て、差動増幅器２０の出力直流電位が一定に
保持されるとともに、制御電圧Ｖｃの増減によってトラ
ンジスタ２６．２８のエミッタ微分抵抗のみを変化させ
ることができ、所望の増幅利得に制御できる。Therefore, the output DC potential of the differential amplifier 20 is held constant, and only the emitter differential resistance of the transistors 26 and 28 can be changed by increasing or decreasing the control voltage Vc, and the amplification gain can be controlled to a desired value. .
そして、差動増幅器２０の各トランジスタ２６．２８の
コレクタ側に発生した出力は、差動増幅器２２に加えら
れ、その増幅出力は出力端子６５Ａ１６５Ｂから取り出
される□。この場合、差動増幅器２２の動作電流は、定
電流源６０の定電流１’３で与えられるので、差動増幅
器２２の増幅利得は一定であり、抵抗６２．６４に流れ
る電流も一定となるため、出力直流電位は一定に保持さ
れることとなる。The output generated on the collector side of each transistor 26, 28 of the differential amplifier 20 is applied to the differential amplifier 22, and its amplified output is taken out from the output terminal 65A165B. In this case, the operating current of the differential amplifier 22 is given by the constant current 1'3 of the constant current source 60, so the amplification gain of the differential amplifier 22 is constant, and the current flowing through the resistors 62 and 64 is also constant. Therefore, the output DC potential is held constant.
発明の詳細
な説明したように、この発明によれば、差動増幅器の負
荷にダイオードを設置し、このダイオードに流れる電流
を一定に保持するとともに、差動増幅器の動作電流を増
減してその増幅利得を制御するので、増幅利得の制御に
対して出力直流電位が一定となり、出力のダイナミック
レンジの変動を抑制できる。As described in detail, according to the present invention, a diode is installed in the load of a differential amplifier, the current flowing through the diode is held constant, and the operating current of the differential amplifier is increased or decreased to improve its amplification. Since the gain is controlled, the output DC potential remains constant with respect to the control of the amplification gain, and fluctuations in the output dynamic range can be suppressed.
第１図はこの発明の自動利得制御回路の実施例を示す回
路図、第２図は従来の自動利得制御回路を示す回路図で
ある。
２０・・・差動増幅器、３４．３６・・・負荷としての
ダイオード、２４・・・電流補償回路。FIG. 1 is a circuit diagram showing an embodiment of the automatic gain control circuit of the present invention, and FIG. 2 is a circuit diagram showing a conventional automatic gain control circuit. 20...Differential amplifier, 34.36...Diode as load, 24...Current compensation circuit.
Claims (2)
る自動利得制御回路において、前記差動増幅器の負荷を
ダイオードで構成し、このダイオードに流れる電流を前
記差動増幅器に流れる動作電流の増減とは無関係に一定
にする定電流源を設置するとともに、前記差動増幅器の
動作電流の増減分を補償する電流補償回路を設置したこ
とを特徴とする自動利得制御回路。(1) In an automatic gain control circuit that controls the gain by increasing or decreasing the operating current of a differential amplifier, the load of the differential amplifier is configured with a diode, and the current flowing through the diode is adjusted to the operating current flowing through the differential amplifier. An automatic gain control circuit comprising: a constant current source that maintains a constant current regardless of increases and decreases; and a current compensation circuit that compensates for increases and decreases in the operating current of the differential amplifier.
に応動して電流を供給する可変電流源で構成したことを
特徴とする特許請求の範囲第１項に記載の自動利得制御
回路。(2) The automatic gain control circuit according to claim 1, wherein the current compensation circuit is constituted by a variable current source that supplies current in response to current control of the differential amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16908484A JPS6148208A (en) | 1984-08-13 | 1984-08-13 | Automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16908484A JPS6148208A (en) | 1984-08-13 | 1984-08-13 | Automatic gain control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6148208A true JPS6148208A (en) | 1986-03-08 |
| JPH033404B2 JPH033404B2 (en) | 1991-01-18 |
Family
ID=15880022
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16908484A Granted JPS6148208A (en) | 1984-08-13 | 1984-08-13 | Automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6148208A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0284804A (en) * | 1988-09-20 | 1990-03-26 | Nec Corp | Gain control circuit |
| US6049252A (en) * | 1997-06-30 | 2000-04-11 | Nec Corporation | Programmable-gain amplifier |
-
1984
- 1984-08-13 JP JP16908484A patent/JPS6148208A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0284804A (en) * | 1988-09-20 | 1990-03-26 | Nec Corp | Gain control circuit |
| US6049252A (en) * | 1997-06-30 | 2000-04-11 | Nec Corporation | Programmable-gain amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH033404B2 (en) | 1991-01-18 |
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