JPS6146630A - 2-wire/4-wire converting circuit - Google Patents
2-wire/4-wire converting circuitInfo
- Publication number
- JPS6146630A JPS6146630A JP16900584A JP16900584A JPS6146630A JP S6146630 A JPS6146630 A JP S6146630A JP 16900584 A JP16900584 A JP 16900584A JP 16900584 A JP16900584 A JP 16900584A JP S6146630 A JPS6146630 A JP S6146630A
- Authority
- JP
- Japan
- Prior art keywords
- wire
- circuit
- line
- balanced
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/54—Circuits using the same frequency for two directions of communication
- H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/581—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using a transformer
- H04B1/582—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using a transformer with automatic balancing
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Interface Circuits In Exchanges (AREA)
Abstract
Description
【発明の詳細な説明】
（技術分野）
本発明は２線４線変換回路、特に電話機端末を変換回路
に関する。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a two-wire/four-wire conversion circuit, and particularly to a conversion circuit for a telephone terminal.
（従来技術）
従来、電話交換機等において２線式の加入者回線を４線
式交換機に接続するために、２線４線変換回路が用いら
れている。この２線４線変換回路には幾つかの方式のも
のが実用に供されているが、倒れも線路インピーダンス
に等価の特性をもつ２端子網、所謂平衡結線網が接続さ
れている。そこでこの平衡結線網が充分線路インピーダ
ンスに等価な特性であれば、４線の入側から２線側への
信号は４線の出側へ廻込むことなく、２線４線変換回路
での反書による不都合が生じない。しかし通話路スイッ
チ網に電子部品等を用いた４線式加入者交換機において
、線路長がそわぞれ異なる多数の加入者を収容する場合
に、−々線路インピーダンスを測定して、これに等価の
平衡結線網を取付けることは極めて繁雑なことである。(Prior Art) Conventionally, a two-wire/four-wire conversion circuit has been used in a telephone exchange or the like to connect a two-wire subscriber line to a four-wire exchange. Several types of 2-wire and 4-wire conversion circuits are in practical use, and a so-called balanced connection network, which is a two-terminal network having characteristics equivalent to the line impedance, is connected. Therefore, if this balanced wiring network has sufficient characteristics equivalent to the line impedance, the signal from the input side of the 4-wire to the 2-wire side will not go around to the output side of the 4-wire, and will be reflected in the 2-wire/4-wire conversion circuit. There will be no inconvenience caused by writing. However, when accommodating a large number of subscribers with different line lengths in a 4-wire subscriber exchange that uses electronic components in the communication path switch network, the line impedance is measured and the equivalent value is calculated. Installing a balanced wire network is extremely complicated.
そこで一般には、２線４線変換回路に線路インピーダン
スの統計的平均値に近い等ｆ」特性を持った平吻結線網
を一律に接続［７、若干の廻込みを我慢するとか、平衡
結線網を複数設けておいて、２線４線変換回路での回シ
込みが最も少なくなるような平衡結線網を加入右回線毎
に手動のスイッチで選択するなどして、不都合を凌いで
いる。Therefore, in general, a flat wire connection network having equal f' characteristics close to the statistical average value of the line impedance is uniformly connected to the 2-wire 4-wire conversion circuit [7. This inconvenience is overcome by providing a plurality of 2-wire and 4-wire conversion circuits and selecting the balanced connection network that minimizes the number of inputs in the 2-wire/4-wire conversion circuit using a manual switch for each right line.
（発明の目的）
本発明は上記の欠点を除去１〜、線路長に従って変化す
る通話電流値に対応ｌ−て、平衡結線網に設けた抵抗値
および容量値等を自動的に変えることによって、従来よ
り格段に線路インピーダンスに近い等何時性を持った平
衡結線網を有する２線４線変換回路を提供することにあ
る。(Objective of the Invention) The present invention eliminates the above-mentioned drawbacks by automatically changing the resistance value, capacitance value, etc. provided in the balanced wiring network in response to the communication current value that changes according to the line length. It is an object of the present invention to provide a two-wire and four-wire conversion circuit having a balanced connection network having temporal properties much closer to line impedance than conventional ones.
（発明の構成）
本発明の２線４線変換回路は、２線線路の遠端に電話機
端末を接続し、この線路の近端に接続された通話電流供
給回路を含む２線４線変換回路に網手段と、前記検出手
段の出力により前記平衡結線網手段を制御する制御手段
とを含んで構成される。また以上の構成において平衡結
線網手段が可変抵抗回路と、この回路に並列に設けられ
たコンデンサと電子スイッチとを直列とした複数の回路
を含む回路とで構成される。なおまた、前記の構成にお
いて、平衡結線網手段が可変抵抗回路と可変容量回路と
の合成回路を含む回路で構成される。(Structure of the Invention) The 2-wire 4-wire conversion circuit of the present invention includes a telephone terminal connected to the far end of a 2-wire line, and a communication current supply circuit connected to the near end of the line. and a control means for controlling the balanced connection network means based on the output of the detection means. Further, in the above configuration, the balanced wiring network means is constituted by a variable resistance circuit and a circuit including a plurality of circuits in which capacitors and electronic switches connected in parallel are connected to the variable resistance circuit. Furthermore, in the above configuration, the balanced wiring network means is constituted by a circuit including a composite circuit of a variable resistance circuit and a variable capacitance circuit.
（発明の実施例）
以下、本発明の実施例について図面を参照して詳細に説
明する。(Embodiments of the Invention) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
第１図は本発明の一実施例のブロック図で、２線線路側
か地気に対して平衡のとられたループ凹線であり、４線
側か地気を共通にした送信側と受信側である場合を示し
ている。図においてトランスＴの２線側コイルは直流阻
止のコンデンサＣを中間に接続したコイルＬ、およびり
、からなり、線路ＬＮに接続されている。この線路の遠
端に電話機端床置が接続されている。またコイルＬ１お
よびＲ２のそれぞれの線路側には交流阻止のコイルＬｌ
＋およびり、が接続されて、コイルＬ、の他端は抵抗Ｒ
Ｏを介して通話電流供給用の一電源Ｅ（一般に一４８ボ
ルト）に接続され、コイルＬ、の他端は抵抗Ｒ１を介し
て地気に接続されている。トランスＴのコイルＬ３の一
端は４線回路の送信側に接続され、他端はトランスＴの
コイルＬ４と直列に接続されて、この接続点は平衡結線
網ＢＮを介して地気に接続されている。またコイルＬ、
の他端は４線回路の受信側に接続されている。なおまた
、コイルＬ、から送信側を見たインピーダンスとコイル
Ｌ４から受信側を見たインピーダンスを等しくするため
、コイルＬ３と送信用増幅器８ＮＤとの間にＲ７を、
コイルＬ４の負荷としてＲ・３が挿入されている。さら
にまた、抵抗Ｒ，とコイルＬ６との接続点は制御回路Ｃ
０ＮＴに接続されていて、通話電流に対応する電圧をこ
の制御回路Ｃ０ＮＴに与えている。また制御回路Ｃ０Ｎ
Ｔからの制御出力が平衡結線網ＢＮに与えられている。Fig. 1 is a block diagram of an embodiment of the present invention, in which the loop concave line is balanced with respect to the ground air on the 2-line side, and the transmitting side and the receiving side, which share the ground air on the 4-line side. It shows the case where it is on the side. In the figure, the two-wire side coil of the transformer T consists of a coil L and a coil L to which a DC blocking capacitor C is connected in the middle, and is connected to a line LN. A telephone end floor stand is connected to the far end of this line. Also, on the line side of each of the coils L1 and R2, there is a coil Ll for blocking AC.
+ and ri are connected, and the other end of the coil L is connected to the resistor R.
The coil L is connected to a power source E (generally 148 volts) for supplying communication current via the coil L, and the other end of the coil L is connected to the earth via a resistor R1. One end of the coil L3 of the transformer T is connected to the transmitting side of the four-wire circuit, the other end is connected in series with the coil L4 of the transformer T, and this connection point is connected to the ground via a balanced wire network BN. There is. Also, coil L,
The other end is connected to the receiving side of the 4-wire circuit. Furthermore, in order to equalize the impedance seen from the coil L on the transmitting side and the impedance seen from the coil L4 on the receiving side, R7 is connected between the coil L3 and the transmitting amplifier 8ND.
R.3 is inserted as a load for coil L4. Furthermore, the connection point between the resistor R and the coil L6 is the control circuit C.
0NT, and applies a voltage corresponding to the communication current to this control circuit C0NT. Also, the control circuit C0N
A control output from T is provided to a balanced wiring network BN.
第２図は第１図における制御回路Ｃ０ＮＴと平衡結線網
ＢＮの一実施例で、通話電流に対応して平衡結線網の抵
抗値を連続的に変化し、コンデンサを段階的に変化する
場合を示している。図において、平衡結線網ＢＮは抵抗
Ｒ１゜と直流阻止用のコンデンサＣ２０とトランジスタ
ＴＲＯとの直列回路に、それぞれスイッチングトランジ
スタＴ Ｒ，。FIG. 2 shows an example of the control circuit C0NT and the balanced wiring network BN in FIG. It shows. In the figure, the balanced wiring network BN includes a series circuit of a resistor R1, a DC blocking capacitor C20, and a transistor TRO, and a switching transistor TR, respectively.
ＴＲ，・・・Ｔ Ｒｎを直列に接続したコンデンサＣ２
，。Capacitor C2 with TR,...T Rn connected in series
,.
（’ｔ・・・ＣｐＢが並列に接続されて構成されている
。('t...CpB are connected in parallel.
一方、制御回路Ｃ０ＮＴの制御入力端子ＴＣＯＮＴは反
転増幅器ＡＭＰＯＫ接続され、ＲＩの一端に生じた電圧
を反転増幅し、さらにＡＭＰＯの出力と直流バイアス用
電源の間に抵抗Ｒ１１とＲ□が直列に接続され、これら
の抵抗の接続点とＴＫＯの制御極とて接続されている。On the other hand, the control input terminal TCONT of the control circuit C0NT is connected to an inverting amplifier AMPOK, which inverts and amplifies the voltage generated at one end of RI, and further, resistors R11 and R□ are connected in series between the output of AMPO and the DC bias power supply. The connection point of these resistors is connected to the control pole of TKO.
また制御入力端子と地気との間にｎ＋１個の抵抗ｆＬ２
Ｂ 、 Ｒ２４・”、Ｒ２（ｎ＋ｍ）が直列に接続され
ていて、それらの抵抗の接続点とスイッチングトランジ
スタＴＲ，、Ｒ２・・・ＴＲｎ０それぞれの制御極とが
接続されている。In addition, n+1 resistors fL2 are connected between the control input terminal and the earth.
B, R24.'', and R2(n+m) are connected in series, and the connection point of these resistors is connected to the control pole of each of the switching transistors TR, R2...TRn0.
ところで電話機端末を線路の遠端に接線し、近端より線
路を見たインピーダンスは、抵抗Ｒ，とコンデンサＣＬ
との合成回路として近似することができ、第３図に示す
ごとく線路長に従って、抵抗Ｒｔ、の値は電話機端末の
値から増加して一定値に暫近し、コンデンサＣＬの値は
０から増加して一定値に暫近する。また通話電流■Ｄｃ
は同じく第３図に示すごとく、線路長に比例する線路抵
抗と電話機端末などの一定抵抗との和ＴＬｎｃ に対応
した値をとる。By the way, when the telephone terminal is connected to the far end of the line and the line is viewed from the near end, the impedance is the resistance R, and the capacitor CL.
As shown in Figure 3, according to the line length, the value of the resistor Rt increases from the value of the telephone terminal and approaches a constant value, and the value of the capacitor CL increases from 0. and approaches a constant value for a while. Also, the call current ■Dc
Similarly, as shown in FIG. 3, takes a value corresponding to the sum TLnc of the line resistance proportional to the line length and the constant resistance of the telephone terminal, etc.
次に第１図、第２図および第３図を参照して本発明の動
作について説明を進める。なおトランスＴのコイルＬ３
とＲ４とは同じ巻数で、それぞれコイルＬ１とＬｔとの
和の巻数と同じものとする。Next, the operation of the present invention will be explained with reference to FIGS. 1, 2, and 3. In addition, coil L3 of transformer T
and R4 have the same number of turns, and are each the same number of turns as the sum of coils L1 and Lt.
従ってこの場合は平衡結線網は線路インピーダンスと同
じ値が選ばれることになる。さて通話電流供給回路に設
けられたＲ８には、第３１ｉＺＫ示した通話電流Ｉｎｃ
に比例したＩｎｃＸＲ，の負電圧が発生し、通話路電流
を検出する。この負電圧は制御回路Ｃ０ＮＴの反転増幅
器ＡＭＰＯにより反転増幅されて正電圧となシさらに抵
抗Ｒ２，、Ｒ２２により分圧されて、トランジスタの制
御極に接続される。このトランジスタには電界効果トラ
ンジスタが選ばれ、制御極に入力する電圧によって導通
抵抗が変化する可変抵抗器として卸１らき、線路が短か
く通話市、流が大きい場合には制御極電圧が大となって
低抵抗値を示し、線路が長く通話電流が小さい場合には
制御極電圧が小となって高抵抗値を示す。本回路では抵
抗Ｒ・２ｏと直列に接続されたトランジスタ’］”ＲＯ
との直列にした抵抗値が、通話電流に対応し７た順方向
電流を流ずことにより、線路長に対応した抵抗Ｒルと近
くなるように設定されている。一方反転増幅ＡＭＰＯの
出力は抵抗Ｒ２３ｒ ′ｆＬ２４ ”’Ｒ２（ｎ十３）
で分圧されていて、線路が短かくて検出電圧が小さい場
合には、何れのスイッチングトランジスタもオフ状態に
なっていて、コンデンサＣ２１ｐ Ｃ２２ｇ・・・Ｃ２
ｎの倒れも接続されない状態になっている。しかし路線
が長くて検出電圧が大きくなるに従って、ＴＲ，、、Ｔ
Ｆｔ２・・・と順次オン状態になり、Ｃ２１＋ Ｃ２ｔ
・・・が順に接続はれた状態になる。これらのコンデン
サの値は通話電流、即ち線路長に対応して加算されるよ
うに設定され、線路のコンデンサ分ＣＬに対応した値を
とるようになっている。従って通話電流の大きさに対応
して平衡結ｉ？ｌの抵抗値とコンデンサの値が、決めら
れた線路インピーダンスの近似値をとることができる。Therefore, in this case, the balanced wiring network will have the same value as the line impedance. Now, R8 provided in the communication current supply circuit has the communication current Inc shown in the 31st iZK.
A negative voltage of IncXR, proportional to , is generated and the communication path current is detected. This negative voltage is inverted and amplified by the inverting amplifier AMPO of the control circuit C0NT to become a positive voltage, which is further divided by resistors R2, R22 and connected to the control pole of the transistor. A field-effect transistor is selected for this transistor, and it is used as a variable resistor whose conduction resistance changes depending on the voltage input to the control pole.If the line is short and the line is short, or if the current is large, the control pole voltage will be large. When the line is long and the communication current is small, the control pole voltage becomes small and the resistance value is high. In this circuit, the transistor ']”RO is connected in series with the resistor R・2o.
The resistance value connected in series with R is set to be close to the resistance R corresponding to the line length by passing a forward current corresponding to the communication current. On the other hand, the output of the inverting amplifier AMPO is resistor R23r'fL24'''R2(n+3)
If the line is short and the detected voltage is small, all switching transistors are in the off state, and the capacitors C21p, C22g...C2
The tip of n is also not connected. However, as the line becomes longer and the detected voltage becomes larger, TR,...,T
Ft2... is turned on sequentially, and C21+C2t
... become connected in sequence. The values of these capacitors are set to be added in accordance with the communication current, that is, the line length, and take a value corresponding to the capacitor portion CL of the line. Therefore, depending on the magnitude of the communication current, the balanced connection i? The resistance value of l and the value of the capacitor can approximate the determined line impedance.
なお、抵抗Ｒ３１〜Ｒ３ｎけそれぞれコンデンサＣ２１
〜Ｃ５と直列に接続され、実際の線路インピーダンスに
合う抵抗値が選けれる。In addition, each of the resistors R31 to R3n has a capacitor C21.
~C5 is connected in series, and a resistance value matching the actual line impedance is selected.
以上の実施例で祉、平衡結線網の抵抗値を連続的に変え
ることのできる構成としたが、電流（又は電圧）制御可
変抵抗器の代りにコンデンサの場合と同じく、検数の抵
抗器とスイッチング素子を用い段階的に変什させること
も容易にできる。In the above embodiment, the resistance value of the balanced wiring network can be changed continuously, but instead of the current (or voltage) controlled variable resistor, a multiplier resistor is used as in the case of a capacitor. It is also easy to change it step by step using switching elements.
なおまた、上記の実施例では２線４線変換にトランスＴ
による回路構成としたが、ハイブリッドコイルを用いた
場合の平衡結線網についても、全−許「
く同じに適用できることは明らかである。Furthermore, in the above embodiment, a transformer T is used for 2-wire and 4-wire conversion.
However, it is clear that the same applies to balanced wiring networks using hybrid coils.
第４図は本発明における別の実施例を示すブロック図で
、２線側および４線側の条件が第１図の場合と同じで、
従って通話電流供給回路も第１図と同じであるが、２線
４線変換回路が増幅器の組合せによる電子回路で構成さ
れている場合を示している。図において４線側から２線
側への信号は、位相を変えない増幅器ＡＭＰＩと位相を
反転する増幅器ＡＭＰ２ により平衡信号に変換され、
出力の２線のそれぞれの直流阻止のコンデンサＣ４，。FIG. 4 is a block diagram showing another embodiment of the present invention, in which the conditions on the 2-wire side and the 4-wire side are the same as in FIG.
Therefore, the communication current supply circuit is also the same as that shown in FIG. 1, but the 2-wire/4-wire conversion circuit is constructed of an electronic circuit consisting of a combination of amplifiers. In the figure, the signal from the 4-wire side to the 2-wire side is converted into a balanced signal by an amplifier AMPI that does not change the phase and an amplifier AMP2 that inverts the phase.
DC blocking capacitor C4, for each of the two output wires.
Ｃ４２および整合用抵抗Ｒ４１、Ｒ４２”！：介して線
路に送出される。また２線側からの信号は、それぞれ直
流阻止のコンデンサＣ４３，Ｃ４４および第１の分圧用
抵抗Ｒ１，３，Ｒ１，、を介して平衡形の増幅器ＡＭＰ
３に入力される。なおこの増幅器ＡＭＰ３の入力に第２
の分圧用抵抗Ｒ４６およびＲ４７が接続され他端が地気
または地気と等価の増幅器ＡＭＰ４の出力に接続されて
、第１の分圧用抵抗とで線路 インピーダンスに対し、
高インピーダンスの受信系を構成している。一方増幅器
ＡＭＰＩ の出力にコンデンサＣ０、抵抗Ｒ４，および
平衡結線網ＨＢＮを直列に接続し地気されている。また
この平衡結線網ＨＢＮと抵抗Ｒ４Ｗとの接続点ＰＢＮは
２倍の利得を有する増幅器ＡＭＰ４の入力に接続さｔｌ
ていて、平伎−結線網ＨＢＮは第１図と同じく制御回路
Ｃ０ＮＴに接続されて制御を受ける。ところで、この２
１ＩＭ４線変換回路においては、増幅器ＡＭＰＩ から
され出力された信号は抵抗Ｒ，，を経て線路に送出され
ると共に増幅器ＡＭＰ３ にも入力されるので、線絡に
送出される信号と同じ信号を増幅器ＡＭＰ３ の平衡入
力の相手ｆｉｆｌｉ Ｋ ＭｊＡｋ入力することにより
杓消している。なおまた線路へ送出される信号は増幅器
ＡＭＰ２からも対照出力の形で送出されるので、上記の
拐消しのｍｌ入力は片線から得られた出力を増幅器ＡＭ
Ｐ４で２倍している。ところで本回路構成によれば、コ
ンデンサＣ４１，Ｒ４４および線よび平衡結線［ＨＢＮ
を上記の実際の回路に対して比例して高インピーダンス
で設定し得る。例えば１００倍にも取り得るので、この
場合には当然平衡結線網も１００倍のインピーダンスで
設定される。第５図はこのような回路構成で好適な平衡
結線網とその制御回路の一例を示［７ている。この回路
において、直流阻止用のコンデンサＣＮと直列に設けら
れた電圧制御可変容量ダイオードＶＣと、一定抵抗１モ
Ｎにｒ１列に設けられた可変抵抗として用いられるＦＥ
Ｔ）ランジスタＶＲとを並列にしてｓＦ衡結課網が作ら
れている。抵抗Ｒ１によって検出された負電圧は抵抗Ｒ
３，とＲＩＩ□によシ分圧されて電出制卸町変容量ダイ
オードＶＣに与えられ、線路が短かく魚箱；圧が大きＩ
／−１場合にはＶＣは小さな容量として働き、線路が長
い場合にはこの逆に大きな容量として働く。またこの検
出された負電圧は、十−を逆転する直流増幅器ＡＭＰ５
に与えられ、その出力は定電圧ダイオードＺＤ。C42 and matching resistors R41, R42"!: are sent to the line. Signals from the two-wire side are sent to the line through DC blocking capacitors C43, C44 and first voltage dividing resistors R1, 3, R1, . . . Balanced amplifier AMP via
3 is input. Note that the second input to the input of this amplifier AMP3 is
The voltage dividing resistors R46 and R47 are connected, and the other end is connected to the earth or the output of the amplifier AMP4 equivalent to the earth, and the first voltage dividing resistor is connected to the line impedance.
It constitutes a high impedance receiving system. On the other hand, a capacitor C0, a resistor R4, and a balanced wiring network HBN are connected in series to the output of the amplifier AMPI and connected to the ground. Also, the connection point PBN between this balanced wiring network HBN and the resistor R4W is connected to the input of the amplifier AMP4 having twice the gain.
Similarly to FIG. 1, the Heikai connection network HBN is connected to the control circuit C0NT and receives its control. By the way, these two
In the 1IM 4-wire conversion circuit, the signal output from the amplifier AMPI is sent to the line via the resistor R, and is also input to the amplifier AMP3, so the same signal sent to the line is sent to the amplifier AMP3. It is canceled by inputting the counterpart fifli K MjAk of the balanced input. Furthermore, since the signal sent to the line is also sent out in the form of a symmetrical output from the amplifier AMP2, the above-mentioned ml input for canceling the output from one line is sent to the amplifier AM2.
It is doubled in P4. By the way, according to this circuit configuration, capacitors C41 and R44 and line and balanced connections [HBN
can be set at a proportionally high impedance for the actual circuit described above. For example, the impedance can be increased to 100 times, so in this case, the balanced wiring network is naturally set to have an impedance of 100 times. FIG. 5 shows an example of a balanced wiring network suitable for such a circuit configuration and its control circuit [7]. In this circuit, a voltage controlled variable capacitance diode VC is provided in series with a capacitor CN for DC blocking, and a variable resistor FE used as a variable resistor is provided in r1 series with a constant resistor of 1 MON.
T) An sF balancing network is created by connecting the transistor VR in parallel. The negative voltage detected by resistor R1 is
3, the voltage is divided by RII□ and given to the output control wholesale variable diode VC, and the line is short and the fish box; the pressure is large I
/-1, VC acts as a small capacitor, and conversely, when the line is long, it acts as a large capacitor. Moreover, this detected negative voltage is applied to the DC amplifier AMP5 which reverses the negative voltage.
and its output is a constant voltage diode ZD.
抵抗Ｒ，８，ＲＩ＋、、負電源−■からなる直列回路に
ょＦ）レヘルシフトされてＦ’ＥＴ）ランジスタのゲー
トに与えられている。そこで線路が短かく検出負電圧が
大きい場合には、ＰＥ’ｌ’）ランジスタは低抵抗とし
て働らき、ａｍが長い場合にはその逆となる。なお可変
容量ダイオードＶＣ，ＰＥＴ）ランジスタＶＲは制御電
圧との関連で選択されるが、前記のごとく１００倍のイ
ンピーダンスで構成されている場合に、線路の容量ＣＬ
が１００ ｎＦ１抵抗ＲＬが１にΩに対しては、この平
衡結線網ではそれぞれ１００ＯＰＦ、１００にΩとなる
ように構成される。また抵抗Ｒ・１は可変容量ダイオー
ドＶＣと直列に接続され、実際の線路インピーダンスに
合う値が選ばれる。A series circuit consisting of resistors R, 8, RI+, and a negative power supply - (F) is level-shifted and applied to the gate of the F'ET) transistor. Therefore, when the line is short and the detected negative voltage is large, the PE'l' transistor acts as a low resistance, and vice versa when am is long. Note that the variable capacitance diode VC, PET) transistor VR is selected in relation to the control voltage, but when it is configured with 100 times the impedance as described above, the line capacitance CL
For a resistor RL of 100 nF and 100 Ω, this balanced network is configured to have 100 OPF and 100 Ω, respectively. Further, the resistor R.1 is connected in series with the variable capacitance diode VC, and a value that matches the actual line impedance is selected.
（発明の効果）
以上詳細に説明したとおシ本発明は、それぞれ異なる線
路長を有する線路に接続された２ｆｓ４＃変換回路の平
衡結線網を自動的に線路インピーダンスの特性に近似整
合させることができ、４線での廻込みを一律に同じ値の
平衡結線網を接続した場合に較べ、一部の線路に対して
甚しい不整合を生ずることなく、多くの線路に対して格
段に良好な整合がとれると云う効果がある。(Effects of the Invention) As described above in detail, the present invention can automatically approximately match the balanced wiring network of 2fs4# conversion circuits connected to lines having different line lengths to the characteristics of line impedance. , compared to connecting a balanced wiring network with the same value for all four wires, there is no significant mismatching for some lines, and much better matching is achieved for many lines. It has the effect of removing
−１：ｊ”）-1:j”)
第１図は本発明の一実施例のブロック図、第２図は第１
図の制御回路と平衡結線網の一例を示す回路図、第３図
は遠端に電話機端末を接続した線路の線路長に対する特
性曲線、第４図は本発明の別の実施例のブロック図、第
５図は第４図の制御回路と平衡結線網の一例を示す回路
図である。
Ｔ・・・・・・トランス％ Ｌｌ ｌ Ｌ、 ｊ Ｌｍ
ｒ Ｒ４・・・・・・トランスの巻線ｓ Ｌｌ 、
Ｒ６・・・・・・交流阻止用コイル、ＲＯ・・・・・・
抵抗、ＬＮ・・・・・・線路、置・・・・・・電話機端
末、Ｃ０ＮＴ・・・・・・制御回路、ＢＮ、ＨＢＮ・・
・・・・平衡結線網、Ｒ１・・・・・・通話電流検出用
抵抗％ Ｃ２０ｒ Ｃ２１・・・・・・Ｃ！ｆｌ・・・
・・・コンデンサ、’Ｉ’ＲＯ・・・・・・トランジス
タ。
Ｔ Ｒ，、Ｔ Ｒ，・・・・・・ＴＲ１１・・・・・・
スイッチングトランジスタ、ＥＯ・・・・・・直流バイ
アス用電源、ＡＭＰＯ−・・・・・反転増幅器、ＡＭＰ
、、ＡＭＰ、・・・・・・ＡＭＰ、・・・・・・増幅器
、ＶＣ・・・・・・電圧制御可変容量ダイオード、ＶＲ
・・・・・・ＦＥＴ ）ランジスタ、Ｒ５Ｎ・・・・・
・抵抗。FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 3 is a circuit diagram showing an example of the control circuit and balanced wiring network shown in FIG. 3; FIG. 3 is a characteristic curve of a line connecting a telephone terminal at the far end with respect to the line length; FIG. 4 is a block diagram of another embodiment of the present invention; FIG. 5 is a circuit diagram showing an example of the control circuit and balanced wiring network of FIG. 4. T...Trans% Ll l L, j Lm
r R4...Transformer winding s Ll,
R6... AC blocking coil, RO...
Resistor, LN...Line, Placement...Telephone terminal, C0NT...Control circuit, BN, HBN...
...Balanced wiring network, R1...Resistance for detecting call current % C20r C21...C! fl...
...Capacitor, 'I'RO...Transistor. TR,,TR,...TR11...
Switching transistor, EO...DC bias power supply, AMPO-...Inverting amplifier, AMP
,,AMP,...AMP,...Amplifier, VC...Voltage controlled variable capacitance diode, VR
...FET) transistor, R5N...
·resistance.
Claims (3)
の近端に接続された通話電流供給回路を含む２線４線変
換回路において、通話電流値の検出手段と、前記２線４
線変換回路に設けられて回路定数を可変できる平衡結線
網手段と、前記検出手段の出力により前記平衡結線網手
段を制御する制御手段とを有することを特徴とする２線
４線変換回路。(1) In a two-wire four-wire converter circuit including a telephone terminal connected to the roadside of a two-wire line and a speech current supply circuit connected to the near end of the line, the two-wire four-wire
A 2-wire/4-wire conversion circuit comprising: balanced wiring network means provided in the line conversion circuit and capable of varying circuit constants; and control means for controlling the balanced wiring network means based on the output of the detection means.
変抵抗回路に並列に設けられそれぞれコンデンサおよび
電子スイッチの直列体を有する複数の回路とを備えるこ
とを特徴とする特許請求の範囲第（１）項記載の２線４
線変換回路。(2) The balanced wiring network means includes a variable resistance circuit and a plurality of circuits provided in parallel with the variable resistance circuit and each having a capacitor and an electronic switch in series. 2 lines 4 mentioned in (1)
Line conversion circuit.
量回路とが並列に接続される合成回路を備えることを特
徴とする特許請求の範囲第（１）項記載の２線４線変換
回路。(3) The two-wire four-wire conversion according to claim (1), wherein the balanced connection network means includes a composite circuit in which a variable resistance circuit and a variable capacitance circuit are connected in parallel. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16900584A JPS6146630A (en) | 1984-08-13 | 1984-08-13 | 2-wire/4-wire converting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16900584A JPS6146630A (en) | 1984-08-13 | 1984-08-13 | 2-wire/4-wire converting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6146630A true JPS6146630A (en) | 1986-03-06 |
Family
ID=15878575
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16900584A Pending JPS6146630A (en) | 1984-08-13 | 1984-08-13 | 2-wire/4-wire converting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6146630A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04114930U (en) * | 1991-03-26 | 1992-10-12 | 日本鉄道建設公団 | Side wall formwork positioning adjustment device |
-
1984
- 1984-08-13 JP JP16900584A patent/JPS6146630A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04114930U (en) * | 1991-03-26 | 1992-10-12 | 日本鉄道建設公団 | Side wall formwork positioning adjustment device |
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