JPS6136976A - Manufacture of semiconductor memory device - Google Patents

Manufacture of semiconductor memory device

Info

Publication number
JPS6136976A
JPS6136976A JP15966284A JP15966284A JPS6136976A JP S6136976 A JPS6136976 A JP S6136976A JP 15966284 A JP15966284 A JP 15966284A JP 15966284 A JP15966284 A JP 15966284A JP S6136976 A JPS6136976 A JP S6136976A
Authority
JP
Japan
Prior art keywords
oxide film
silicon
silicon oxide
film
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15966284A
Other languages
Japanese (ja)
Other versions
JPH0665232B2 (en
Inventor
Isao Murakami
村上 勇雄
Kazuo Sato
和夫 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP59159662A priority Critical patent/JPH0665232B2/en
Publication of JPS6136976A publication Critical patent/JPS6136976A/en
Publication of JPH0665232B2 publication Critical patent/JPH0665232B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To obtain the MONOSFET comprising good memory maintaining properties by implanting hydrogen ions after forming the second silicon oxide film on a silicon nitride film and further subjecting the substrate to a heat treatment at the same temperature as in the case of forming the silicon nitrde film. CONSTITUTION:A source region 2 and a drain region 3 are formed on an N type silicon substrate 1 and a silicon oxide film 5 is formed in an opening part of a silicon oxide film 4. Next, after a silicon nitride film 6 is gas-phase grown on said silicon film 5, the surface of silicon film 6 is oxidized by a heat treatment to produce a silicon oxide film 7. Subsequently, hydrogen ions 8 are implanted into the whole substrate, after which the heat treatment at the same temperature as in the case of forming the silicon nitride film 6 is effected. Lastly, an aluminum electrode 9 and a silicon oxide film 10 are formed and thus the P-channel MONOS nonvolatile memory device is fabricated.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、MONO3(金属−酸化シリコン膜−窒化シ
リコン膜−酸化シリコン膜−半導体)型の電界トランジ
スタから成る半導体記憶装置の製造方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor memory device comprising a MONO3 (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) type field transistor. .

21\ 。21\.

従来例の構成とその問題点 従来より半導体記憶装置の1つとして、薄い酸化シリコ
ン膜上に窒化シリコン膜を成長させ、その上に金属電極
を形成したMNOS(金属−窒化シリコン膜−酸化シリ
コン膜−半導体)構造の半導体装置がよく知られている
。このMNO8型半導体記憶装置のプログラム電圧の低
電圧化を実現するために、ゲート絶縁膜のうち窒化シリ
コン膜を薄膜化すると同時に、この窒化シリコン膜を熱
酸化して、窒化シリコン膜上に酸化シリコン膜を形成し
た、いわゆる、MONO8(金属−酸化シリコン膜−窒
化シリコン膜−酸化シリコン膜−半導体)構造の半導体
記憶装置が知られている。
Conventional Structure and Problems Traditionally, as a semiconductor memory device, MNOS (metal-silicon nitride film-silicon oxide film) is a semiconductor memory device in which a silicon nitride film is grown on a thin silicon oxide film and a metal electrode is formed on the silicon nitride film. - Semiconductor devices with a semiconductor structure are well known. In order to reduce the programming voltage of this MNO8 type semiconductor memory device, the silicon nitride film of the gate insulating film is made thinner, and at the same time, this silicon nitride film is thermally oxidized to form silicon oxide on the silicon nitride film. A semiconductor memory device having a so-called MONO8 (metal-silicon oxide film-silicon nitride film-silicon oxide film-semiconductor) structure in which a film is formed is known.

しかしながら、このMONOS構造の半導体記憶装置は
、その製造方法において、窒化ンリコン膜を熱酸化する
際に、通常9Q○°C以上の高温を−必要とするので、
窒化シリコン膜質が変化し、不MONO5型の半導体記
憶装置は、従来のMNOS型の半導体記憶装置と同様、
窒化シリコン膜と極薄の酸化シリコン膜の界面、又は窒
化シリコン膜バルク中に分布するトラップに、半導体側
から極薄の酸化シリコン膜を介して行なわれる電荷のト
ンネリング注入と、その蓄積によりトランジスタのしき
い値電圧(Vth )を変化させ、情報を記憶させるも
のである。従って、その記憶保持特性の確保が最大の課
題であり、窒化シリコン膜上を熱酸化する場合の記憶保
持特性の悪化は最大の問題となっている。
However, in the manufacturing method of this MONOS structure semiconductor memory device, a high temperature of 9Q°C or higher is usually required when thermally oxidizing the silicon nitride film.
The quality of the silicon nitride film has changed, and non-MONO5 type semiconductor memory devices are similar to conventional MNOS type semiconductor memory devices.
The tunneling injection of charge from the semiconductor side through the ultra-thin silicon oxide film and its accumulation into the traps distributed at the interface between the silicon nitride film and the ultra-thin silicon oxide film or in the bulk of the silicon nitride film cause the transistor to become The threshold voltage (Vth) is changed to store information. Therefore, ensuring the memory retention characteristics is the biggest challenge, and deterioration of the memory retention characteristics when thermally oxidizing the silicon nitride film is the biggest problem.

発明の目的 不発明の目的は、MONO8型電界トランジスタからな
る半導体記憶装置における不揮発性能、特に記憶保持特
性の優れた高性能の半導体記憶装置の製造方法を提供す
ることである。
OBJECTS OF THE INVENTION An object of the invention is to provide a method for manufacturing a high-performance semiconductor memory device having excellent non-volatile performance, particularly memory retention characteristics, in a semiconductor memory device made of MONO8 type field transistors.

発明の構成 上記目的を達成するために、本発明は、窒化シ・リコン
膜上に第2の酸化シリコン膜を形成した後・に、水素イ
オンを注入し、さらに窒化シリコン膜の形成温度と同じ
温度で熱処理することを特徴とするものである。
Structure of the Invention In order to achieve the above object, the present invention involves implanting hydrogen ions after forming a second silicon oxide film on a silicon nitride film, and further increasing the temperature at the same temperature as that of the silicon nitride film. It is characterized by heat treatment at high temperatures.

窒化シリコン膜の熱酸化による記憶保持時f1の悪化は
、窒化シリコン膜中に含腫れる水素、特に5i−H結合
の含有量に関係があり、Si  H結合の多い窒化シリ
コン膜は9o○°C以上の温度で熱酸化を行なうことに
より、5i−H結合が少なく々す、不安定なトラップが
増加し、記憶保持特性が悪化する。即ち、窒化シリコン
膜の熱酸化による記憶保持特性の悪化は、窒化シリコン
膜形成の際の水素含有量に大きく依存している。
The deterioration of f1 during memory retention due to thermal oxidation of the silicon nitride film is related to the hydrogen contained in the silicon nitride film, especially the content of 5i-H bonds. By performing thermal oxidation at a temperature above, the number of 5i-H bonds decreases, unstable traps increase, and memory retention characteristics deteriorate. That is, deterioration in memory retention characteristics due to thermal oxidation of a silicon nitride film largely depends on the hydrogen content during formation of the silicon nitride film.

本発明は、トンネリング媒体となり得る極薄の第1の酸
化シリコン膜」―に窒化シリコン膜、続いて第2の酸化
シリコン膜を形成した後に、水素イオンを注入し、さら
に窒化シリコン膜形成温度と同じ温度で熱処理を行なう
ことによって優れた記憶保持特性を得ることができるも
のである。
In the present invention, after forming a silicon nitride film and then a second silicon oxide film on an ultra-thin first silicon oxide film that can serve as a tunneling medium, hydrogen ions are implanted, and the silicon nitride film forming temperature is further increased. Excellent memory retention characteristics can be obtained by performing heat treatment at the same temperature.

実施例の説明 次に本発明の具体的な実施例を図面を用いて説ものであ
る。第1図(2L)に示すようにN型のシリコン基板1
に、ソース領域2.ドレイン領域3を周知の選択拡散技
術で形成し、選択拡散時に形成した酸化シリコン膜4の
所定の部分を既知のフォトエツチングで開孔した後、こ
の開孔部分に20A程度の酸化シリコン膜5をs o 
O’C、酸素雰囲気中で形成した。
DESCRIPTION OF EMBODIMENTS Next, specific embodiments of the present invention will be explained with reference to the drawings. As shown in FIG. 1 (2L), an N-type silicon substrate 1
In the source area 2. The drain region 3 is formed by a well-known selective diffusion technique, and a predetermined part of the silicon oxide film 4 formed during the selective diffusion is opened by known photoetching, and then a silicon oxide film 5 of about 20 Å is deposited in the opened part. so
O'C, formed in an oxygen atmosphere.

次いで、第1図(b)に示すように、酸化シリコン膜5
上に、シラン(SiH4)とアンモニア(NH,)との
化学反応に基づく気相成長法によって、760°C,N
J/SiH4= 100の条件下で窒化シリコン膜6を
約300ムの厚さに形成させる。
Next, as shown in FIG. 1(b), a silicon oxide film 5 is formed.
The above was grown at 760°C with N
A silicon nitride film 6 is formed to a thickness of about 300 μm under the condition of J/SiH4=100.

次いで、窒化シリコン膜6の表面を900″C1水蒸気
雰囲気中で約60分間の熱処理で酸化し、約26ムの酸
化シリコン膜7を成長させる。
Next, the surface of the silicon nitride film 6 is oxidized by heat treatment for about 60 minutes in a 900" C1 water vapor atmosphere to grow a silicon oxide film 7 with a thickness of about 26".

次いで、第1図(Q)に示すように、水素イオン8を全
面に注入する。本実施例では、水素イオンとしてH2イ
オンを用い、加速エネルギー10 KeV 。
Next, as shown in FIG. 1(Q), hydrogen ions 8 are implanted into the entire surface. In this example, H2 ions are used as hydrogen ions, and the acceleration energy is 10 KeV.

温度と同じ温度で熱処理を行なう。本実施例では、N2
雰囲気中、750 ”Cで3o分間熱処理を行なった。
Heat treatment is performed at the same temperature as the temperature. In this example, N2
Heat treatment was performed at 750''C for 30 minutes in an atmosphere.

次に、第1図(a)に示すようにアルミニウム電極9を
通常の真空蒸着法により被着させる。
Next, as shown in FIG. 1(a), an aluminum electrode 9 is deposited by a normal vacuum deposition method.

その後、第1図(6)に示すように、保護膜として既知
の気相成長法により酸化シリコン膜10を全面に被着す
る。
Thereafter, as shown in FIG. 1(6), a silicon oxide film 10 is deposited on the entire surface as a protective film by a known vapor phase growth method.

こうして、第1図(el)に示すPチャネルMONO8
型不揮発性記憶装置を作製することができる。
In this way, the P channel MONO8 shown in FIG.
type non-volatile storage devices can be created.

本発明によって得られたMONO8型半導体記憶装置の
記憶保持特性の一例を第2図に示す。横軸は書き込み消
去直後のしきい値電圧、縦軸はそ(7)時に蓄積すれた
電荷ノ減衰率(avth/10gt、vth。
FIG. 2 shows an example of the memory retention characteristics of the MONO8 type semiconductor memory device obtained according to the present invention. The horizontal axis is the threshold voltage immediately after writing and erasing, and the vertical axis is the decay rate of the charge accumulated at that time (avth/10gt, vth).

しきい値電圧、t9時間)を示している。threshold voltage, t9 time).

第2図の特性では、直線の傾きが小さいほど記憶保持特
性が優れていることを意味している。第2図中の直線1
1は、水素イオン注入後に窒化シリコン膜の形成温度(
750’C)と同じ温度で熱処理した場合、すなわち、
本発明の実施態様で得7へ一/ もれたものの代表特性であり、この特性は、比較のため
に、窒化シリコン膜の形成温度よりも高い温度(860
°C)で熱処理した場合のものの特性直線12、及び窒
化シリコン膜形成温度よりも低い温度(650’C)で
熱処理した場合のものの特性直線13のいずれの直線よ
りも傾きが小さい。
In the characteristics shown in FIG. 2, the smaller the slope of the straight line, the better the memory retention characteristics. Line 1 in Figure 2
1 is the temperature at which the silicon nitride film is formed after hydrogen ion implantation (
When heat treated at the same temperature as 750'C), i.e.
This is a typical characteristic of what was obtained in the embodiment of the present invention, and for comparison, this characteristic is shown at a temperature higher than the formation temperature of the silicon nitride film (860°C).
The slope is smaller than that of both the characteristic line 12 obtained when the heat treatment is performed at a temperature of 650° C.) and the characteristic line 13 obtained when the heat treatment is performed at a temperature lower than the silicon nitride film formation temperature (650° C.).

即ち、水素イオン注入後において、窒化シリコン膜の形
成温度(750’C)で熱処理を行なうことにより、最
高の記憶保持特性を有するMONO8型半導体記憶装置
を作製することができた。
That is, by performing heat treatment at the silicon nitride film formation temperature (750'C) after hydrogen ion implantation, it was possible to fabricate a MONO8 type semiconductor memory device having the best memory retention characteristics.

本実施例では、N型基板を用い、Pチャネル型半導体記
憶装置を形成する場合について説明したが、nチャネル
型MONO3でも使用できることはもちろんであり、ま
たゲ・−ト電極としてポリシリコン等の高融点金属を用
いる場合にも使用できることは言う捷でもない。
In this embodiment, a case was explained in which a P-channel type semiconductor memory device was formed using an N-type substrate, but it can of course also be used for an n-channel type MONO3, and a high-temperature material such as polysilicon can be used as the gate electrode. Needless to say, it can also be used when melting point metals are used.

また本実施例では、窒化シリコン膜の形成温度が760
′Cの場合について説明を行なってきたが、750’C
以外の温度でも窒化シリコン膜形成温度で熱処理するこ
とにより最も効果があることがわかった。
Furthermore, in this example, the formation temperature of the silicon nitride film was 760°C.
We have explained the case of 750'C.
It was found that heat treatment at the silicon nitride film formation temperature is most effective even at temperatures other than the above.

発明の効果 本発明のMONO8型半導体記憶装置の製造方法によれ
ば、窒化ンリコン膜−1−に酸化シリコン膜を形成する
際に実施した熱処理に対し、水素イオンを注入し窒化シ
リコン膜形成温度で熱処理することにより、記憶保持特
性の悪化のない、非常に優れた半導体記憶装置を作製す
ることができ、MONO8型半導体記憶装置の高性能化
に大きく寄与するものである。
Effects of the Invention According to the method for manufacturing a MONO8 type semiconductor memory device of the present invention, hydrogen ions are implanted in the heat treatment performed when forming the silicon oxide film on the silicon nitride film-1-, and the silicon nitride film is formed at the silicon nitride film formation temperature. By heat treatment, an extremely excellent semiconductor memory device without deterioration of memory retention characteristics can be manufactured, and this greatly contributes to improving the performance of the MONO8 type semiconductor memory device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(2L)〜(8)は本発明の実施例に係る製造r
−程断面図、第2図は本発明の方法によって得られた記
憶保持特性を示す図である。 1・・・・・・N型ンリコン基板、2.3・・・・・・
ソース及びドレイン領域、4,6・・・・・・酸化ンリ
コン膜、6・・・・・・窒化シリコン膜、7・・・・・
・酸化ンリコン膜、8・・・・・・水素イオン、9・・
・・・・アルミニウム電極、1゜・・・・・・酸化シリ
コン膜。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 ↓I↓↓↓↓↓↓↓↓↓↓1−y 第1図
FIGS. 1(2L) to (8) show manufacturing r according to an embodiment of the present invention.
2 is a cross-sectional view showing the memory retention characteristics obtained by the method of the present invention. 1...N-type non-reconverter board, 2.3...
Source and drain regions, 4, 6... silicon oxide film, 6... silicon nitride film, 7...
・ Oxide licon film, 8...Hydrogen ion, 9...
...Aluminum electrode, 1°...Silicon oxide film. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure ↓I↓↓↓↓↓↓↓↓↓↓1-y Figure 1

Claims (1)

【特許請求の範囲】[Claims]  一導電型半導体基板面に、極薄の第1の酸化シリコン
膜と、前記第1の酸化シリコン膜上に窒化シリコン膜と
、前記窒化シリコン膜上に第2の酸化シリコン膜と、前
記第2の酸化シリコン膜上にゲート電極を順次積層して
有する不揮発性記憶装置の形成過程において、前記第2
の酸化シリコン膜を形成した後に、水素イオンを注入し
、前記窒化シリコン膜の形成温度と同じ温度で熱処理す
る工程とを含むことを特徴とする半導体記憶装置の製造
方法。
A very thin first silicon oxide film, a silicon nitride film on the first silicon oxide film, a second silicon oxide film on the silicon nitride film, and a second silicon oxide film on the surface of one conductivity type semiconductor substrate. In the process of forming a nonvolatile memory device having gate electrodes sequentially stacked on a silicon oxide film of
1. A method of manufacturing a semiconductor memory device, comprising the steps of: after forming a silicon oxide film, implanting hydrogen ions and performing heat treatment at the same temperature as the temperature at which the silicon nitride film is formed.
JP59159662A 1984-07-30 1984-07-30 Method of manufacturing semiconductor memory device Expired - Lifetime JPH0665232B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59159662A JPH0665232B2 (en) 1984-07-30 1984-07-30 Method of manufacturing semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59159662A JPH0665232B2 (en) 1984-07-30 1984-07-30 Method of manufacturing semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS6136976A true JPS6136976A (en) 1986-02-21
JPH0665232B2 JPH0665232B2 (en) 1994-08-22

Family

ID=15698597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59159662A Expired - Lifetime JPH0665232B2 (en) 1984-07-30 1984-07-30 Method of manufacturing semiconductor memory device

Country Status (1)

Country Link
JP (1) JPH0665232B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005045012A (en) * 2003-07-22 2005-02-17 Matsushita Electric Ind Co Ltd Manufacturing method of semiconductor device
JP2006319082A (en) * 2005-05-12 2006-11-24 Sony Corp Nonvolatile semiconductor memory device
JP2007173398A (en) * 2005-12-20 2007-07-05 Sharp Corp Semiconductor storage device, and method of manufacturing same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530846A (en) * 1978-08-28 1980-03-04 Hitachi Ltd Method for manufacturing fixed memory
JPS5969973A (en) * 1982-10-15 1984-04-20 Nec Corp Semiconductor device
JPS603159A (en) * 1983-06-21 1985-01-09 Matsushita Electronics Corp Manufacture of nonvolatile memory device
JPS6057674A (en) * 1983-09-08 1985-04-03 Matsushita Electronics Corp Manufacture of semiconductor memory device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530846A (en) * 1978-08-28 1980-03-04 Hitachi Ltd Method for manufacturing fixed memory
JPS5969973A (en) * 1982-10-15 1984-04-20 Nec Corp Semiconductor device
JPS603159A (en) * 1983-06-21 1985-01-09 Matsushita Electronics Corp Manufacture of nonvolatile memory device
JPS6057674A (en) * 1983-09-08 1985-04-03 Matsushita Electronics Corp Manufacture of semiconductor memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005045012A (en) * 2003-07-22 2005-02-17 Matsushita Electric Ind Co Ltd Manufacturing method of semiconductor device
JP4545401B2 (en) * 2003-07-22 2010-09-15 パナソニック株式会社 Manufacturing method of semiconductor device
JP2006319082A (en) * 2005-05-12 2006-11-24 Sony Corp Nonvolatile semiconductor memory device
JP2007173398A (en) * 2005-12-20 2007-07-05 Sharp Corp Semiconductor storage device, and method of manufacturing same

Also Published As

Publication number Publication date
JPH0665232B2 (en) 1994-08-22

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