JPS6126352U - demodulator - Google Patents

demodulator

Info

Publication number
JPS6126352U
JPS6126352U JP11150284U JP11150284U JPS6126352U JP S6126352 U JPS6126352 U JP S6126352U JP 11150284 U JP11150284 U JP 11150284U JP 11150284 U JP11150284 U JP 11150284U JP S6126352 U JPS6126352 U JP S6126352U
Authority
JP
Japan
Prior art keywords
amplifier
output
attenuator
demodulator
abstract
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11150284U
Other languages
Japanese (ja)
Inventor
正久 小林
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP11150284U priority Critical patent/JPS6126352U/en
Publication of JPS6126352U publication Critical patent/JPS6126352U/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示すブロック図、第3図は第1図の各
部のレベルを示す説明因、第2図は本考案の実施例を示
すブロック図、第4図は第2図中の各部のレベルを示す
説明図である。 1・・・・・・入力端子、2・・・・・・イコライザ(
又はフィルタ)、3・・・・・・復調回路、4・・・・
・・出力端子、5・・・・・・増幅器、6・・・・・・
減衰器。
FIG. 1 is a block diagram showing a conventional example, FIG. 3 is an explanatory factor showing the levels of each part in FIG. 1, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. It is an explanatory diagram showing the level of each part. 1... Input terminal, 2... Equalizer (
or filter), 3... Demodulation circuit, 4...
...Output terminal, 5...Amplifier, 6...
Attenuator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力端子からのモデム信号を増幅する増幅器と、前記増
幅器の出力の特性を補償または前記増幅器の出力の帯域
を制限する手段と、前記手段の出力を前記増幅器のほぼ
利得分だけ減衰させる減衰器と、前記減衰器の出力を復
調する復調回路とを有することを特徴とする復調装置。
an amplifier for amplifying a modem signal from an input terminal; means for compensating the characteristics of the output of the amplifier or limiting the band of the output of the amplifier; and an attenuator for attenuating the output of the means by approximately the gain of the amplifier. , and a demodulation circuit that demodulates the output of the attenuator.
JP11150284U 1984-07-23 1984-07-23 demodulator Pending JPS6126352U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11150284U JPS6126352U (en) 1984-07-23 1984-07-23 demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11150284U JPS6126352U (en) 1984-07-23 1984-07-23 demodulator

Publications (1)

Publication Number Publication Date
JPS6126352U true JPS6126352U (en) 1986-02-17

Family

ID=30670588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11150284U Pending JPS6126352U (en) 1984-07-23 1984-07-23 demodulator

Country Status (1)

Country Link
JP (1) JPS6126352U (en)

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