JPS6126301B2 - - Google Patents
Info
- Publication number
- JPS6126301B2 JPS6126301B2 JP54162130A JP16213079A JPS6126301B2 JP S6126301 B2 JPS6126301 B2 JP S6126301B2 JP 54162130 A JP54162130 A JP 54162130A JP 16213079 A JP16213079 A JP 16213079A JP S6126301 B2 JPS6126301 B2 JP S6126301B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- terminal
- coupled
- switching device
- load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000001360 synchronised effect Effects 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 description 18
- 230000001105 regulatory effect Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 230000003247 decreasing effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000033228 biological regulation Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Synchronizing For Television (AREA)
- Television Receiver Circuits (AREA)
Description
【発明の詳細な説明】
この発明はテレビ受像機用に適する切換調整器
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching regulator suitable for television receivers.
自励発振型切換調整器は未調整直流電圧源に結
合された電力切換装置を有し、この切換装置が制
御回路によつてオン・オフ制御されて脈動直流電
圧を生成するようになつている。この脈動直流電
圧のパルスを平均するためにこれに直列誘導子お
よび分路コンデンサが結合されて、付勢すべき負
荷に印加するための直流電圧を生成する。通常制
御回路は直流負荷電圧のサンブルを基準電圧と比
較してスイツチ制御信号を生成し、負荷電圧が低
下したときこれを引上げるためにスイツチが閉
じ、負荷電圧が高過ぎるときはこれを引下げるた
めにスイツチが開く。この種の調整器の安定度は
制御回路のヒステレシス機能により保証される。
このような切換制御では出力電圧レベルがそのス
イツチの衝撃係数に比例するため、この衝撃係数
が未調整直流電圧の変化と共に変化して一定の調
整電圧を維持する。負荷電流が増大すると波コ
ンデンサがより速やかに放電され、調整器の反復
率または衝撃係数が上昇するようになる。このよ
うな従来法の調整器の特別の欠点は比較器の駆動
に出力電圧の脈動が用いられるため、出力電流の
小さいとき出力脈流が減少しないことである。 A self-oscillating switching regulator has a power switching device coupled to an unregulated DC voltage source that is controlled on and off by a control circuit to produce a pulsating DC voltage. . A series inductor and a shunt capacitor are coupled to this to average the pulsating DC voltage pulses to produce a DC voltage for application to the load to be energized. Typically, a control circuit compares a sample of the DC load voltage with a reference voltage to generate a switch control signal, which closes the switch to raise the load voltage when it drops, or lowers it when the load voltage is too high. The switch opens for this purpose. The stability of this type of regulator is ensured by the hysteresis function of the control circuit.
In such switching control, the output voltage level is proportional to the switch's duty cycle, so that duty cycle changes with changes in the unregulated DC voltage to maintain a constant regulated voltage. As the load current increases, the wave capacitor discharges more quickly, causing the repetition rate or duty factor of the regulator to increase. A particular drawback of such conventional regulators is that since the output voltage ripples are used to drive the comparator, the output ripples are not reduced at low output currents.
テレビ受像機用に用いるときは、スイツチング
型調整器のスイツチングを水平偏向に同期させ
て、そのスイツチングによつて生ずるテレビジヨ
ン画面上の過渡的な変化部の目立つた動きをなく
するようにすることが望ましい。このため調整器
の反復率は一定に保たれ、調整すべき電圧の制御
には衝撃係数の変化だけが利用される。テレビ受
像機は正常動作において本来映像管の平均ビーム
電流の変化に原因する相当な電流需要の変動を呈
することが予想される。この電流の変動は調整器
に負荷を与え、同期繰返数が一定のため波コン
デンサの両端間電圧波形を変化させる。この変化
のために自然繰返数すなわち周波数が同期周波数
以上の値に増大して調整器の同期外れが生じる。 When used in television receivers, the switching of the switching type regulator should be synchronized with the horizontal deflection to eliminate the noticeable movement of transient changes on the television screen caused by the switching. is desirable. The repetition rate of the regulator is thus kept constant and only the change in the duty factor is used to control the voltage to be regulated. In normal operation, television receivers are expected to exhibit considerable current demand fluctuations due to variations in the average beam current of the picture tube. This variation in current loads the regulator and changes the voltage waveform across the wave capacitor because the synchronous repetition rate is constant. This change causes the natural repetition rate or frequency to increase to a value above the locking frequency, causing the regulator to become out of sync.
この発明の推奨実施例によれば、未調整直流電
圧源により付勢されるようになつていて負荷装置
と同期して動作する切換調整器は、制御電極と主
電流導通路とを有する可制御スイツチを具備し、
その主電流導通路の両端には第１および第２の端
子があり、その第１の端子は未調整電圧源の一方
の端子に接続され、第２の端子と負荷装置の一部
との間にチヨークを含むフイルタが挿入されてそ
の部分を実質的に一定の電圧で付勢するようにな
つている。またスイツチの制御電極と主電流導通
路の第２の端子との間には電圧制御回路が挿入さ
れ、切換時間を制御して第２の端子の平均電圧を
実質的に一定に保つようになつている。 According to a preferred embodiment of the invention, a switching regulator adapted to be energized by an unregulated DC voltage source and operated synchronously with a load device has a controllable control electrode and a main current conducting path. Equipped with a switch,
The main current conducting path has first and second terminals at opposite ends thereof, the first terminal being connected to one terminal of the unregulated voltage source and the second terminal being connected to a portion of the load device. A filter including a chain yoke is inserted into the section to energize that section with a substantially constant voltage. A voltage control circuit is also inserted between the control electrode of the switch and the second terminal of the main current conducting path to control the switching time to maintain a substantially constant average voltage at the second terminal. ing.
次に添付図面を参照しつつこの発明をさらに詳
細に説明する。 The present invention will now be described in more detail with reference to the accompanying drawings.
第１図に全体を１０で示す切換調整器回路は、
交流電力幹線に結合された整流器や波コンデン
サのような未調整直流電圧源に接続するための端
子１２，１４を有する。調整器１０は端子１２に
エミツタを結合したPNP電力切換トランジスタ１
６を具備し、そのトランジスタ１６のコレクタは
回路点Ａにおいて波誘導子すなわちチヨーク１
８に結合されている。この誘導子の回路点Ａと反
対側の端部は回路点Ｅにおいて一端が端子１４
（以後「接地点」と呼ぶ）に接続された波コン
デンサ２０の他端に接続されている。点Ｅと接地
点との間に調整すべき直流出力電圧が生じる。転
流ダイオードまたはフライホイールダイオード２
２の陰極か回路点Ａに、陽極が接地点にそれぞれ
接続されている。 The switching regulator circuit, shown generally at 10 in FIG.
It has terminals 12, 14 for connection to an unregulated DC voltage source such as a rectifier or wave capacitor coupled to an AC power mains. The regulator 10 includes a PNP power switching transistor 1 having an emitter coupled to the terminal 12.
6, the collector of which transistor 16 is connected to a wave inductor or chain 1 at circuit point A.
It is connected to 8. The end of this inductor opposite to circuit point A has one end connected to terminal 14 at circuit point E.
(hereinafter referred to as the "ground point") is connected to the other end of the wave capacitor 20. A DC output voltage to be regulated occurs between point E and ground. Commutating diode or flywheel diode 2
The second cathode is connected to the circuit point A, and the anode is connected to the ground point.
全体を３０で示す制御回路はエミツタが相互に
結合されて抵抗３６により接地されたエミツタ結
合NPNトランジスタ３２，３４を含む差動比較
器を含んでいる。トランジスタ３４のコレクタは
トランジスタ１６のベースに接続され、トランジ
スタ３２のコレクタは回路点ＦにおいてPNPトラ
ンジスタ３８のベースに接続されている。トラン
ジスタ３８のコレクタ・エミツタ導電路はトラン
ジスタ１６のベース、エミツタ間に接続されてい
る。トランジスタ３４のベースは回路点Ｂおよび
抵抗４２を介して電池４０で示す基準電圧源に結
合されている。抵抗４２は回路点Ａ，Ｂ間の抵抗
４４と共に比較器にヒステレシス特性を与える。
トランジスタ３２のベースは回路点Ｃにおいて全
体を４６で示し、抵抗４８およびコンデンサ５０
を含む積分回路に結合され、この積分回路４６の
入力は回路点Ａに結合されている。抵抗５２で表
される負荷がコンデンサ２０と並列に結合されて
いる。 The control circuit, generally designated 30, includes a differential comparator including emitter-coupled NPN transistors 32, 34 whose emitters are coupled together and grounded by a resistor 36. The collector of transistor 34 is connected to the base of transistor 16, and the collector of transistor 32 is connected to the base of PNP transistor 38 at circuit point F. The collector-emitter conductive path of transistor 38 is connected between the base and emitter of transistor 16. The base of transistor 34 is coupled through circuit point B and resistor 42 to a reference voltage source represented by battery 40. Resistor 42, together with resistor 44 between circuit points A and B, provides hysteresis characteristics to the comparator.
The base of transistor 32 is shown generally at 46 at circuit point C, and is connected to resistor 48 and capacitor 50.
The input of this integrating circuit 46 is coupled to circuit point A. A load represented by resistor 52 is coupled in parallel with capacitor 20.
動作時には第２図に示すように時点Ｔ０の直前
においてトランジスタ３２，３８が導通し、トラ
ンジスタ３４が非導通である。従つてトランジス
タ１６は非導通で、また、ダイオード２２は導通
して誘導子１８の所要電流を流通させる。回路点
Ａは公称上第２図ａにＶAで示すような接地電位
にある。比較器３０の基準として得られる回路点
Ｂの電圧は第２図ｂにＶBで示すように電池４０
の電圧より低い（より負である）。コンデンサ５
０は抵抗４８を介して回路点Ａの公称接地電位に
向つて放電し、回路点Ｃに第２図ｃで示すような
低下する傾斜電圧ＶCを生成する。コンデンサ２
０は負荷５２の両端間に印加される出力電圧ＶE
まで放電され、誘導子１８の電流は第２図ｄにＩ
Lで示すようにその磁界に蓄積されたエネルギー
の一部がコンデンサ２０に転送されるため減少し
て行く。調整された電圧を一定に維持するに要す
るチヨークまたは誘導子１８を流れる平均電流は
負荷５２の電流ドレンと等しくなければならな
い。負荷５２がコンデンサ２０から引出す電流は
誘導子１８から得られるそれを超え、回路点Ｅの
電圧ＶEは第２図ｅに示すように減少している。
第２図ｅはＶEの交流成分またはリプル成分だけ
を示している。 In operation, just before time T0, as shown in FIG. 2, transistors 32 and 38 are conductive and transistor 34 is non-conductive. Transistor 16 is therefore non-conducting and diode 22 is conducting to conduct the required current of inductor 18. Circuit point A is nominally at ground potential as indicated by V A in FIG. 2a. The voltage at circuit point B obtained as a reference for the comparator 30 is as shown by V B in FIG.
is lower (more negative) than the voltage of . capacitor 5
0 discharges through resistor 48 toward the nominal ground potential at node A, producing a decreasing ramp voltage V C at node C as shown in FIG. 2c. capacitor 2
0 is the output voltage V E applied across the load 52
The current in the inductor 18 is shown as I in FIG. 2d.
As shown by L , part of the energy stored in the magnetic field is transferred to the capacitor 20, so that it decreases. The average current through the choke or inductor 18 required to maintain the regulated voltage constant must be equal to the current drain of the load 52. The current drawn by load 52 from capacitor 20 exceeds that available from inductor 18, and the voltage V E at circuit point E has decreased as shown in FIG. 2e.
Figure 2e shows only the alternating current or ripple component of V E .
時点Ｔ０近傍で回路点Ｃの低下する傾斜電圧が
回路点Ｂの電圧に等しくなつた後これより僅かに
低くなり、このとき比較器３０はトランジスタ３
２，３８を非導通に、トランジスタ３４を導通に
転換する。トランジスタ３４が導通してトランジ
スタ３８が非導通のため、ベース電流がトランジ
スタ１６に供給されてこれを飽和させ、回路点Ａ
の電圧ＶAを電圧ＶE以上の（より正の）値に上昇
させる。この電圧ＶAの上昇により回路点Ｂの電
圧が電池４０の電圧よりやや高く、またこのとき
点Ｃに現れる電圧より高い値まで上昇し、これに
よつてトランジスタ３４がトランジスタ３２を除
いて導通を維持することが保証される。ダイオー
ド２２は非導通になり、誘導子１８の電流ＩLは
第２図ｄに示すように上昇を始める。時点Ｔ０の
後、電圧ＶAの上昇によつて、コンデンサ５０が
抵抗４８を介して充電を始めると回路点Ｃに電圧
ＶCの正向き傾斜部が生じる。しかし時点Ｔ０、
Ｔ１間においては誘導子１８の電流が増大はする
が引続き負荷５２の引出す電流より小さく、その
差がコンデンサ２０の放電により供給される。こ
のためコンデンサ２０の両端間の電圧ＶEは、時
点Ｔ１付近の遅い放電に拘らず期間Ｔ０〜Ｔ１に
おいて低下を続ける。時点Ｔ１において誘導子１
８の電流は負荷回路５２の電流ドレンに等しく、
この時点でコンデンサ２０は正味電流が流れない
ため充電も放電もしない。 Near time T0, the decreasing slope voltage at circuit point C becomes equal to the voltage at circuit point B, and then becomes slightly lower than this, and at this time, comparator 30 is connected to transistor 3.
2 and 38 are made non-conductive, and transistor 34 is made conductive. Since transistor 34 is conducting and transistor 38 is non-conducting, base current is supplied to transistor 16 and saturates it, causing circuit point A.
The voltage V A of is increased to a value greater than (more positive) than the voltage V E . This increase in voltage V A causes the voltage at circuit point B to rise to a value that is slightly higher than the voltage at battery 40 and higher than the voltage appearing at point C at this time, causing transistor 34 to become conductive except for transistor 32. guaranteed to be maintained. Diode 22 becomes non-conductive and the current I L in inductor 18 begins to rise as shown in FIG. 2d. After time T0, the rise in voltage V A causes a positive slope of voltage V C at circuit point C as capacitor 50 begins to charge through resistor 48 . However, at time T0,
During T1, the current in inductor 18 increases but remains less than the current drawn by load 52, the difference being supplied by the discharge of capacitor 20. Therefore, the voltage V E across the capacitor 20 continues to decrease during the period T0 to T1 despite the slow discharge near time T1. Inductor 1 at time T1
8 is equal to the current drain of the load circuit 52;
At this point, capacitor 20 is neither charged nor discharged because no net current flows through it.
期間Ｔ１〜Ｔ２において誘導子１８の電流が負
荷の平均要電流を超えるためＶEが上昇する。時
点Ｔ２近傍において電流ＩLが負荷需要を著しく
超えるため、コンデンサ２０の急速充電のため比
較的大電流が得られる。 During the period T1 to T2, the current in the inductor 18 exceeds the average required current of the load, so V E increases. Since the current I L significantly exceeds the load demand near time T2, a relatively large current is obtained for rapid charging of the capacitor 20.
回路点Ｃの上昇する傾斜電圧ＶCは、時点Ｔ２
付近でこのとき回路点Ｂから比較器に印加される
電圧に等しくなつてこれを僅かに超える。時点Ｔ
２において比較器３０はトランジスタ３２，３８
を導通に転換し、トランジスタ４は非導通にな
る。トランジスタ３４の残留コレクタ電流はトラ
ンジスタ３８の導通によつてトランジスタ１６の
ベース・エミツタ接合を流れないようになるた
め、トランジスタ１６がカツトオフになり、誘導
子１８の磁界に関連するエネルギによつて点Ａの
電圧が急激に負になる。ダイオード２２が導通し
て点Ａの負向きピークを接地電位より1VBeだけ
低く制限する。点Ａが公称接地電圧になると回路
点Ｂの電圧が電池４０の電圧より低い値に低下し
てトランジスタ３２，３８が導通を続け、トラン
ジスタ３４が非導通を続けることが保証される。
コンデンサ５０は抵抗４８を介して放電するとき
回路点Ｃに負向き傾斜電圧を形成し始める。この
傾斜電圧ＶCおよび出力電圧ＶEはＶCがＶBと交差
して比較器が再び切換えを行つて同じサイクルを
反復させるまで低下を続ける。 The rising ramp voltage V C at circuit point C is at time T2
In the vicinity, the voltage becomes equal to and slightly exceeds the voltage applied to the comparator from circuit point B at this time. Time T
2, comparator 30 includes transistors 32, 38
becomes conductive, and transistor 4 becomes non-conductive. The residual collector current of transistor 34 is prevented from flowing through the base-emitter junction of transistor 16 by conduction of transistor 38, so that transistor 16 is cut off and the energy associated with the magnetic field of inductor 18 causes it to flow at point A. voltage suddenly becomes negative. Diode 22 conducts to limit the negative peak at point A to 1 V Be below ground potential. When point A reaches the nominal ground voltage, the voltage at point B drops to a value below the voltage of battery 40, ensuring that transistors 32 and 38 remain conductive and transistor 34 remains nonconductive.
As capacitor 50 discharges through resistor 48, it begins to form a negative ramp voltage at circuit point C. This ramp voltage V C and the output voltage V E continue to fall until V C crosses V B and the comparator switches again to repeat the same cycle.
上述のように調整回路１０は自走的である。こ
の調整器１０の同期は同期信号入力となる回路点
Ｆに負向きパルスを印加することにより達せられ
る。この回路点Ｆの負向きパルスはトランジスタ
３８を順バイアスしてトランジスタ１６を遮断
し、時点Ｔ２を基準に設定する。調整器１０の自
然自励発振時間が同期パルス間隔より長い限り、
調整器は同期されたままである。強制繰返数すな
わち発振器の自然振動数を超える周波数における
同期による周波数の上昇によつてスイツチ１６の
衝撃係数の低下を生じ、これによつて平均出力電
圧の低下を生じる。点Ａの平均電圧が低い傾向は
積分回路４６により点Ｃに転送され、トランジス
タ３２を得られる期間の長い部分非導通に保つ。
このためトランジスタ３４はその得られる期間の
長い部分導通し、帰還作用によつて出力電圧の低
下傾向を阻止する。回路点Ｅの出力電圧は回路点
Ａと実質的に同じ平均電圧を持つから、誘導子１
８の電圧低下は僅かに過ぎない。同期後の調整切
換器の衝撃係数は同じ出力電圧に対する自走衝撃
係数と同じである。 As mentioned above, the regulation circuit 10 is free-running. Synchronization of the regulator 10 is achieved by applying a negative pulse to circuit point F, which serves as the synchronization signal input. This negative-going pulse at point F forward biases transistor 38 and shuts off transistor 16, setting time T2 as a reference. As long as the natural self-oscillation time of regulator 10 is longer than the synchronous pulse interval,
The regulator remains synchronized. The increase in frequency due to forced repetition, ie, synchronization at frequencies above the natural frequency of the oscillator, causes a decrease in the duty factor of switch 16, which causes a decrease in the average output voltage. The tendency for the average voltage at point A to be low is transferred by integrator circuit 46 to point C, keeping transistor 32 partially non-conducting for an extended period of time.
Therefore, the transistor 34 is conductive for a long period of time, and the feedback effect prevents the output voltage from decreasing. Since the output voltage at circuit point E has substantially the same average voltage as circuit point A, inductor 1
8, the voltage drop is only slight. The impulse coefficient of the regulating switch after synchronization is the same as the free-running impulse coefficient for the same output voltage.
この発明の構成は、自然繰返数を増大するよう
な比較器の印加電圧サンプルの負荷電流依存変化
を消去する点において従来法の構成に比して同期
動作中に優れた安定度を示す。この発明による構
成はさらに調整器の直流出力電圧に重畳する交流
リプル電圧の大きさが、比較器がこの出力で駆動
されないため、低い負荷電流において低下すると
いう他の利点を有する。 The inventive configuration exhibits superior stability during synchronous operation over prior art configurations in eliminating load current dependent variations in the applied voltage samples of the comparator that increase the natural repetition rate. The arrangement according to the invention has the further advantage that the magnitude of the AC ripple voltage superimposed on the DC output voltage of the regulator is reduced at low load currents, since the comparator is not driven with this output.
この発明の他の実施例は当業者に自明である。
例えば基準電圧源４０は電池４０の代りにツエナ
ーダイオードで構成することもできる。種々の比
較回路の中で任意のものを用いることができ、コ
ンデンサ２０を端子１４の代りに端子１２を基準
にして配置することもできる。またトランジスタ
およびダイオードの極性を反転して逆極性の未調
整直流電圧源に利用し得るようにすることもでき
る。 Other embodiments of the invention will be apparent to those skilled in the art.
For example, the reference voltage source 40 may be configured with a Zener diode instead of the battery 40. Any of the various comparison circuits may be used, and the capacitor 20 may be placed with reference to the terminal 12 instead of the terminal 14. The polarity of the transistors and diodes can also be reversed to provide an unregulated DC voltage source of opposite polarity.
第１図はこの発明の１実施例の略示回路図、第
２図は第１図の装置の動作中に生ずる電圧電流の
振幅対時間図表である。
１０…切換電圧調整器、１２…第１端子、Ａ…
第２端子、１６…切換装置、１８，２０…LC濾
波器、Ｆ…同期信号入力、３０…制御回路、３
２，３４…比較器、４０…基準電圧源、Ｂ，Ｃ…
比較器の入力、４６，４８，５０…積分器。
FIG. 1 is a schematic circuit diagram of one embodiment of the invention, and FIG. 2 is a diagram of the amplitude versus time of the voltage and current occurring during operation of the device of FIG. 10...Switching voltage regulator, 12...First terminal, A...
2nd terminal, 16... switching device, 18, 20... LC filter, F... synchronization signal input, 30... control circuit, 3
2, 34... Comparator, 40... Reference voltage source, B, C...
Comparator input, 46, 48, 50...integrator.
Claims (1)
動作するように構成されると共に未調整直流電圧
電源によつて付勢されるように構成された切換電
圧調整器であつて； 第１端子と第２端子間に結合された主電流導通
路と制御端子とを有する可制御切換装置であつ
て、上記第１端子は上記未調整直流電圧電源に結
合されており、上記第２端子は上記切換装置が導
通状態と非導通状態との間で切換えられるとき脈
動直流電圧を供給するものである、上記可制御切
換装置と、 上記第２端子と負荷との間に結合されていて、
上記負荷に制御された直流電圧を供給するLC濾
波器と、 水平周波数同期信号源と、 上記水平周波数同期信号源に結合された同期信
号入力と、上記切換装置の制御入力に結合された
出力とを有し、さらに基準電圧源に結合された入
力および上記切換装置の制御入力に結合された出
力を具えた比較器とを含む制御回路と、 上記第２端子に結合された入力および上記比較
器の入力に結合された出力を有し、上記脈動直流
電圧に応答して上記制御された直流電圧を表わす
電圧を生成するＲ―Ｃ回路網と、 からなり、 上記可制御切換装置は同期化されていないとき
自然自己発振する、 切換調整器。Claims: 1. A switching voltage regulator configured to operate synchronously with a television display device constituting a load and configured to be energized by an unregulated DC voltage power source; a controllable switching device having a main current conduction path and a control terminal coupled between a first terminal and a second terminal, the first terminal being coupled to the unregulated DC voltage source; a terminal is coupled between the controllable switching device and the second terminal and the load for providing a pulsating DC voltage when the switching device is switched between a conducting state and a non-conducting state; ,
an LC filter for providing a controlled DC voltage to the load; a horizontal frequency synchronization signal source; a synchronization signal input coupled to the horizontal frequency synchronization signal source; and an output coupled to a control input of the switching device. and further comprising a comparator having an input coupled to a reference voltage source and an output coupled to a control input of the switching device; an input coupled to the second terminal and the comparator having an input coupled to the second terminal; an R-C network having an output coupled to an input of the controllable switching device for generating a voltage representative of the controlled DC voltage in response to the pulsating DC voltage, the controllable switching device being synchronized; Switchable regulator that naturally self-oscillates when not in use.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US96915678A | 1978-12-13 | 1978-12-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5583911A JPS5583911A (en) | 1980-06-24 |
| JPS6126301B2 true JPS6126301B2 (en) | 1986-06-19 |
Family
ID=25515258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16213079A Granted JPS5583911A (en) | 1978-12-13 | 1979-12-12 | Changeeover regulator |
Country Status (11)
| Country | Link |
|---|---|
| JP (1) | JPS5583911A (en) |
| AT (1) | AT376824B (en) |
| AU (1) | AU534108B2 (en) |
| DE (1) | DE2950190A1 (en) |
| ES (1) | ES486813A1 (en) |
| FI (1) | FI793821A (en) |
| FR (1) | FR2444384B1 (en) |
| GB (1) | GB2037033B (en) |
| IT (1) | IT1126561B (en) |
| NZ (1) | NZ192372A (en) |
| PL (1) | PL220390A1 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4847549A (en) * | 1988-09-06 | 1989-07-11 | National Semiconductor Corporation | Switching voltage regulator with stabilized loop gain |
| US5079686A (en) * | 1990-06-08 | 1992-01-07 | Vlt Corporation | Enhancement-mode zero-current switching converter |
| GB2283136A (en) * | 1993-10-23 | 1995-04-26 | Nicotech Ltd | Electric converter circuits |
| US7902805B2 (en) | 2006-04-03 | 2011-03-08 | Texas Instruments Deutschland Gmbh | Self-oscillating DC-DC buck converter with zero hysteresis |
| DE102006015339B4 (en) * | 2006-04-03 | 2013-03-21 | Texas Instruments Deutschland Gmbh | Self-oscillating DC-DC buck converter with zero hysteresis |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3226630A (en) * | 1963-03-01 | 1965-12-28 | Raytheon Co | Power supply regulators |
| US3305767A (en) * | 1963-09-10 | 1967-02-21 | North American Aviation Inc | Voltage regulator |
| DE1293304B (en) * | 1963-12-21 | 1969-04-24 | Fernseh Gmbh | Circuit arrangement for the DC voltage supply of a consumer |
| BE659134A (en) * | 1964-02-10 | |||
| US3675159A (en) * | 1970-12-21 | 1972-07-04 | Bell Telephone Labor Inc | Self-oscillating switching regulator with frequency responsive feedback loop gain control |
| US3781654A (en) * | 1972-05-26 | 1973-12-25 | Hewlett Packard Co | Switching voltage regulator circuit |
| JPS5931306B2 (en) * | 1975-12-24 | 1984-08-01 | ソニー株式会社 | switching regulator |
| US4127885A (en) * | 1977-04-21 | 1978-11-28 | Rca Corporation | Over-current protection circuit for voltage regulator |
-
1979
- 1979-12-05 FI FI793821A patent/FI793821A/en not_active Application Discontinuation
- 1979-12-06 AU AU53561/79A patent/AU534108B2/en not_active Ceased
- 1979-12-07 IT IT27988/79A patent/IT1126561B/en active
- 1979-12-10 GB GB7942472A patent/GB2037033B/en not_active Expired
- 1979-12-11 AT AT0782079A patent/AT376824B/en not_active IP Right Cessation
- 1979-12-12 NZ NZ192372A patent/NZ192372A/en unknown
- 1979-12-12 ES ES486813A patent/ES486813A1/en not_active Expired
- 1979-12-12 FR FR7930492A patent/FR2444384B1/en not_active Expired
- 1979-12-12 JP JP16213079A patent/JPS5583911A/en active Granted
- 1979-12-13 DE DE19792950190 patent/DE2950190A1/en not_active Ceased
- 1979-12-13 PL PL22039079A patent/PL220390A1/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| GB2037033A (en) | 1980-07-02 |
| NZ192372A (en) | 1983-05-10 |
| ES486813A1 (en) | 1980-07-01 |
| DE2950190A1 (en) | 1980-06-19 |
| JPS5583911A (en) | 1980-06-24 |
| IT1126561B (en) | 1986-05-21 |
| FR2444384A1 (en) | 1980-07-11 |
| GB2037033B (en) | 1983-07-27 |
| AT376824B (en) | 1985-01-10 |
| FR2444384B1 (en) | 1985-09-27 |
| FI793821A (en) | 1980-06-14 |
| PL220390A1 (en) | 1980-09-22 |
| AU5356179A (en) | 1980-06-19 |
| IT7927988A0 (en) | 1979-12-07 |
| ATA782079A (en) | 1984-05-15 |
| AU534108B2 (en) | 1984-01-05 |
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