JPS6124298A - Method of producing multilayer printed board - Google Patents
Method of producing multilayer printed boardInfo
- Publication number
- JPS6124298A JPS6124298A JP14483984A JP14483984A JPS6124298A JP S6124298 A JPS6124298 A JP S6124298A JP 14483984 A JP14483984 A JP 14483984A JP 14483984 A JP14483984 A JP 14483984A JP S6124298 A JPS6124298 A JP S6124298A
- Authority
- JP
- Japan
- Prior art keywords
- multilayer printed
- pattern wiring
- pattern
- printed board
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は片面のパターン配線を有するプリント基板を積
層することにより形成される多層プリント板の製造方法
に係り、特に、各積層間のパターン配線の接続が積層工
程において容易に行なえる多層プリント板の製造方法に
関する。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method for manufacturing a multilayer printed board formed by laminating printed circuit boards having pattern wiring on one side, and in particular, to The present invention relates to a method for manufacturing a multilayer printed board in which connections can be easily made in a lamination process.
各種電子機器の構成に広く使用されるプリント板は、そ
の大小を問わず一般的に銅張りした絶縁基板が使用され
、エツチング・レジストを塗布してパターン焼付を行な
い、不要の部分を除去する化学処理によってパターン配
線が形成されることにより製造される。Printed boards, which are widely used in the construction of various electronic devices, are generally made of copper-clad insulating boards, regardless of their size, and are coated with a chemical etching resist to print the pattern and remove unnecessary parts. It is manufactured by forming pattern wiring through processing.
近年、このようなプリント板は高密度実装を図るため、
前述のパターン配線の上面に、更に絶縁層とパターン配
線層を積層するビルドアップ法などによりパターン配線
の多層化された多層プリント板の製造が行なわれるよう
になった。In recent years, in order to achieve high-density mounting of such printed boards,
Multilayer printed circuit boards having multiple layers of pattern wiring have come to be manufactured by a build-up method in which an insulating layer and a pattern wiring layer are further laminated on top of the above-mentioned pattern wiring.
しかし、このようなビルドアップ法によって製造された
多層プリント板は高価になシ易く、特に利用度の高い積
層数の２〜３Ｆ＠の多層プリント板の安価な製造法が要
望されている。However, multilayer printed boards manufactured by such a build-up method tend to be expensive, and there is a need for an inexpensive manufacturing method for multilayer printed boards with a number of laminated layers of 2 to 3 F@, which are particularly useful.
第２図の（ａ）（ｂ）（ｅ）（ｄ）（ｅ）（ｆ）図は従
来、最も広く用いられている多層プリント板の製造方法
の概略工程を工程順に示した側断面図である。Figures (a), (b), (e), (d), (e) and (f) in Figure 2 are side sectional views showing the schematic steps of the conventionally most widely used method for manufacturing multilayer printed boards in order of process. be.
（荀図に示すように絶縁基板１，２．３の間にパターン
配線４，５が形成され、絶縁基板１．３のそれぞれの表
面に銅張り６が施されたプリント基板ｔＭい、先づ、ス
ルホールを設ける所定箇所罠は（ｂ）図に示すように貫
通孔７の加工が行なわれる０次に、（ｅ）図に示すよう
に銅張υ６と貫通孔７の内周とに銅メッキ層８を形成し
、更に、（ｄ）図に示すように銅メツキ層８０表面の全
面にエツチング−レジスト９を施し、パターン焼付を行
う。(As shown in the figure, pattern wiring 4, 5 is formed between insulating substrates 1, 2.3, and a printed circuit board tM is provided with copper coating 6 on each surface of insulating substrate 1.3. , as shown in figure (b), the through hole 7 is machined, and then, as shown in figure (e), copper plating is applied to the copper clad υ6 and the inner periphery of the through hole 7. A layer 8 is formed, and then an etching resist 9 is applied to the entire surface of the copper plating layer 80 as shown in FIG. 3(d), and a pattern is baked.
パターン焼付後、現像処理してパターン以外の銅メッキ
層８および銅張シロを除去することによりＣｅ）図に示
すように形成される。最後に化学的にエツチング・レジ
スト８を除去することにより （ｆ）図に示すパターン
配線１１とランドを有し、各層間のパターン配線４．５
を接続したスルホ−！し１０とを形成した多層プリント
板が得られる。After the pattern is baked, a development process is performed to remove the copper plating layer 8 and the copper cladding other than the pattern, thereby forming a pattern as shown in Fig. Ce). Finally, by chemically removing the etching resist 8, (f) the pattern wiring 11 and lands shown in the figure are formed, and the pattern wiring 4.5 between each layer is formed.
Suruho connected! A multilayer printed board is obtained in which the laminate 10 is formed.
このようか多層プリント板の製造ではスルホール１０用
の貫通孔７を加工する場合、パターン配線が切断されな
いよう各層に形成されたパターン配線４．５の位置は互
いに正確に位置合わせされるよう高精度の積層技術によ
って積層し々ければならず、更に、積層後、鋼メッキ層
８の形成および工、チング処理工程を行うため、コスト
アップとなる間Ｉｌｌ有していた。In this way, in the production of multilayer printed circuit boards, when processing the through holes 7 for the through holes 10, the positions of the pattern wirings 4 and 5 formed in each layer are precisely aligned with each other so that the pattern wirings are not cut. In addition, after lamination, the steel plating layer 8 is formed and processed, and the process of forming and etching the steel plating layer 8 is performed, which increases the cost.
前述の問題点け、か＼る絶縁基板を介して対向される一
方のパターン配線の所定箇所には導電材によるスタッド
を形成し、他方のパターン配線には該スタッドの挿入さ
れる貫通孔を形成し、該貫通孔に挿入された該スタッド
の先端部には導電性接着剤がスクリーン印刷されて成る
本発明による製造方法により解決される。To address the above-mentioned problem, a stud made of a conductive material is formed at a predetermined location of one of the pattern wirings facing each other with the insulating substrate interposed therebetween, and a through hole into which the stud is inserted is formed in the other pattern wiring. This problem is solved by the manufacturing method according to the present invention, in which a conductive adhesive is screen printed on the tip of the stud inserted into the through hole.
即ち、パターン配線に設けられたスタット°を他のパタ
ーン配線に設けられた貫通孔に挿入することによって相
互接続の正しい位置決めが行なわわ、該スタッド先端の
導電性接着剤によって、各層間のパターン配線の確実々
相互接続が行なわれる。That is, correct positioning of interconnection is achieved by inserting a stud provided in one pattern wiring into a through hole provided in another pattern wiring, and the conductive adhesive at the tip of the stud allows pattern wiring between each layer to be aligned. The interconnection is ensured.
したがって、従来のような銅メッキ層の形成およびエツ
チング処理工程によって形成されるスルホールを設ける
ことなく、各層間のパターン配線の相互接続が行なえる
。Therefore, pattern wiring between each layer can be interconnected without providing through holes formed by the conventional process of forming a copper plating layer and etching process.
以下本発明を第１図の一実施例によって詳細に弱、明す
る。図において、（ａ）図は断面図、＋（ｂｌ）（ｂ２
）（ｂ３）（ｃｌ）（Ｃ２）（ｄｌ）（ｄ２）図は製造
方法の工程を工程順に示した断面図である。全図を通じ
同一符号は同一対象物を示す。The present invention will be explained in detail below with reference to an embodiment shown in FIG. In the figure, (a) is a cross-sectional view, + (bl) (b2
) (b3) (cl) (C2) (dl) (d2) The figures are cross-sectional views showing the steps of the manufacturing method in the order of steps. The same reference numerals indicate the same objects throughout the figures.
（ＩＬ）図に示すように表面を樹脂層２４によシ平滑化
された絶縁基板２２のパターン配線２３には導電材のス
タッド２５が固着され、一方、絶縁基板２７のパターン
配線２８には貫通孔２９を設け、貫通孔２９にスタッド
２５を挿入して積載する。(IL) As shown in the figure, studs 25 of a conductive material are fixed to the pattern wiring 23 of the insulating substrate 22 whose surface is smoothed by a resin layer 24, while the pattern wiring 28 of the insulating substrate 27 is penetrated. A hole 29 is provided, and the stud 25 is inserted into the through hole 29 and loaded.
このようにｐ載した基板２７は基板２２と接着剤３０に
よって相互に固着し、更に、スタッド２５の先端部に塗
布された導電性接着剤３１によってパターン配線２３．
２．８の相互接続が行なわ名る。The substrate 27 mounted in this way is fixed to the substrate 22 and the adhesive 30, and the pattern wiring 23.
2.8 interconnection is performed.
このような構成は次の製造工程順序によって製造するこ
とができる。先づ、パターン配線２３が形成された（ｂ
ｌ）図に示すアルミ材などの放熱板２１を有する絶縁基
板２２には（ｂ２）図に示すようにパターン配線２３と
同面になる樹脂層２４をスクリーン印刷により形成する
。Such a configuration can be manufactured by the following manufacturing process sequence. First, pattern wiring 23 was formed (b
l) On an insulating substrate 22 having a heat sink 21 made of aluminum or the like as shown in the figure (b2), a resin layer 24 is formed on the same surface as the pattern wiring 23 as shown in the figure by screen printing.
次に、パターン配線２３の所定箇所には導電材によって
形成されたスタッド２５を（ｂ３）図に示すように固着
し、プリント板２０を製造する。Next, studs 25 made of a conductive material are fixed to predetermined locations of the pattern wiring 23 as shown in FIG. 3B, thereby manufacturing the printed board 20.
一方、（ｃｌ）図に示すフィルム状の絶縁シート２７に
設けられたパターン配線２Ｂには（Ｃ２）図に示すよう
に貫通孔２９を加工したプリント板２６を製造する。On the other hand, a printed circuit board 26 is manufactured in which a through hole 29 is formed as shown in FIG. 2 (C2) in the patterned wiring 2B provided on the film-like insulating sheet 27 shown in FIG.
このプリント板２０には２６がスタッド２５を貫通孔２
９に挿入することで・（ｄｌ）図に示すように積載さね
、接着剤３０によって固着し、更に１スタツド２５の先
端部には（ｄ２）図に示すように導電性接着剤３１をス
クリーン印刷によって固着する。This printed board 20 has a stud 25 in a through hole 26.
9. (dl) As shown in the figure, it is loaded and fixed with adhesive 30, and the tip of one stud 25 is screened with conductive adhesive 31 as shown in (d2). Fixed by printing.
したがって、このように製造することで、従来のよう＆
スルホール１０を設けることなく、積層間のパターン配
線２３と２８とが！気的に接続された多ｌ−プリント板
を製造することができる。Therefore, by manufacturing in this way, it is possible to
The pattern wiring 23 and 28 between the laminated layers can be formed without providing the through hole 10! Multiple electrically connected printed circuit boards can be produced.
以上説明したように本発明は夫々片面にパターン配線を
有する複数個のプリント板をスタッドと貫通孔によって
位置合わせして積層し、パターン間の電気接続を導電性
塗料によって行うことによシ、従来のような高精度の位
置合せは不要となり積層後の銅メッキ層の形成およびエ
ツチング処理の工程も不要となり、安易外製造設備で安
価な多層プリント板が得られる経済的効果が大である。As explained above, the present invention has a method of stacking a plurality of printed boards each having pattern wiring on one side by aligning them with studs and through holes, and making electrical connections between the patterns using conductive paint. There is no need for such high-precision positioning, and there is no need for the steps of forming a copper plating layer after lamination and etching, and there is a great economic effect in that an inexpensive multilayer printed board can be obtained using simple external manufacturing equipment.
第１図は本発明による多層プリント板の製造方法の一実
施例を説明した（ａ）図は断面図、（ｂｌ）（ｂ２）（
ｂ３）（ｃｌ）（ｃ２）（ｄｌ）（ｄ２）図は製造工程
を示す断面図、第２図は従来の多層プリント板の製造工
程を示す（ａ）（ｂ璋）（ｄ）（ｅ）ａ）図は断面図を
示す。
図中において、１，２，３．２２は絶縁基板、４．５は
パターン層、６は銅張シ、７，２９は貫通孔、８はメッ
キ層、９はエツチング・レジスト、１０はスルホール、
１１，２３．２８はパターン配線、２０．２６はプリン
ト板、２１は放熱板、２７は絶縁シート、２４は樹脂層
１．２５はスタッド、３０は接着剤、３１は導電性接着
剤を示す。
（Ｙ’ｌ ｒ〜 ζ
云 Ｖ
５へ
−７Ｊ卜FIG. 1 illustrates an embodiment of the method for manufacturing a multilayer printed board according to the present invention. (a) is a cross-sectional view, (bl) (b2) (
b3) (cl) (c2) (dl) (d2) The figure is a cross-sectional view showing the manufacturing process, and Figure 2 shows the manufacturing process of a conventional multilayer printed board (a) (b) (d) (e) a) The figure shows a cross-sectional view. In the figure, 1, 2, 3, 22 are insulating substrates, 4.5 is a pattern layer, 6 is a copper clad layer, 7, 29 are through holes, 8 is a plating layer, 9 is an etching resist, 10 is a through hole,
Reference numerals 11, 23, and 28 indicate pattern wiring, 20, 26 a printed board, 21 a heat sink, 27 an insulating sheet, 24 a resin layer 1, 25 a stud, 30 an adhesive, and 31 a conductive adhesive. (Y'l r~ ζ 云 V 5-7J 卜
Claims (1)
基板が積層されて形成された多層プリント板の製造方法
であって、前記絶縁基板を介して対向される一方のパタ
ーン配線の所定箇所には導電材によるスタッドを形成し
、他方のパターン配線には該スタッドの挿入される貫通
孔を形成し、該貫通孔に挿入された該スタッドの先端部
には導電性接着剤がスクリーン印刷されて成ることを特
徴とする多層プリント板の製造方法。A method for manufacturing a multilayer printed board formed by laminating a plurality of printed circuit boards having pattern wiring on one side of an insulating substrate, the method comprising: a conductive material at a predetermined location of one of the pattern wirings facing each other with the insulating substrate interposed therebetween; A through hole into which the stud is inserted is formed in the other pattern wiring, and a conductive adhesive is screen printed on the tip of the stud inserted into the through hole. Features: A method for manufacturing multilayer printed boards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14483984A JPS6124298A (en) | 1984-07-12 | 1984-07-12 | Method of producing multilayer printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14483984A JPS6124298A (en) | 1984-07-12 | 1984-07-12 | Method of producing multilayer printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6124298A true JPS6124298A (en) | 1986-02-01 |
| JPH0226399B2 JPH0226399B2 (en) | 1990-06-08 |
Family
ID=15371629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14483984A Granted JPS6124298A (en) | 1984-07-12 | 1984-07-12 | Method of producing multilayer printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6124298A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63165877U (en) * | 1987-04-17 | 1988-10-28 | ||
| US5440075A (en) * | 1992-09-22 | 1995-08-08 | Matsushita Electric Industrial Co., Ltd. | Two-sided printed circuit board a multi-layered printed circuit board |
-
1984
- 1984-07-12 JP JP14483984A patent/JPS6124298A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63165877U (en) * | 1987-04-17 | 1988-10-28 | ||
| JPH0534138Y2 (en) * | 1987-04-17 | 1993-08-30 | ||
| US5440075A (en) * | 1992-09-22 | 1995-08-08 | Matsushita Electric Industrial Co., Ltd. | Two-sided printed circuit board a multi-layered printed circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0226399B2 (en) | 1990-06-08 |
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