JPS61220431A - Minute process apparatus - Google Patents

Minute process apparatus

Info

Publication number
JPS61220431A
JPS61220431A JP6252585A JP6252585A JPS61220431A JP S61220431 A JPS61220431 A JP S61220431A JP 6252585 A JP6252585 A JP 6252585A JP 6252585 A JP6252585 A JP 6252585A JP S61220431 A JPS61220431 A JP S61220431A
Authority
JP
Japan
Prior art keywords
substrate
precisely
monitor
heating stage
gun
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6252585A
Other languages
Japanese (ja)
Inventor
Koichi Kugimiya
公一 釘宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6252585A priority Critical patent/JPS61220431A/en
Publication of JPS61220431A publication Critical patent/JPS61220431A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Abstract

PURPOSE:To process a substrate minutely, cleanly and precisely, by providing with two chambers of high and low vacuum, ion and electron guns, a common projection port, monitors for space current and absorbing current, and a heating stage, and by detecting the position and extension by the monitors to move the heating state and to vary the beam amplitude. CONSTITUTION:An Si substrate 1 which is put on a heating stage 2 is positioned precisely. Beams emitted from an electron gun 3 and ion gun 4 which are passed through optical systems 3', 4', 3'', 4'' and an optical cylinder 5 and are regulated electronically so as to share the same center axis 6 are irradiated onto the substrate 1. At this time, the beams may be reacted with particle flow 7 emitted from a particle gun 8 if necessary, processing (etching, depositing, diffusing, etc.) the substrate 1. The position displacement and extension owing to the temperature rise are detected by an absorbing current monitor 9 and space current monitor 10, and then the optical systems 3'', 4'' are corrected to position the substrate 1 precisely. The pump system is controlled within a range of 10<-4> Pa-10 Pa. For the purpose of preventing contamination from the vacuum, a two-chamber structure in which a gate 13 is mounted is adopted. Moreover, a laser 12 for reaction-promoting and a monitor 14 for detecting the film thickness and reaction advance are provided. In this structure, various processes are executed precisely in the apparatus without contamination or dust depositing.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は加工による汚染を極力避けねばならない電子部
品、特に、半導体装置の微細加工に適用される。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applied to electronic components, particularly microfabrication of semiconductor devices, where contamination due to processing must be avoided as much as possible.

従来の技術 微細加工の特に進んでいる半導体装置の加工について、
引用し説明する。
Conventional technology Regarding the processing of semiconductor devices, which is particularly advanced in microfabrication,
Quote and explain.

半導体装置の製造には、よく知られているように、レジ
スト膜の形成、パターンの形成の後所定のエツチングな
どによってパターンを転写する等の工程を色々と繰り返
す。従って、汚染物の多いレジスト残査やその他材料に
よる汚染を防ぐために、洗浄を繰り返す。
As is well known, in the manufacture of semiconductor devices, various steps are repeated, such as forming a resist film, forming a pattern, and then transferring the pattern by a predetermined etching process. Therefore, cleaning is repeated to prevent contamination from highly contaminated resist residue and other materials.

未だに実用化されてはいないが、マスクレス加工を応用
して、上述の工程の繰り返しを幾分減らそうという試み
もなされている。(LJ、Muray。
Although it has not yet been put to practical use, attempts have been made to apply maskless processing to somewhat reduce the repetition of the above steps. (L.J., Muray.

Pnoa、 Int’l Ion Engr、Cong
r、l5IAT’83andI PAT ’ 83 (
Kyoto) 、1555 (1983) )ここで示
された一連の連結された装置内で加工するので防塞には
幾分効果がある。しかしこの方法によっても汚染を防止
するにはほど遠い。
Pnoa, Int'l Ion Engr, Cong
r, l5IAT'83andI PAT'83 (
(Kyoto), 1555 (1983)) Processing in a series of connected devices shown here is somewhat effective in blocking. However, even this method is far from preventing contamination.

発明が解決しようとした問題点 以上の従来例において明らかなように、現在の方法では
、汚染を防止するのは非常に難しく、そのため洗浄を何
ども繰り返すことになる。このような洗浄は工程数を増
やすために歩留りの低下や汚染の残留などによる信頼性
の低下が指速されている。
Problems sought to be solved by the invention As is clear from the prior art examples above, it is very difficult to prevent contamination with current methods, which results in repeated cleaning. Since such cleaning increases the number of steps, reliability is rapidly decreasing due to a decrease in yield and residual contamination.

又、一方、連結された装置においては、改良が行われて
いるが、微細加工における精密な位置合せの問題や、ゴ
ミの出ない搬送系の開発などが残されている。
On the other hand, although improvements have been made in connected devices, problems such as precise positioning in microfabrication and the development of a transport system that does not generate dust remain.

本発明はこのような欠点を解消した新しい複合微細加工
装置を提供することを目的とした。
The object of the present invention is to provide a new composite microfabrication device that eliminates these drawbacks.

問題点を解決するための手段 本発明Kかかる微細加工装置は、高真空及び低真空の少
なくとも2室の作業空間と、イオン、電子銃およびそれ
らの共通の出射口と、空間電流モニター又は吸収電流モ
ニターの少なくともどちらかと、加熱ステージと、前記
モニターにより検出した位置及び伸びに応じて前記加熱
ステージを駆動せしめると同時に、前記イオンないしは
電子の振巾を変化せしめる機構とを有した複合装置であ
って、出射口中心軸と加熱ステージ上の試料交点に、粒
子流の中心軸を一致せしめる。
Means for Solving the Problems The present invention K Such a microfabrication apparatus has at least two working spaces of high vacuum and low vacuum, an ion gun and an electron gun and their common exit port, and a space current monitor or absorption current. A composite device comprising at least one of a monitor, a heating stage, and a mechanism that drives the heating stage according to the position and elongation detected by the monitor and simultaneously changes the amplitude of the ions or electrons. , align the central axis of the particle flow with the intersection of the central axis of the exit port and the sample on the heating stage.

作  用 本発明によれば、装置内で様々な処理が行え、汚染、積
車の恐れがなく、高精度に半導体装置を製造することが
可能となる〇 実施例 本発明は以上の問題点を解決するために、第1図に示す
ような構成2機能を具備した装置を用いるO 半導体基板等からなる被加工物1は、加熱ステージ2上
に載せられており、加熱ステージ2の移動は、レーザモ
ニターなどによって高精度に位置ぎめされる。電子銃3
、イオン銃4などから生じる線束は各々の光学系3’、
4’、3“、4“を通り、共通の鏡筒6を通過し、同一
の中心軸6を有するよう電子的に調整され、被加工物1
を照射する◇この時、必要に応じて、粒子ガン8よシ流
出する粒子流7と複合的に反応し、被加工物1を加工(
エツチング、堆積、拡散など)する。この時、昇温や加
熱などによる位置ずれや、伸縮を吸収電流モニター9や
空間電流モニター10などで検出し、光学系3”、4“
に補正信号を送シ、高精度の位置合せを達成する。
Function According to the present invention, various processes can be performed within the device, and there is no fear of contamination or loading, and it is possible to manufacture semiconductor devices with high precision. Embodiment The present invention solves the above problems. In order to solve this problem, an apparatus having two functions as shown in FIG. Positioning is performed with high precision using laser monitors and other devices. electron gun 3
, the ray flux generated from the ion gun 4, etc. is transmitted to each optical system 3',
4', 3", 4", through a common lens barrel 6, electronically adjusted to have the same central axis 6, and the workpiece 1
◇ At this time, if necessary, the workpiece 1 is processed (
etching, deposition, diffusion, etc.). At this time, the absorption current monitor 9, space current monitor 10, etc. detect positional deviation and expansion/contraction due to temperature rise or heating, etc., and optical systems 3", 4"
A correction signal is sent to achieve highly accurate alignment.

なお、真空ポンプ系11により、高真空(約10−’ 
Pa以下)から低真空(約10Pa)までの領域を制御
する。この範囲での真空からの汚染を防ぐために二室構
成となし、その間にゲート13を設けである。
Note that the vacuum pump system 11 generates a high vacuum (approximately 10-'
control the range from low vacuum (approx. 10 Pa) to low vacuum (approximately 10 Pa). In order to prevent contamination from vacuum in this range, the chamber is constructed with two chambers, and a gate 13 is provided between them.

さらに、反応の促進などのため、レーザ光12や、膜厚
や反応の進行状況を検出する膜モニター14を具備して
いる。
Furthermore, it is equipped with a laser beam 12 to promote the reaction, and a film monitor 14 to detect the film thickness and the progress of the reaction.

本発明は汚染、洗浄2発塵2位置合せ等の問題の解決の
ために、主たる工程においては、第1図に示すように、
被加工物1を加熱ステージ2に載せ、次に搬出するまで
搬送を行わない。搬入出口にはロードロックを設けてお
くことが望ましい。
In order to solve problems such as contamination, cleaning, dust generation, and alignment, the main steps of the present invention are as shown in Figure 1.
The workpiece 1 is placed on the heating stage 2 and is not transported until the next time it is taken out. It is desirable to provide a load lock at the loading/unloading exit.

選択的反応促進やドーパントの導入のために、電子銃3
やイオン銃4を少なくとも備え、各々の電子光学系3,
4によシ整形し、最後に共通の鏡筒5を通すことによっ
て、電子線、イオン線束の中心軸6を電子的に完全に一
致せしめることによって、両者の位置合せを完全にし、
被加工物1上での位置すれか、0.02μm以下の高精
度を実現せしめている。共通の鏡筒6には、両者に必要
な一部共通の電子光学系3“および49!具備されてい
る。
Electron gun 3 for selective reaction promotion and dopant introduction
and an ion gun 4, and each electron optical system 3,
4, and finally pass through a common lens barrel 5 to make the central axes 6 of the electron beam and ion beam electronically completely coincide with each other, thereby perfecting the alignment of both.
High accuracy of positional deviation on the workpiece 1 of 0.02 μm or less is achieved. The common lens barrel 6 is equipped with partially common electron optical systems 3" and 49! that are necessary for both.

パターン形成のためには、外部信号に同期して、これら
の線束が偏向され、被加工物1上に照射されることによ
って達成される。この時、必要に応じて例えば反応用の
ガスを、粒子流7(イオン。
Pattern formation is achieved by deflecting these beams and irradiating them onto the workpiece 1 in synchronization with an external signal. At this time, if necessary, for example, a reaction gas may be supplied to the particle stream 7 (ion stream).

プラズマ、分子など)として粒子ガン8より送入し、例
えばエツチング、膜堆積や拡散を生じしめる。この時、
加熱ステージ2の昇温により、当然。
The particles are introduced from the particle gun 8 as plasma, molecules, etc., and cause, for example, etching, film deposition, and diffusion. At this time,
Naturally, due to the temperature increase in heating stage 2.

被加工物1の位置ずれが生じる。この補正は、線束の照
射により生じた吸収電流のモニター9、二次電子などの
空間電流のモニタ10によシ、被加工物1上にあらかじ
め設けた位置パターンを検出し、線束の位置情報と対比
し、その差分をとることによってなされる。この位置ず
れや、伸縮の補正値は、前述のパターン形成にあたって
入力する線束の位置情報に反映される。従って、温度変
化や何らの原因で生ずる位置ずれ01μm以下の微小な
補正を、被加工物1を動かすことなく達成でき、従って
、精度は非常に高いものとなっているO膜堆積やエツチ
ングには多量の粒子流7が必要とされる。この排気には
大きな真空ポンプ系11が必要とされるが、その負荷を
少なくするため、粒子流7をパルス的に導入する、中心
軸に焦点を合わせて極く狭い領域のみに粒子流7を照射
することが望ましいOこうすることKよって、負荷1/
10〜1/1000に小さくでき、従って、小型のポン
プ系を長寿命で信頼性よく使用することができる@ 又、同様にレーザ光12などを補助励起手段として、上
記と同様に中心部に集中させ、反応を促進することも有
用であるOこの中心部のみに集中させ、精密な加工を行
う方法は、特に1μm以下の精度を必要としたときに有
用である。これよシ広い部分の加工を連続して行うには
、加熱ステージ2を少し移動せしめて新たな被加工面を
もってくることによりなされる。
A positional shift of the workpiece 1 occurs. This correction is performed by detecting a position pattern prepared in advance on the workpiece 1 using a monitor 9 of the absorbed current generated by irradiation of the radiation beam and a monitor 10 of space currents such as secondary electrons, and using the positional pattern of the radiation beam and the This is done by comparing and taking the difference. The correction values for this positional shift and expansion/contraction are reflected in the positional information of the line bundle that is input when forming the pattern described above. Therefore, minute corrections of positional deviations of 01 μm or less caused by temperature changes or other causes can be achieved without moving the workpiece 1, and therefore, the accuracy is extremely high for O film deposition and etching. A large particle flow 7 is required. This evacuation requires a large vacuum pump system 11, but in order to reduce its load, the particle stream 7 is introduced in a pulsed manner, focusing on the central axis and directing the particle stream 7 only in a very narrow area. It is desirable to irradiate O by doing this K, the load 1/
It can be made 10 to 1/1000 times smaller, and therefore, a small pump system can be used with long life and reliability. It is also useful to accelerate the reaction by concentrating only on the central part and performing precise processing, which is particularly useful when precision of 1 μm or less is required. In order to continuously process a wider area, the heating stage 2 is moved slightly to bring a new surface to be processed.

次に、高速の膜堆積や、エツチングのために大量のガス
等を導入すると真空室内の圧力が高くなり、又、鏡筒を
汚染する。したがって、その防止のために、高真空室側
と低真空室側の少なくとも二つの室に分けておき、両室
間にゲート13を設置しておく。このゲート13を、低
真空室の浄化などのため例えばベーク時に閉鎖しておく
ことによって、高真空室側の汚染を防止するなど有効な
手段を提供する。
Next, when a large amount of gas is introduced for high-speed film deposition or etching, the pressure inside the vacuum chamber increases and the lens barrel is contaminated. Therefore, in order to prevent this, the chamber is divided into at least two chambers, a high vacuum chamber side and a low vacuum chamber side, and a gate 13 is installed between the two chambers. By closing this gate 13 during baking, for example, to purify the low vacuum chamber, an effective means for preventing contamination on the high vacuum chamber side is provided.

加工精度の非常に高いシリコン半導体装置製造工程を例
にとって本発明の詳細な説明する0被加工物1としてN
型1eSOmφ、(100)。
The present invention will be explained in detail by taking as an example a silicon semiconductor device manufacturing process with very high processing accuracy.
Type 1eSOmφ, (100).

3〜6ΩαのSi 基板21を用いて、第2図に示すよ
うに擬似的な形状の形成を試みた。
Using a Si substrate 21 with a resistance of 3 to 6 Ωα, an attempt was made to form a pseudo shape as shown in FIG.

先ず、si基板21を酸化して約0.3μmの酸化膜2
2を形成し、つづいてプラズマ窒化膜23を約0.1μ
mμm酸形成。(第1図a)、この基板を第1図に示す
装置内に装填し、第2図に示す残シの工程を、汚染やゴ
ミの心配なしに行ったO装置内での超精密加工域は6f
i角であるので、S1基板21全面の加工には、第3図
に示すように6■角の網目を想定し、例えば斜線を引い
た部分を中心軸に合わせて、単一工程の加工を行ない、
次にその横の網目部分とステップを踏んで行なったOパ
ターンとしては、試験用として、第ルベルは第4図に示
すような3μmX10μmを繰り返した一番簡単なもの
を基礎とし、以降のレベルは、第2図断面図に対応する
間隔、巾を有した短冊状のパターンを用いた。
First, the Si substrate 21 is oxidized to form an oxide film 2 of approximately 0.3 μm.
2, and then a plasma nitride film 23 with a thickness of about 0.1 μm.
mμm acid formation. (Figure 1a) This substrate was loaded into the equipment shown in Figure 1, and the remaining process shown in Figure 2 was carried out in the ultra-precision processing area of the O equipment without worrying about contamination or dust. is 6f
Since the entire surface of the S1 board 21 is to be machined, assume a 6-square mesh as shown in Fig. 3, and for example, align the diagonally lined part with the central axis and perform processing in a single step. conduct,
Next, as for the O pattern that was made step by step with the mesh part next to it, for testing purposes, the level 1 was based on the simplest one with 3 μm x 10 μm repeated as shown in Figure 4, and the subsequent levels were , a rectangular pattern having a spacing and width corresponding to the cross-sectional view of FIG. 2 was used.

先ず、第4図に示す第ルベルのノくターン(斜線部)に
沿って0.3μm径に絞った電子線を照射しながら、粒
子流7(第1図)としてイオン化SF6ガスを0.6X
10−2Paのリークパルプを通して送入し、窒化膜2
3を少しずつ除去し、第2図aの断面形状を得た。次に
基板を300℃に加熱し、ゲート13(第1図)を閉鎖
した状態で、プラズマCHF5ガスを約10−1Pa導
入し、酸化膜22′を完全に除去した後、一旦真空度を
向上(約1O−4Pa)、同時に基板900℃に加熱し
た0引き続いて、酸素ガスを約1Pa導入し、0.06
μmのゲート酸化膜24を再度形成した(第2図b)O
その後、真空度を1o  Pa  としたO引き続いて
、基板温度を550℃に保持して512H2C140粒
子流を照射しなからGa イオン線束を同時に照射した
Oイオン線束のスポット径は約0.06μmであり、1
μmの話中に々るよう短冊状に重畳して照射したOその
結果、第2図に示すように巾1μm、高さ0.6μmの
擬似ゲート電極26を形成した(第2図C)。ゲート1
3(第1図)を閉鎖しさらに基板を再び900℃に加熱
し、上述のように酸素ガスを約I Pa導入して、再酸
化を行ない、ゲート電極26の回シに酸化膜26を形成
した。この時、同時に、ゲート酸化膜24の一部が変化
して24′となり、窒化膜23も殆んど酸化膜23′に
変化している(第2図d)0次にCHF3ラジカルを導
入して、酸化膜23゜23’、24’を全面エツチング
し、丁度酸化膜24′を除去した0 次に一旦真空度を1Ω−5Pa にあげ、残留ガスをほ
ぼ完全に除去した後、基板を約800℃に保持した。ゲ
ート13(第1図)を開け、再びG&イオン線束を照射
した。
First, while irradiating an electron beam narrowed to a diameter of 0.3 μm along the Lebel's turn (shaded area) shown in FIG. 4, ionized SF6 gas was heated at 0.6
Injected through leak pulp at 10-2 Pa to form a nitride film 2
3 was removed little by little to obtain the cross-sectional shape shown in Figure 2a. Next, the substrate is heated to 300°C, and with the gate 13 (Fig. 1) closed, plasma CHF5 gas of about 10-1 Pa is introduced to completely remove the oxide film 22', and then the degree of vacuum is increased once. (approximately 1O-4Pa), and at the same time the substrate was heated to 900℃.Subsequently, oxygen gas was introduced at approximately 1Pa, and the substrate was heated to 900℃.
A gate oxide film 24 of μm was formed again (Fig. 2b).
After that, the vacuum level was set to 10 Pa, the substrate temperature was maintained at 550°C, and the 512H2C140 particle stream was irradiated, and then the Ga ion beam was simultaneously irradiated.The spot diameter of the O ion beam was approximately 0.06 μm. ,1
As a result, a pseudo gate electrode 26 having a width of 1 μm and a height of 0.6 μm was formed as shown in FIG. 2 (FIG. 2C). gate 1
3 (FIG. 1), the substrate is heated again to 900° C., and oxygen gas is introduced at about I Pa as described above to perform reoxidation, forming an oxide film 26 on the surface of the gate electrode 26. did. At this time, at the same time, a part of the gate oxide film 24 changes to become 24', and most of the nitride film 23 also changes to oxide film 23' (Fig. 2d). CHF3 radicals are introduced into the 0th order. Then, the oxide films 23, 23' and 24' were etched over the entire surface, and the oxide film 24' was just removed.Next, the degree of vacuum was raised to 1Ω-5Pa, and after almost completely removing the residual gas, the substrate was It was maintained at 800°C. The gate 13 (FIG. 1) was opened and the G&ion beam flux was irradiated again.

この時、照射域は第2図eのAl線巾に相当する巾をも
った短冊状の形状とした。約5o分照射した後基板を約
2oo℃に冷却し、アルキルAI!ガスを1秒毎に10
0m5ec間リークパルプを通じて、粒子流7(第1図
)として基板の中心軸直下に衝突せしめた。この結果、
第2図eに示すようにAl配線27がうまく形成された
。この後、破面を取り、断面をSEMで観察した所、第
2図6と同じ形状をしていた◎又、スティンニッチによ
り、同図に示すようにソース、ドレインとなるGa拡散
層28が確認された。
At this time, the irradiation area had a rectangular shape with a width corresponding to the Al wire width shown in FIG. 2e. After irradiating for about 50 minutes, the substrate was cooled to about 200 degrees Celsius, and the alkyl AI! 10 gas every second
The particle stream 7 (FIG. 1) was caused to collide directly under the center axis of the substrate through the leak pulp for 0 m5ec. As a result,
As shown in FIG. 2e, the Al wiring 27 was successfully formed. After that, the fracture surface was taken and the cross section was observed with SEM, and it was found to have the same shape as shown in Figure 2. confirmed.

なお以上の試行において、温度の上昇などによる位置ず
れの補正については、電子線やイオン線が照射した時に
生ずる二次電子をとらえ、パターン像として解析し、所
定の基準長よりのずれ分だけを光学系f、/(第1図)
を用いて行った。
In the above trials, in order to correct positional deviations due to temperature increases, secondary electrons generated when irradiated with electron beams or ion beams are captured, analyzed as a pattern image, and only deviations from a predetermined reference length are corrected. Optical system f, / (Fig. 1)
This was done using

以上の説明で明らかなように、本装置内においての工程
では、汚染、積車の恐れはないことが判る0 これに対して、従来例においては、パターン形成時に−
Hしシストを使用する。このため、汚染。
As is clear from the above explanation, there is no risk of contamination or stacking during the process within this device.On the other hand, in the conventional example, during pattern formation -
Use Hshicyst. Because of this, pollution.

積車の生ずることは自明である。第5図に、いわゆるS
IMSによって、表面のCr量を調べた結果を示す0即
ち、レジストを塗り、現像し、o2プラズマで除去した
後には、表面層に、多量のCrが残存していることが判
る。一方、上述の全工程を終えた基板表面には、Orの
他、Feその他の重金属類の汚染は全く認められなかっ
た。
It is self-evident that a truck is created. Figure 5 shows the so-called S
The result of examining the amount of Cr on the surface by IMS is 0, which indicates that a large amount of Cr remains in the surface layer after applying the resist, developing it, and removing it with O2 plasma. On the other hand, no contamination of heavy metals such as Fe or other metals other than Or was observed on the surface of the substrate after all the above-mentioned steps were completed.

発明の効果 以上の説明で明らかなように、本発明の装置によれば、
汚染や積車の恐れが解消し、従って、得られる高精度電
子部品、例えば超高集積化半導体装置の特性及び信頼性
の向上に多大な寄与が生ずる0又、多数の工程を一装置
内で行えるために、多品種少量、混載素子などの迅速な
製作に使用され、大きな効果をあげている0
Effects of the Invention As is clear from the above explanation, according to the apparatus of the present invention,
The fear of contamination and loading is eliminated, and this greatly contributes to improving the characteristics and reliability of the resulting high-precision electronic components, such as ultra-highly integrated semiconductor devices. Because of this, it is used for rapid production of high-mix, low-volume, mixed-mounted devices, etc., and has achieved great results.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の微細加工装置の概略図、第
2図は半導体装置を形成する工程を示す図、第3図はパ
ターンを形成する小領域を示す図、第4図は簡単なパタ
ーン図、第5図は従来例における表面のCr汚染を示す
SIMS結果を示す図である。 1・・・・・・加工物、2・・・・・・加熱ステージ、
3・川・・電子銃、4・・・・・・イオン銃、6・・・
・・・鏡筒、6・・・・・・中心軸、7・・・・・・粒
子流、8・・・・・・粒子ガン、9・・・・・・吸収電
流モニター、10・・・・・・空間電流モニター、11
・・・・・・真空ポンプ系、12・・・・・・レーザ光
、13・・・・・・ゲート、14・・・・・・膜モニタ
ー。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
FIG. 1 is a schematic diagram of a microfabrication apparatus according to an embodiment of the present invention, FIG. 2 is a diagram showing the process of forming a semiconductor device, FIG. 3 is a diagram showing a small area in which a pattern is formed, and FIG. A simple pattern diagram, FIG. 5, is a diagram showing SIMS results showing Cr contamination on the surface in a conventional example. 1... Workpiece, 2... Heating stage,
3. River... Electron gun, 4... Ion gun, 6...
... Lens tube, 6 ... Central axis, 7 ... Particle flow, 8 ... Particle gun, 9 ... Absorption current monitor, 10 ... ...Space current monitor, 11
...Vacuum pump system, 12...Laser light, 13...Gate, 14...Membrane monitor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (2)

【特許請求の範囲】[Claims] (1)高真空及び低真空の少なくとも2室の作業空間と
、イオン、電子銃およびそれらの共通の出射口と空間電
流モーター又は吸収電流モニターの少なくともどちらか
と、加熱ステージと、前記モニターにより検出した位置
及び伸びに応じて前記加熱ステージを駆動せしめると同
時に、前記イオンないしは電子の振巾を変化せしめる機
構とを有したことを特徴とした微細加工装置。
(1) At least two working spaces of high vacuum and low vacuum, an ion gun, an electron gun and their common exit port, at least one of a space current motor or an absorption current monitor, a heating stage, and detection by the monitor. A microfabrication device comprising: a mechanism for driving the heating stage according to position and elongation, and at the same time changing the amplitude of the ions or electrons.
(2)出射口中心軸と加熱ステージ上の試料交点に、粒
子流の中心軸を一致せしめたことを特徴とした特許請求
の範囲第1項記載の微細加工装置。
(2) The microfabrication apparatus according to claim 1, wherein the central axis of the particle flow is made to coincide with the intersection of the central axis of the exit port and the sample on the heating stage.
JP6252585A 1985-03-27 1985-03-27 Minute process apparatus Pending JPS61220431A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6252585A JPS61220431A (en) 1985-03-27 1985-03-27 Minute process apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6252585A JPS61220431A (en) 1985-03-27 1985-03-27 Minute process apparatus

Publications (1)

Publication Number Publication Date
JPS61220431A true JPS61220431A (en) 1986-09-30

Family

ID=13202686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6252585A Pending JPS61220431A (en) 1985-03-27 1985-03-27 Minute process apparatus

Country Status (1)

Country Link
JP (1) JPS61220431A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0262039A (en) * 1988-08-29 1990-03-01 Hitachi Ltd Fine processing of multilayer element and apparatus therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0262039A (en) * 1988-08-29 1990-03-01 Hitachi Ltd Fine processing of multilayer element and apparatus therefor

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