JPS6120780Y2 - - Google Patents

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Publication number
JPS6120780Y2
JPS6120780Y2 JP1977081020U JP8102077U JPS6120780Y2 JP S6120780 Y2 JPS6120780 Y2 JP S6120780Y2 JP 1977081020 U JP1977081020 U JP 1977081020U JP 8102077 U JP8102077 U JP 8102077U JP S6120780 Y2 JPS6120780 Y2 JP S6120780Y2
Authority
JP
Japan
Prior art keywords
leads
lead
substrate
chip
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1977081020U
Other languages
Japanese (ja)
Other versions
JPS549669U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1977081020U priority Critical patent/JPS6120780Y2/ja
Publication of JPS549669U publication Critical patent/JPS549669U/ja
Application granted granted Critical
Publication of JPS6120780Y2 publication Critical patent/JPS6120780Y2/ja
Expired legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【考案の詳細な説明】 本考案は、セラミツクパツケージ型半導体装置
に関し、特にセラミツクパツケージにおいてリー
ドが引き出されるガラス封止部の構造に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ceramic package type semiconductor device, and more particularly to the structure of a glass sealing part from which leads are drawn out in a ceramic package.

通常、セラミツクパツケージを有するIC、LSI
等の半導体装置は、セラミツク等の絶縁性基板の
ほぼ中央に、半導体チツプ(ICチツプ、LSIチツ
プ)を載置し、絶縁性基板の周辺部に固定された
外部リードの端子の所定の配線をした後、セラミ
ツクの蓋を基板にかぶせ、それらの基板及び蓋の
対向部同士を低融点ガラスで接着して作られる。
Usually IC, LSI with ceramic package
In such semiconductor devices, a semiconductor chip (IC chip, LSI chip) is placed almost in the center of an insulating substrate such as ceramic, and a predetermined wiring of external lead terminals fixed to the periphery of the insulating substrate is installed. After that, a ceramic lid is placed over the substrate, and the opposing parts of the substrate and lid are bonded together using low-melting glass.

第1図は、この種のセラミツクパツケージ型半
導体装置の一例としてセラミツクパツケージ型の
ICの組み立て途中の状態を示したもので1がセ
ラミツク基板、2はICチツプでセラミツク基板
の中央溝部に収納され、固着されている。3は一
方の先端部4がICチツプ2の周辺近傍に位置
し、他方が基板の相対する一対の側面部から引き
出されるリードである。このリードの先端部4に
ICチツブ2の電極からコネクタ線5が接続され
る。この様に組み立てた後、上からセラミツクの
蓋6をかぶせ低融点ガラス(フリツト)によつて
セラミツク基板1に密着させる。これによりIC
チツプ2は外部雰囲気から遮断されると共に機械
的応力に対しても保護される。
Figure 1 shows a ceramic package type semiconductor device as an example of this type of ceramic package type semiconductor device.
This figure shows the IC being assembled, with 1 being a ceramic substrate and 2 being an IC chip, which is housed in the central groove of the ceramic substrate and secured. Reference numeral 3 denotes a lead whose one tip 4 is located near the periphery of the IC chip 2 and whose other end is drawn out from a pair of opposing side surfaces of the substrate. At the tip 4 of this lead
A connector wire 5 is connected to an electrode of the IC chip 2. After assembling in this manner, a ceramic lid 6 is placed on top and tightly attached to the ceramic substrate 1 with a low melting point glass (frit). This allows IC
The chip 2 is isolated from the external atmosphere and is also protected against mechanical stresses.

しかるに、従来のパツケージ型半導体装置は第
1図から明らかな通り、基板とリードとの接触面
積、特に中央側面部から引き出されるリードの基
板又は蓋に対する接触面積が小さく、接着強度が
充分でない。その結果、中央部のリード個所でリ
ーク又ははがれの発生が生じ、製品の製造歩留及
び信頼性の低下を招来している。
However, as is clear from FIG. 1, in the conventional package type semiconductor device, the contact area between the substrate and the leads, especially the contact area of the leads pulled out from the central side surface with the substrate or the lid, is small, and the adhesive strength is not sufficient. As a result, leakage or peeling occurs at the central lead portion, resulting in a reduction in product manufacturing yield and reliability.

本考案の目的は、斯る従来の問題点に鑑み、側
面部中央のリードの接着強度を高め、製品歩留、
信頼性の向上を可能にした改良された半導体装置
を提供することにある。
In view of these conventional problems, the purpose of this invention is to increase the adhesive strength of the lead at the center of the side surface, and to improve product yield and
An object of the present invention is to provide an improved semiconductor device that enables improved reliability.

本考案の要旨とするところは、絶縁性基板と、
該基板のほぼ中央に固着した半導体チツプと、一
方の先端部が上記半導体チツプの周辺近傍に位置
してこのチツプの電極に接続され、他方の先端部
が上記絶縁性基板の相対する一対の側面部から外
部に引き出される長いリードと短いリードを有す
る複数のリードと、上記半導体チツプを外部雰囲
気から遮断するために上記複数のリードを介し
て、上記絶縁性基板に密着する絶縁性蓋と、上記
基板、上記リード及び上記蓋の相互密着部を封止
する絶縁性固着剤とから成る半導体装置におい
て、上記対向する側面部それぞれより突出する短
いリードの一部の上記長いリードの幅より広い部
分を設けると共にこの広い部分に貫通孔を設け、
上記長いリードには上記幅の広い部分と貫通孔と
を設けないことを特徴とする半導体装置にある。
The gist of the present invention is that an insulating substrate,
A semiconductor chip is fixed to approximately the center of the substrate, one tip is located near the periphery of the semiconductor chip and connected to an electrode of the chip, and the other tip is attached to a pair of opposing side surfaces of the insulating substrate. a plurality of leads having long leads and short leads led out from the part; an insulating lid that is closely attached to the insulating substrate via the plurality of leads to insulate the semiconductor chip from the external atmosphere; In a semiconductor device comprising a substrate, an insulating adhesive for sealing the mutually adhesive portions of the leads and the lid, a part of the short leads protruding from each of the opposing side surfaces is wider than the width of the long leads. At the same time as providing a through hole in this wide part,
The semiconductor device is characterized in that the long lead is not provided with the wide portion and the through hole.

以下、本考案の一実施例を説明する。 An embodiment of the present invention will be described below.

第2図はセラミツク基板に取り付けられたリー
ドを示す上面図で、セラミツクの蓋を取りはずし
た状態を示している。符号1乃至5は第1図と同
様の部分を示している。本考案に係わる部分は7
で示す個所にある。即ち、中央部リードの接触面
積を増大するために中央部のリード巾を太めた
り、あるいは変形したりしている。更にまた、余
裕のある場合には第2図中に点線8で示したよう
に接触面積の増大された中央部のリードに貫通孔
を設けることによりリードとケース・キヤツプと
の間の接着強度を更につよめてもよい。このこと
により、中央部リードのそれにほぼ等しくし、従
来の装置で生じていた中央リード部でのリーク現
象又ははがれを防止することができる。
FIG. 2 is a top view showing the leads attached to the ceramic substrate, with the ceramic lid removed. Reference numerals 1 to 5 indicate the same parts as in FIG. The parts related to this invention are 7
It is located at the location shown. That is, in order to increase the contact area of the central lead, the width of the central lead is increased or the lead is deformed. Furthermore, if there is sufficient space, a through hole can be provided in the lead at the center where the contact area is increased, as shown by the dotted line 8 in Figure 2, to increase the adhesive strength between the lead and the case cap. You can make it even stronger. This makes it possible to make the lead approximately equal to that of the central lead, and to prevent leakage or peeling of the central lead that occurs in conventional devices.

本考案によれば、簡単な構造の改良により、著
しい製品歩留及び製品の信頼性向上が達成され、
しかも耐リーク性、はがれの問題をほぼ解消する
ことができる。
According to the present invention, significant improvements in product yield and product reliability are achieved through simple structural improvements.
Furthermore, leak resistance and peeling problems can be almost eliminated.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は公知のセラミツクパツケージ型半導体
装置の組み立て状況を示す斜視図、第2図は本考
案の一実施態様の説明図である。 1……セラミツク基板、2……ICチツプ、3
……リード、4……リード先端部、5……コネク
タ線、6……セラミツク蓋、7……変形されたリ
ード部分。
FIG. 1 is a perspective view showing the state of assembly of a known ceramic package type semiconductor device, and FIG. 2 is an explanatory view of one embodiment of the present invention. 1... Ceramic substrate, 2... IC chip, 3
... Lead, 4 ... Lead tip, 5 ... Connector wire, 6 ... Ceramic lid, 7 ... Deformed lead part.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁性基板と、該基板のほぼ中央に固着した半
導体チツプと、一方の先端部が上記半導体チツプ
の周辺近傍に位置してこのチツプの電極に接続さ
れ、他方の先端部が上記絶縁性基板の相対する一
対の側面部から外部に引き出される長いリードと
短いリードを有する複数のリードと、上記半導体
チツプを外部雰囲気から遮断するために上記複数
のリードを介して、上記絶縁性基板に密着する絶
縁性蓋と、上記基板、上記リード及び上記蓋の相
互密着部を封止する絶縁性固着剤とから成る半導
体装置において、上記対向する側面部それぞれよ
り突出する短いリードの一部に上記長いリードの
幅より広い部分を設けると共にこの広い部分に貫
通孔を設け、上記長いリードには上記幅の広い部
分と貫通孔とを設けないことを特徴とする半導体
装置。
An insulating substrate, a semiconductor chip fixed approximately at the center of the substrate, one tip located near the periphery of the semiconductor chip and connected to the electrode of this chip, and the other tip connected to the insulating substrate. A plurality of leads having long leads and short leads led out from a pair of opposing side surfaces, and an insulator that is closely attached to the insulating substrate via the plurality of leads to isolate the semiconductor chip from the external atmosphere. In the semiconductor device, the long lead is attached to a part of the short lead protruding from each of the opposing side surfaces. A semiconductor device characterized in that a portion wider than the width is provided and a through hole is provided in the wide portion, and the long lead is not provided with the wide portion and the through hole.
JP1977081020U 1977-06-22 1977-06-22 Expired JPS6120780Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1977081020U JPS6120780Y2 (en) 1977-06-22 1977-06-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1977081020U JPS6120780Y2 (en) 1977-06-22 1977-06-22

Publications (2)

Publication Number Publication Date
JPS549669U JPS549669U (en) 1979-01-22
JPS6120780Y2 true JPS6120780Y2 (en) 1986-06-21

Family

ID=29000458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977081020U Expired JPS6120780Y2 (en) 1977-06-22 1977-06-22

Country Status (1)

Country Link
JP (1) JPS6120780Y2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50123258U (en) * 1974-03-20 1975-10-08

Also Published As

Publication number Publication date
JPS549669U (en) 1979-01-22

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