JPS61198701A - Overvoltage controller - Google Patents
Overvoltage controllerInfo
- Publication number
- JPS61198701A JPS61198701A JP3907785A JP3907785A JPS61198701A JP S61198701 A JPS61198701 A JP S61198701A JP 3907785 A JP3907785 A JP 3907785A JP 3907785 A JP3907785 A JP 3907785A JP S61198701 A JPS61198701 A JP S61198701A
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- low melting
- overvoltage limiting
- point metal
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、過電圧制限素子の破壊による周辺への悪影
憂を防止するようにした過電圧制限装置に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an overvoltage limiting device that prevents damage to surrounding areas due to destruction of an overvoltage limiting element.
一般に、サイリスタを使用した゛高電圧の電力変換装置
においては、通常の動作電圧を考慮して素子の直列個数
が決定される。そして、散発的に印加される雷インパル
スや、開閉サージ等はアレスタで所定の電圧に制限して
いる。Generally, in a high-voltage power converter using a thyristor, the number of elements connected in series is determined in consideration of the normal operating voltage. Sporadically applied lightning impulses, switching surges, etc. are limited to a predetermined voltage by arresters.
従来のものは、第３図に示すように、各サイリスタ素子
”１ ｒ ” ２ ＋ ” ３に、アレスタＡ１ｎＡ４
＋Ａ３及びスナバ−回路Ｓｌ ＊ＳＲ＊８３が並列に
接続されている。In the conventional one, as shown in FIG.
+A3 and snubber circuit SL*SR*83 are connected in parallel.
この場合、各サイリスタ素子”ｌ ｒＴ８＋ＴＳには外
部から雷インパルス等の過電圧が印加された場合も。In this case, even if an overvoltage such as a lightning impulse is applied to each thyristor element T8+TS from the outside.
並列に接続されたアレスターＡムーＡ２豪Ａ３及びスナ
バ−回路Ｓｌ、Ｓ２．ε３により、制限された電圧ＶＭ
Ｌか印加されないため、各サイリスタ素子Ｔｌ ＋Ｔ２
＋Ｔ３は保護される。Arrester Amu A2 Australia A3 and snubber circuits Sl, S2 . connected in parallel. Due to ε3, the limited voltage VM
Since L is not applied, each thyristor element Tl + T2
+T3 is protected.
しかし、各５′イリスタＴＬ ＊Ｔ！ ＋Ｔ３に導通指
令が出たとき、４弧回路の故障によって、サイリスタ素
子Ｔ１のみが導通しなかったとすると、サイリスタ素子
Ｔｌを残した他のサイリスタ素子Ｔ２．Ｔ３が４通し、
サイリスタ素子Ｔ、と並列に接続されたアレスターＡｌ
には、外部の回路条件で決定される負荷電流が強制的に
流れ、その端子電圧はアレスターＡ１の電圧−電流特性
によって決定される値となる。However, each 5′ Irista TL *T! +T3, if only thyristor element T1 fails to conduct due to a failure in the four-arc circuit, the other thyristor elements T2 . 4 T3s,
Arrester Al connected in parallel with thyristor element T
A load current determined by external circuit conditions is forced to flow through the arrester A1, and its terminal voltage has a value determined by the voltage-current characteristics of the arrester A1.
通常、アレスタは負荷電流のような過大な電流を長時間
流す能力をもっていないので、過電圧制限要素は最終的
に破壊する。Typically, the overvoltage limiting element will eventually fail because the arrester does not have the ability to carry excessive currents such as the load current for long periods of time.
その時、飛散した破片で周辺の部品を損傷し九シ、持続
的なアークの発生によりミ力変換装置内に悪影響を与え
ることがあるので、第４図に示すように、過電圧制限要
素が破壊したら、ただちにアレスタの両端′５ｒ、！気
的に短絡するように構成されたものが提案されている。At that time, the scattered fragments may damage surrounding parts, and continuous arcing may have an adverse effect on the power converter, so if the overvoltage limiting element is destroyed, as shown in Figure 4 , immediately both ends of the arrester '5r,! Some proposals have been made that are configured to create a mechanical short circuit.
すなわち、第４図では、酸化亜鉛形アレスタなどの過電
圧制限要素ｆ＋１に半田などの低融点金属（２）を当接
させ、一対の１Ｅｉｆ３）、１４１間に過電圧制限要素
（１）と低融点金属（２）とを電気的に直列接続し、ば
ね（５）で一方の電ｆｆｌ ＋３１に押圧し、他方の電
極（４）とけシセント（６）で接続し、溶融した低融点
金属［２）で両通電部（３ｍ） 、 （４ｍ）が電気的
に接続されるように、対向した両通電部（３ｍ）、（４
ｎ）が低融点金属（２）の下部に配置しである。絶縁性
容器（７）ｌｉ一対の電極ｆ３＋、＋４１を呆持してい
る。That is, in FIG. 4, a low melting point metal (2) such as solder is brought into contact with an overvoltage limiting element f+1 such as a zinc oxide type arrester, and the overvoltage limiting element (1) and the low melting point metal are connected between a pair of 1Eif3) and 141. (2) are electrically connected in series, the spring (5) presses one of the electrodes (4), and the other electrode (4) is connected by the melting point (6), and the molten low melting point metal [2] Both current-carrying parts (3m) and (4m) facing each other are connected so that both current-carrying parts (3m) and (4m) are electrically connected.
n) is placed below the low melting point metal (2). The insulating container (7) li holds a pair of electrodes f3+, +41.
上記構成において、過電圧制限要素ｆｌ）に過大な電流
が流れる場合、ｒｔｉ ｔ３１→過電圧制限要素（１）
→低融点金属（２）→シセント（６）→電極（４）の回
路を通る。In the above configuration, if an excessive current flows through the overvoltage limiting element fl), rti t31→overvoltage limiting element (1)
→ Low melting point metal (2) → Scent (6) → Electrode (4) circuit.
これによって、過電圧制限要素（１）の破壊時には、ア
ーク熱により低融点金属（２）が溶融して両通電部（３
１） 、（４１）間に落下し、両を極ｉ３１．ｆ４）間
が電気的に接続される。As a result, when the overvoltage limiting element (1) is destroyed, the low melting point metal (2) is melted by arc heat and both current-carrying parts (3) are melted.
1) and (41), and both are connected to the pole i31. f4) are electrically connected.
したがって、過電圧制限要素（１）に流れていた電流は
１両通電部（３ｍ）、（４ｍ）間に落下した低融点金属
（２）を経由して流れるようになるので、過電圧制限要
素ｆｌ）の破壊による周辺への悪影１を除去できる。Therefore, the current that was flowing through the overvoltage limiting element (1) will now flow through the low melting point metal (2) that has fallen between the current-carrying parts (3m) and (4m) of the two cars, so the overvoltage limiting element (fl) It is possible to remove the negative impact 1 on the surrounding area caused by the destruction of.
しかしながら、低融点金属（２）の溶融量が少ない場合
、低融点金属（２）によって形成され念短絡路は、かな
シ高い抵抗値を有する。この九め、その後連続的に流れ
る負荷電流によって短絡路が発熱することになる。However, when the amount of melting of the low melting point metal (2) is small, the short circuit formed by the low melting point metal (2) has a significantly high resistance value. After this, the short circuit generates heat due to the continuous load current.
実験結果によれば、短絡路の温度上昇は、低融点金Ｒ（
２）の融点近くまで達するケースがあることが確認され
た。電圧制限要素［１）の通常のサージ処理を考慮する
と、低融点金Ｒ（２）の融点をあまり低く設定すること
ができないので、一般に短絡路の温度上昇値は、最高１
３０’ｃ近くになる。According to the experimental results, the temperature increase in the short circuit is caused by the low melting point gold R (
It was confirmed that there are cases where the melting point reaches close to 2). Considering the normal surge handling of the voltage limiting element [1], the melting point of the low melting point gold R (2) cannot be set too low, so generally the temperature rise value of the short circuit is at most 1
It will be close to 30'c.
このような温度上昇が、電力変換装置内のサイリスタＴ
１ 、’ｒ、 ｒＴｓ’濾過電圧制限要素Ａ２．・へ３
やスナバ−回路Ｓｌ ＊ＳＬ ＋ＳＳ用部品等に悪影響
を与えることは明らかである。Such a temperature rise causes the thyristor T in the power converter to
1, 'r, rTs' filtering voltage limiting element A2.・To 3
It is clear that this has an adverse effect on the snubber circuit Sl*SL+SS parts, etc.
従来の以上のような過電圧制限装置において、抵抗値の
小さな短絡路を形成するためには、まず第１に、大量の
低融点金属（２）を瞬間的に溶融させる必要があるが、
負荷電流が小さな場合は困難でおる。In the conventional overvoltage limiting device as described above, in order to form a short circuit with a small resistance value, first of all, it is necessary to instantaneously melt a large amount of low melting point metal (2).
This is difficult when the load current is small.
即ち、過電圧制限要素ｉｌｌの負荷電流による温度上昇
の過程で、たとえ！量であっても、溶融した低融点金属
（２）によって短絡路が形成され念瞬間に、過電圧制限
Ｑ ｌ Ｉｔ）の温度上昇が停止し、それ以後低融点金
属（２）の溶融がとまるからである。That is, in the process of temperature rise due to the load current of the overvoltage limiting element ill, even if! Even if the amount is small, a short circuit is formed by the melted low melting point metal (2), and the temperature rise of the overvoltage limit Q l It) stops immediately, and the melting of the low melting point metal (2) stops thereafter. It is.
この発明の目的は上記のような問題点を解消するために
、負荷電流が小さな場合でも、抵抗値のきわめて小さな
短絡路を形成すや過電圧制限装置を提供するものである
。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, an object of the present invention is to provide an overvoltage limiting device that forms a short circuit with extremely low resistance even when the load current is small.
この発明に係る過電圧制限装置は、過電圧制限要素を挾
持する一対の！極に、融点の異なる第１゜第２の低融点
金属を埋込み、融点の高い第１の低融点金属で融点の低
い第２の低融点金属を覆うようにしたものである。The overvoltage limiting device according to the present invention includes a pair of ! First and second low melting point metals having different melting points are embedded in the pole, and the first low melting point metal having a high melting point covers the second low melting point metal having a low melting point.
この発明における過電圧制限装置は、過電圧制限要素の
破壊時に第１の低融点金属を溶融させて一対の電極間を
短絡させ、負荷電流による短絡路の温度上昇によって、
第２の低融点金属を溶融させて趨絡路の抵抗値を下げる
。The overvoltage limiting device according to the present invention melts the first low melting point metal to short-circuit between the pair of electrodes when the overvoltage limiting element breaks down, and the temperature of the short circuit path increases due to the load current.
The second low melting point metal is melted to lower the resistance of the tether.
以下この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図はこの発明に係る過電圧制限装置の一実施例を示
す側断面図であシ、第２図は第１図の部分■の拡大図で
ある。第１図及び第２図において、過電圧制限要素（１
）は例えば酸化亜鉛素子で構成されている。一対の′ｄ
Ｌ極ｉ９１ 、ｆｌＣ９は過電圧制限要素（１）を挾持
するもので、それぞれ相対するように第１．第２の低融
点金属（＋＋）、ｔｌ′４を埋込む円形に設けられ之溝
（９１，ＭｌＯａ）と、溝（９ｍ）、（１０＆）の外周
に設けられ第１、第２の低融点金属（１）１，０乃の溶
融により短絡路を形成する通電部（９ｂ）、、（１０ｂ
）と、虜（９ｍ）、（１０息）内から外周表面に貫通し
て設けられ第１．第２の低融点金ｆｉｉｌ１１．ｔ１２
）の溶融時に発生するガスを外部に排出するガス流通口
（９６）、（１０ｅ）とを備えている。第１．第２の低
融点金属（川、υ乃は例えばＵアロイ（大阪アケしいる
。第１の低融点金属（１１）としては、例えば過電圧制
限要素（１）の通常のサージ処理時の最高許容温度以上
の高い融点に設定されている。第２の低融点金属皮膜と
しては短絡路が形成された後の負荷電流通１と時の最高
許容温度の融点に設定されており、この融点は第１の低
融点金属のそれより低い。第１の低４点金属（１１）は
第２の低融点金属（Ｉ乃を覆うようにされ、両者が二層
に溝（９ｍ）、（１０ｍ）内に埋込まれている。一対の
主電極（３人Ｍ４Ａ）と例えば筒状の絶縁体（７人）と
で容器を形成し、一対の！極１９） 、ｆｌｃＩに挾持
された過電圧制限要素＋１）を収納している。ばネ（５
Ａ）ｄ［極（１（ｌと主ｔ［（４Ａ）間に装着され、ｇ
Ｌ極（９）を主電極（３人）に圧接している。シセント
（６人）は電極叫と主［極（４人）とを接続するもので
ある。FIG. 1 is a side sectional view showing one embodiment of an overvoltage limiting device according to the present invention, and FIG. 2 is an enlarged view of part (2) in FIG. 1. In FIGS. 1 and 2, the overvoltage limiting element (1
) is composed of, for example, a zinc oxide element. a pair of 'd'
The L poles i91 and flC9 are for holding the overvoltage limiting element (1), and the first and second L poles are opposed to each other. A second low melting point metal (++) is provided in a circular groove (91, MlOa) in which tl'4 is embedded, and the first and second low melting point metals are provided on the outer periphery of the grooves (9m) and (10&). Current-carrying parts (9b), (10b) that form short circuit paths by melting metal (1) 1,0 or
), the prisoner (9m), (10m) is provided penetrating the outer circumferential surface from inside. Second low melting point gold fiil11. t12
) are provided with gas flow ports (96) and (10e) for discharging the gas generated during melting to the outside. 1st. The second low melting point metal (Kawa, υno is, for example, U alloy (Osaka Akeshiiru). The first low melting point metal (11) is, for example, the maximum allowable temperature during normal surge treatment of the overvoltage limiting element (1). The melting point of the second low melting point metal film is set to the highest allowable temperature when the load current is 1 after the short circuit is formed; The first low melting point metal (11) is made to cover the second low melting point metal (I), and both are placed in two layers in the groove (9m) and (10m). A pair of main electrodes (3 M4A) and, for example, a cylindrical insulator (7 M4A) form a container, and a pair of !poles 19), overvoltage limiting element +1) held in flcI. Spring (5
A) d[pole(1(l) mounted between l and main t[(4A), g
The L pole (9) is pressed against the main electrode (3 people). The sient (6 people) connects the electrode cry and the main pole (4 people).
次に動作を説明する。過電圧制限要素（１）に所定以上
の過大な電流が流れると、過電圧制限装置ｆｉｌが破壊
し、アークが発生する。そのアークは溝（９ｍ） 。Next, the operation will be explained. When an excessive current exceeding a predetermined value flows through the overvoltage limiting element (1), the overvoltage limiting device fil is destroyed and an arc is generated. The arc is a groove (9m).
（１０ｍ）内の表面の第１の低融点金属（１１）を溶融
させて、一対の電極（９）、叫の下部の通電部（９ｂ
）、（１０ｂ ）間に短絡路を形成する。第１の低融点
金Ｒ（川の溶融量が少なく短絡路の抵抗値の高い場合は
、負荷電流によって短絡路の温度は上昇し続けるが、そ
の温度が溝（９ｍ）、（１０ｍ）内の内側の第２の低融
点金属（１１Ｊの融点に達した時、第２の低融点金属（
ｌは液状化し、第１の低融点金属（Ｉｌｌの１部が溶融
すると溶融部より第２の低融点金属０’４が流出する。The first low-melting point metal (11) on the surface within (10 m) is melted, and the pair of electrodes (9) and the current-carrying part (9b) at the bottom of the
), (10b) to form a short circuit between them. The first low melting point gold R (if the amount of melting in the river is small and the resistance value of the short circuit path is high, the temperature of the short circuit path will continue to rise due to the load current, but the temperature in the grooves (9 m) and (10 m) When the melting point of the inner second low melting point metal (11J is reached, the second low melting point metal (
When I liquefies and a part of the first low melting point metal (Ill) melts, the second low melting point metal 0'4 flows out from the melted part.
この時、一対の電極（ｌＢ）、＋＋ｔｎの上部に設けら
れたガス流通口（９ｏ）、（Ｚｏｏ）から、第２の低融
点金属（Ｉ２）の溶融時に発生するカスが、外部に排出
される。このため、第２の低融点金属０りの流出圧力は
、自重によって与えられる。従って、短絡路の最高温度
は、最悪、第２の低融点金属す乃の融点に抑制される。At this time, the scum generated when the second low melting point metal (I2) is melted is discharged to the outside from the gas flow ports (9o) and (Zoo) provided at the top of the pair of electrodes (lB) and ++tn. Ru. Therefore, the outflow pressure of the second low melting point metal is given by its own weight. Therefore, in the worst case, the maximum temperature of the short circuit is suppressed to the melting point of the second low melting point metal.
以上のように、この発明によれば、短絡路が最終的にサ
ージ処理時の最高許容温度以下の融点を有する第２の低
融点金属によって形成されるために、短絡動作時の第１
の低融点金属皮膜の溶融量がわずかであっても、短絡路
の温度上！＋値をきわめて低くすることができる効果が
ある。As described above, according to the present invention, since the short-circuit path is finally formed by the second low-melting point metal having a melting point lower than the maximum allowable temperature during surge processing, the short-circuit path is
Even if the amount of melting of the low melting point metal film is small, it will exceed the temperature of the short circuit! This has the effect of making the + value extremely low.
第１図はこの発明に係る過電圧制限装置の一実施例を示
す側断面図、第２図は第１図の部分■の拡大図、第３図
は一般的な電力変換装置を示す電気結線図、第４図は従
来の過電圧制限装置を示す側断面図である。Fig. 1 is a side sectional view showing one embodiment of the overvoltage limiting device according to the present invention, Fig. 2 is an enlarged view of part ① in Fig. 1, and Fig. 3 is an electrical wiring diagram showing a general power converter. , FIG. 4 is a side sectional view showing a conventional overvoltage limiting device.
Claims (3)
一対の電極に二層に埋込まれ前記過電圧制限要素の破壊
時に溶融して前記一対の電極間を短絡する第１、第２の
低融点金属、第１の低融点金属に覆われて設けられ第１
の低融点金属より融点の低い第２の低融点金属、を具備
することを特徴とする過電圧制限装置。(1) A pair of electrodes that sandwich the overvoltage limiting element, and first and second low voltage resistors that are embedded in two layers in the pair of electrodes and melt when the overvoltage limiting element is destroyed to short-circuit the pair of electrodes. a first metal having a melting point and being covered with a first metal having a low melting point;
An overvoltage limiting device comprising: a second low melting point metal having a melting point lower than that of the low melting point metal.
に短絡する通電部を備えている特許請求の範囲第（１）
項記載の過電圧制限装置。(2) The pair of electrodes is provided with a current-carrying part that short-circuits when the first and second low-melting point metals are melted.
Overvoltage limiting device as described in section.
に発生するガスを外部に排出するガス流通口を備えてい
る特許請求の範囲第（１）項または第（２）項記載の過
電圧制限装置。(3) The pair of electrodes is provided with a gas flow port for discharging the gas generated when the first and second low melting point metals are melted to the outside. Overvoltage limiting device as described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3907785A JPS61198701A (en) | 1985-02-28 | 1985-02-28 | Overvoltage controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3907785A JPS61198701A (en) | 1985-02-28 | 1985-02-28 | Overvoltage controller |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61198701A true JPS61198701A (en) | 1986-09-03 |
| JPH0354844B2 JPH0354844B2 (en) | 1991-08-21 |
Family
ID=12543046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3907785A Granted JPS61198701A (en) | 1985-02-28 | 1985-02-28 | Overvoltage controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61198701A (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007165912A (en) * | 2005-12-15 | 2007-06-28 | Raycap Corp | Overvoltage protection equipment equipped with wafer of varistor material |
| US8743525B2 (en) | 2012-06-19 | 2014-06-03 | Raycap Intellectual Property, Ltd | Overvoltage protection devices including wafer of varistor material |
| US9906017B2 (en) | 2014-06-03 | 2018-02-27 | Ripd Research And Ip Development Ltd. | Modular overvoltage protection units |
| US10319545B2 (en) | 2016-11-30 | 2019-06-11 | Iskra Za{hacek over (s)}{hacek over (c)}ite d.o.o. | Surge protective device modules and DIN rail device systems including same |
| US10340110B2 (en) | 2017-05-12 | 2019-07-02 | Raycap IP Development Ltd | Surge protective device modules including integral thermal disconnect mechanisms and methods including same |
| US10447026B2 (en) | 2016-12-23 | 2019-10-15 | Ripd Ip Development Ltd | Devices for active overvoltage protection |
| US10685767B2 (en) | 2017-09-14 | 2020-06-16 | Raycap IP Development Ltd | Surge protective device modules and systems including same |
| US10707678B2 (en) | 2016-12-23 | 2020-07-07 | Ripd Research And Ip Development Ltd. | Overvoltage protection device including multiple varistor wafers |
| US11223200B2 (en) | 2018-07-26 | 2022-01-11 | Ripd Ip Development Ltd | Surge protective devices, circuits, modules and systems including same |
| US11723145B2 (en) | 2021-09-20 | 2023-08-08 | Raycap IP Development Ltd | PCB-mountable surge protective device modules and SPD circuit systems and methods including same |
| US11862967B2 (en) | 2021-09-13 | 2024-01-02 | Raycap, S.A. | Surge protective device assembly modules |
-
1985
- 1985-02-28 JP JP3907785A patent/JPS61198701A/en active Granted
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101313228B1 (en) * | 2005-12-15 | 2013-09-30 | 레이캡 코포레이션 | Overvoltage protection devices including wafer of varistor material |
| JP2007165912A (en) * | 2005-12-15 | 2007-06-28 | Raycap Corp | Overvoltage protection equipment equipped with wafer of varistor material |
| US8743525B2 (en) | 2012-06-19 | 2014-06-03 | Raycap Intellectual Property, Ltd | Overvoltage protection devices including wafer of varistor material |
| US9906017B2 (en) | 2014-06-03 | 2018-02-27 | Ripd Research And Ip Development Ltd. | Modular overvoltage protection units |
| US10340688B2 (en) | 2014-06-03 | 2019-07-02 | Ripd Ip Assets Ltd | Modular overvoltage protection units |
| US10734176B2 (en) | 2016-11-30 | 2020-08-04 | Raycap, Surge Protective Devices, Ltd. | Surge protective device modules and DIN rail device systems including same |
| US10319545B2 (en) | 2016-11-30 | 2019-06-11 | Iskra Za{hacek over (s)}{hacek over (c)}ite d.o.o. | Surge protective device modules and DIN rail device systems including same |
| US11165246B2 (en) | 2016-12-23 | 2021-11-02 | Ripd Research And Ip Development Ltd. | Overvoltage protection device including multiple varistor wafers |
| US10707678B2 (en) | 2016-12-23 | 2020-07-07 | Ripd Research And Ip Development Ltd. | Overvoltage protection device including multiple varistor wafers |
| US10447026B2 (en) | 2016-12-23 | 2019-10-15 | Ripd Ip Development Ltd | Devices for active overvoltage protection |
| US11374396B2 (en) | 2016-12-23 | 2022-06-28 | Ripd Research And Ip Development Ltd. | Devices for active overvoltage protection |
| US11881704B2 (en) | 2016-12-23 | 2024-01-23 | Ripd Research And Ip Development Ltd. | Devices for active overvoltage protection including varistors and thyristors |
| US10679814B2 (en) | 2017-05-12 | 2020-06-09 | Raycap IP Development Ltd | Surge protective device modules including integral thermal disconnect mechanisms and methods including same |
| US10340110B2 (en) | 2017-05-12 | 2019-07-02 | Raycap IP Development Ltd | Surge protective device modules including integral thermal disconnect mechanisms and methods including same |
| US10685767B2 (en) | 2017-09-14 | 2020-06-16 | Raycap IP Development Ltd | Surge protective device modules and systems including same |
| US11223200B2 (en) | 2018-07-26 | 2022-01-11 | Ripd Ip Development Ltd | Surge protective devices, circuits, modules and systems including same |
| US11862967B2 (en) | 2021-09-13 | 2024-01-02 | Raycap, S.A. | Surge protective device assembly modules |
| US11723145B2 (en) | 2021-09-20 | 2023-08-08 | Raycap IP Development Ltd | PCB-mountable surge protective device modules and SPD circuit systems and methods including same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0354844B2 (en) | 1991-08-21 |
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