JPS6118615U - CMOS piezoelectric oscillator circuit - Google Patents

CMOS piezoelectric oscillator circuit

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Publication number
JPS6118615U
JPS6118615U JP10307184U JP10307184U JPS6118615U JP S6118615 U JPS6118615 U JP S6118615U JP 10307184 U JP10307184 U JP 10307184U JP 10307184 U JP10307184 U JP 10307184U JP S6118615 U JPS6118615 U JP S6118615U
Authority
JP
Japan
Prior art keywords
oscillator circuit
piezoelectric oscillator
cmos
cmos piezoelectric
capacitors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10307184U
Other languages
Japanese (ja)
Inventor
泰夫 小柳津
Original Assignee
キンセキ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by キンセキ株式会社 filed Critical キンセキ株式会社
Priority to JP10307184U priority Critical patent/JPS6118615U/en
Publication of JPS6118615U publication Critical patent/JPS6118615U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図ａは、本考案によるＣＭＯＳインバータ圧電発振
回路、同図ｂは本考案の発振器によって得られる出力波
形である。 第２図ａは従来のＣＭＯＳインバータ圧電発振回路、同
図ｂは従来の圧電発振回路により得られる出力波形を示
す。 １・・・・・・ＣＭＯＳインバータ、４，５・・・・・
・コンデンサ、６・・・・・・出力端子。FIG. 1a shows a CMOS inverter piezoelectric oscillator circuit according to the present invention, and FIG. 1b shows an output waveform obtained by the oscillator according to the present invention. FIG. 2a shows a conventional CMOS inverter piezoelectric oscillation circuit, and FIG. 2b shows an output waveform obtained by the conventional piezoelectric oscillation circuit. 1...CMOS inverter, 4,5...
・Capacitor, 6...Output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ＣＭＯＳインバータを用いた圧電発振回路において、Ｃ
Ｍα瞥ンバータの入力端子と接地間に、２個以上のコン
デンサを接続し、−該コンデンサの中間点を出力端子と
したことを特徴とするＣＭＯＳ圧電発振回路。In a piezoelectric oscillator circuit using a CMOS inverter, C
A CMOS piezoelectric oscillation circuit characterized in that two or more capacitors are connected between an input terminal of an Mα inverter and ground, and a midpoint between the capacitors is used as an output terminal.
JP10307184U 1984-07-10 1984-07-10 CMOS piezoelectric oscillator circuit Pending JPS6118615U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10307184U JPS6118615U (en) 1984-07-10 1984-07-10 CMOS piezoelectric oscillator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10307184U JPS6118615U (en) 1984-07-10 1984-07-10 CMOS piezoelectric oscillator circuit

Publications (1)

Publication Number Publication Date
JPS6118615U true JPS6118615U (en) 1986-02-03

Family

ID=30662466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10307184U Pending JPS6118615U (en) 1984-07-10 1984-07-10 CMOS piezoelectric oscillator circuit

Country Status (1)

Country Link
JP (1) JPS6118615U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54151358A (en) * 1978-05-19 1979-11-28 Seikosha Kk Crystal oscillating circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54151358A (en) * 1978-05-19 1979-11-28 Seikosha Kk Crystal oscillating circuit

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