JPS61186035A - Distortion compensation circuit - Google Patents
Distortion compensation circuitInfo
- Publication number
- JPS61186035A JPS61186035A JP60025625A JP2562585A JPS61186035A JP S61186035 A JPS61186035 A JP S61186035A JP 60025625 A JP60025625 A JP 60025625A JP 2562585 A JP2562585 A JP 2562585A JP S61186035 A JPS61186035 A JP S61186035A
- Authority
- JP
- Japan
- Prior art keywords
- distortion
- distortion compensation
- gate
- compensation circuit
- fets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/58—Compensation for non-linear transmitter output
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/501—Structural aspects
- H04B10/502—LED transmitters
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Nonlinear Science (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Optical Communication System (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はＬＥＤを使用する直接強度変調回路の歪補償回
路に係り、特に歪発生素子であるＦＥＴのドレイン−ソ
ース間のインピーダンスを一定に保つ様に制御すること
を可能とする歪補償回路に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a distortion compensation circuit for a direct intensity modulation circuit using an LED, and particularly to a distortion compensation circuit for maintaining a constant impedance between the drain and source of an FET, which is a distortion generating element. This invention relates to a distortion compensation circuit that can be controlled in various ways.
従来の歪補償回路では歪発生素子であるＦＥＴのドレイ
ン−ソース間のインピーダンスが其の温度特性により変
化するため利得変動を伴うと云う欠点があった。Conventional distortion compensation circuits have the disadvantage that the impedance between the drain and source of the FET, which is a distortion generating element, varies depending on its temperature characteristics, resulting in gain fluctuations.
第２図はＬＥＤを使用する直接強度変調回路の従来の歪
補償回路の一例を示す図である。FIG. 2 is a diagram showing an example of a conventional distortion compensation circuit of a direct intensity modulation circuit using an LED.
図中、１はパイロット信号発信器、５はドライブアンプ
、６はバッファトランジスタ、７はＬＥＤ、８はデュア
ルゲートＦＥＴ、９は可変抵抗、１０、１１．２１は夫
々抵抗、２０はコンデンサである。In the figure, 1 is a pilot signal generator, 5 is a drive amplifier, 6 is a buffer transistor, 7 is an LED, 8 is a dual gate FET, 9 is a variable resistor, 10, 11 and 21 are resistors, and 20 is a capacitor.
尚以下企図を通じ同一記号は同一対象物を表す。The same symbols represent the same objects throughout the following discussion.
従来の歪補償回路は例えば第２図に示す様に、歪発生素
子としてダイオード、ＦＥＴ等を使用して所要の歪を発
生し、フィードフォーワード式に歪を補償している。For example, as shown in FIG. 2, a conventional distortion compensation circuit uses a diode, FET, etc. as a distortion generating element to generate a required distortion, and compensates for the distortion in a feedforward manner.
入力信号はカップリングコンデンサ２０を介し、パイロ
ット信号発信器ｌの出力は抵抗２１を介してドライブア
ンプ５の十入力端子に印加される。The input signal is applied via a coupling capacitor 20, and the output of the pilot signal generator l is applied via a resistor 21 to the input terminal of the drive amplifier 5.
此の場合パイロット信号発信器ｌの出力は一定値に保持
される。In this case, the output of the pilot signal transmitter l is held at a constant value.
ドライブアンプ５の出力はバッファトランジスタ６のベ
ースに接続され、バソファトランジスタ６のコレクタ電
流を変化させ、此の結果ＬＥＤ７の発光レベルが変化す
る。The output of the drive amplifier 5 is connected to the base of the buffer transistor 6, and changes the collector current of the bathophore transistor 6, resulting in a change in the light emission level of the LED 7.
此の場合、抵抗１１はＬＥＤ７のバイアス電流を決定す
る素子で、バッファトランジスタ６のエミッタ電圧は抵
抗１０によりドライブアンプ５の一入力端子にフィード
バックされる。In this case, the resistor 11 is an element that determines the bias current of the LED 7, and the emitter voltage of the buffer transistor 6 is fed back to one input terminal of the drive amplifier 5 by the resistor 10.
デュアルゲ−１−ＦＥ７８は歪発生素子として使用され
、デュアルゲー）ＦＥＴ８の一つのゲートは可変抵抗９
に接続されて発生する歪量を制御する。The dual-gain 1-FE78 is used as a strain generating element, and one gate of the dual-gain FET8 is connected to a variable resistor 9.
is connected to control the amount of distortion generated.
他の一つのゲートにはＦＥＴのドレイン−ソース間イン
ピーダンスを決める為の固定電圧が印加される。A fixed voltage is applied to the other gate to determine the impedance between the drain and source of the FET.
然しなから、デュアルゲートＦＥＴ８のインピーダンス
が温度変化により変動する為歪補償回路としての利得を
一定に保つことが出来ないと云う欠点があった。However, since the impedance of the dual gate FET 8 fluctuates due to temperature changes, there is a drawback that the gain as a distortion compensation circuit cannot be kept constant.
本発明の目的は上記従来方式の欠点を除去し、温度変化
により其の利得が変動しない歪補償回路を提供すること
である。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the conventional system described above and to provide a distortion compensation circuit whose gain does not vary due to temperature changes.
問題点を解決するための手段は、ＬＥＤを使用する直接
強度変調回路の歪補償回路に於いて、デュアルゲー）Ｆ
ＥＴの一つのゲートを歪発生量の調整用に使用し、他の
一つのゲートを前記デュアルゲートＦＥＴのドレイン−
ソース間インピーダンスを一定に保つための制御に使用
することにより達成される。A means to solve the problem is to create a distortion compensation circuit for a direct intensity modulation circuit using LEDs.
One gate of the ET is used for adjusting the amount of strain generation, and the other gate is used as the drain of the dual gate FET.
This is achieved by using it for control to keep the inter-source impedance constant.
本発明に依ると歪補償素子としてデュアルゲートＦＥＴ
を使用し、其のゲートの一つを歪発生量の調整に用い、
他のゲートをドレイン−ソース間のインピーダンスを一
定に保つことに用いるので温度変化により其の利得が変
動しない歪補償回路が実現出来ると云う効果が生まれる
。According to the present invention, a dual gate FET is used as a distortion compensation element.
, and one of its gates is used to adjust the amount of distortion generated.
Since the other gate is used to keep the impedance between the drain and the source constant, it is possible to realize a distortion compensation circuit whose gain does not change due to temperature changes.
第１図は本発明に依る歪補償回路の一実施例を示す図で
ある。FIG. 1 is a diagram showing an embodiment of a distortion compensation circuit according to the present invention.
図中、２はハイブリッド、３．１６は夫々コンデンザ、
４．１５は夫々抵抗、１２は帯域濾波器、１３は増幅器
、１４は検波器、１７は比較器である。In the figure, 2 is a hybrid, 3.16 is a condenser,
4.15 are resistors, 12 is a bandpass filter, 13 is an amplifier, 14 is a detector, and 17 is a comparator.
以下図に従って本発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.
第１図に示す図はＬＥＤの直接強度変調回路であり、Ｆ
ＥＴ８は歪補償用に使われ、ＦＥＴ８から出る歪を使用
して歪成分をフィードフォーワード型の補償する回路で
ある。The diagram shown in FIG. 1 is a direct intensity modulation circuit for LED, and F
ET8 is used for distortion compensation, and is a circuit that uses the distortion output from FET8 to compensate for distortion components in a feedforward type.
入力端子ＩＮから入力した信号はハイブリッド２に於い
てパイロット信号発信器１の出力信号と一緒になる。The signal input from the input terminal IN is combined with the output signal of the pilot signal transmitter 1 in the hybrid 2.
此処でパイロット信号発信器ｌは帯域外の発振周波数を
有するパイロット信号の発信器であり、其の出力振幅は
十分安定化されている。Here, the pilot signal transmitter l is a pilot signal transmitter having an oscillation frequency outside the band, and its output amplitude is sufficiently stabilized.
又パイロット信号発信器１は音声信号等でＦＭ変調され
た搬送波発振器でも良い。Further, the pilot signal transmitter 1 may be a carrier wave oscillator that is FM modulated with an audio signal or the like.
ハイブリッド２の出力はカップリングコンデンサ３を介
してドライブアンプ５の十入力端子に接続される。The output of the hybrid 2 is connected to an input terminal of a drive amplifier 5 via a coupling capacitor 3.
ドライブアンプ５の出力はバッファトランジスタ６に入
力され、バッファトランジスタ６のコレクタ回路にはＬ
ＥＤ７が挿入される。The output of the drive amplifier 5 is input to the buffer transistor 6, and the collector circuit of the buffer transistor 6 has an L level.
ED7 is inserted.
ＬＥＤ７は入力電気信号を光信号に変換出力する素子で
ある。The LED 7 is an element that converts an input electrical signal into an optical signal and outputs it.
ＦＥＴ８はデュアルゲート型のＦＥＴであり、其のゲー
トの一つを可変抵抗９により制御することによりＬＥＤ
７の歪補償を行う。The FET 8 is a dual gate type FET, and by controlling one of its gates with a variable resistor 9, the LED
7 distortion compensation is performed.
抵抗１０は帰還抵抗であり、抵抗１１はＬＥＤ７の駆動
電流を決定する為の抵抗である。尚Ｖ＋は正電源、■−
は負電源である。The resistor 10 is a feedback resistor, and the resistor 11 is a resistor for determining the drive current of the LED 7. In addition, V+ is the positive power supply, ■-
is a negative power supply.
帯域濾波器１２はバッファトランジスタ６のエミッタ側
からパイロット信号又は搬送波を抽出する為の帯域濾波
器であり、帯域濾波器１２出力のパイロット信号又は搬
送波を増幅器１３により増幅後、検波器１４により直流
成分に変換する。The bandpass filter 12 is a bandpass filter for extracting a pilot signal or a carrier wave from the emitter side of the buffer transistor 6. After the pilot signal or carrier wave output from the bandpass filter 12 is amplified by an amplifier 13, a DC component is extracted by a detector 14. Convert to
此の検波器１４出力の直流電圧は比較器１７の一入力端
子に、基準電圧■、、□が比較器１７の十入力端子に夫
々印加され、再入力の差が最少値となる様にＦＥＴ８の
他の一つのゲートにフィードバックする。従ってＦＥＴ
８のドレイン−ソース間のインピーダンスを一定に保つ
ことことが出来、此の為歪補償回路の利得が一定化し、
同時に温度特性の変化の影響がない様になる。The DC voltage output from the detector 14 is applied to one input terminal of the comparator 17, and the reference voltages ■, □ are applied to the ten input terminals of the comparator 17, respectively. feed back to one other gate. Therefore FET
The impedance between the drain and source of 8 can be kept constant, and therefore the gain of the distortion compensation circuit can be kept constant.
At the same time, there is no effect of changes in temperature characteristics.
尚抵抗１５、コンデンサ１６は時定数を決める抵抗、コ
ンデンサである。Note that the resistor 15 and capacitor 16 are resistors and capacitors that determine the time constant.
以上詳細に説明した様に本発明によれば、歪補償回路の
利得が温度変化に拘わらず常に一定に保持されるのでＬ
ＥＤを走度調度駆動することが可能となると云う大きい
効果がある。As explained in detail above, according to the present invention, the gain of the distortion compensation circuit is always kept constant regardless of temperature changes, so L
This has the great effect of making it possible to drive the ED in a controlled manner.
第１図は本発明に依る歪補償回路の一実施例を示す図で
ある。
第２図はＬＥＤを使用する直接強度変調回路の従来の歪
補償回路の一例を示す図である。
図中、１はパイロット信号発信器、２はハイブリッド、
３．１６は夫々コンデンサ、５はドライブアンプ、６は
バッファトランジスタ、７はＬＥＤ。
８はデュアルゲートＦＥＴ、９は可変抵抗、４．１０．
１１．１５．２１は夫々抵抗、２０はコンデンサ、１２
は帯域濾波器、１３は増幅器、１４は検波器、１７は比
較器である。FIG. 1 is a diagram showing an embodiment of a distortion compensation circuit according to the present invention. FIG. 2 is a diagram showing an example of a conventional distortion compensation circuit of a direct intensity modulation circuit using an LED. In the figure, 1 is a pilot signal transmitter, 2 is a hybrid,
3. 16 are capacitors, 5 is a drive amplifier, 6 is a buffer transistor, and 7 is an LED. 8 is a dual gate FET, 9 is a variable resistor, 4.10.
11.15.21 are resistors, 20 are capacitors, 12
is a bandpass filter, 13 is an amplifier, 14 is a detector, and 17 is a comparator.
Claims (1)
て、デュアルゲートＦＥＴの一つのゲートを歪発生量の
調整用に使用し、他の一つのゲートを前記デュアルゲー
トＦＥＴのドレイン〜ソース間インピーダンスを一定に
保つための制御に使用することを特徴とする歪補償回路
。In a distortion compensation circuit for a direct intensity modulation circuit using an LED, one gate of a dual gate FET is used to adjust the amount of distortion generated, and the other gate is used to adjust the impedance between the drain and source of the dual gate FET. A distortion compensation circuit characterized in that it is used for control to maintain a constant value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60025625A JPS61186035A (en) | 1985-02-13 | 1985-02-13 | Distortion compensation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60025625A JPS61186035A (en) | 1985-02-13 | 1985-02-13 | Distortion compensation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61186035A true JPS61186035A (en) | 1986-08-19 |
Family
ID=12171054
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60025625A Pending JPS61186035A (en) | 1985-02-13 | 1985-02-13 | Distortion compensation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61186035A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2699770A1 (en) * | 1992-12-21 | 1994-06-24 | Cit Alcatel | Non-linear corrector for signals transmitted on fibre optic cable |
| WO1997024798A1 (en) * | 1995-12-29 | 1997-07-10 | Qualcomm Incorporated | Out-of-band compensation for non-linear device |
-
1985
- 1985-02-13 JP JP60025625A patent/JPS61186035A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2699770A1 (en) * | 1992-12-21 | 1994-06-24 | Cit Alcatel | Non-linear corrector for signals transmitted on fibre optic cable |
| WO1997024798A1 (en) * | 1995-12-29 | 1997-07-10 | Qualcomm Incorporated | Out-of-band compensation for non-linear device |
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