JPS61182282A - Magnetic flux trap preventive type josephson device - Google Patents

Magnetic flux trap preventive type josephson device

Info

Publication number
JPS61182282A
JPS61182282A JP60021923A JP2192385A JPS61182282A JP S61182282 A JPS61182282 A JP S61182282A JP 60021923 A JP60021923 A JP 60021923A JP 2192385 A JP2192385 A JP 2192385A JP S61182282 A JPS61182282 A JP S61182282A
Authority
JP
Japan
Prior art keywords
superconductor
circuit
josephson
magnetic flux
superconductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60021923A
Other languages
Japanese (ja)
Other versions
JPH055193B2 (en
Inventor
Yoshifusa Wada
和田 容房
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP60021923A priority Critical patent/JPS61182282A/en
Publication of JPS61182282A publication Critical patent/JPS61182282A/en
Publication of JPH055193B2 publication Critical patent/JPH055193B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices

Abstract

PURPOSE:To obtain a wide operation margin by forming first and second superconductors onto a grounding surface consisting of a superconductor through an insulator, shaping a Josephson junction between these superconductors and forming an element piece composed of a third superconductor having a superconducting critical temperature higher than both the first and second superconductors into a Josephson device. CONSTITUTION:A first superconductor 201 is formed onto a grounding surface 301 consisting of a superconductor through an insulator, a second superconductor line 202 is shaped similarly onto the superconductor 201 through an insulator, one parts of the lower surfaces of the superconductor 202 are projected while while penetrating the insulator, Jpsephson couplings 203 and 204 are generated among the lower surfaces and the first superconductor 201, and a control line 205 is applied onto the second superconductor 202 through an insulator. In the constitution, an element piece 302 composed of a third superconductor facing the couplings 203 and 204 is applied previously onto the grounding surface 301, and the third superconductor element piece 302 consisting of the superconductor having the highest superconducting critical temperature is dislocated to a superconducting state first on the cooling of the device, thus removing magnetic flux traps to a functional section.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はジョセフソン接合とインダクタンス。[Detailed description of the invention] (Industrial application field) The present invention is a Josephson junction and an inductance.

もしくはジョセフソン素子と抵抗とから構成されるジョ
セフソン論理回路装置やジョセフソン記憶回路装置に関
するものである。
Alternatively, the present invention relates to a Josephson logic circuit device or a Josephson memory circuit device composed of a Josephson element and a resistor.

(従来技術とその問題点) ジョセフソン接合は外から加わる磁束に対する感度が高
く、磁束量子(2,07x10−’ガウス)程度の磁束
の影響を受けて臨界電流値が大きく変化する。通常、ジ
ョセフソン接合と抵抗もしくはインダクタンスとから構
成されるジョセフソン回路は。
(Prior art and its problems) Josephson junctions are highly sensitive to magnetic flux applied from the outside, and the critical current value changes greatly under the influence of magnetic flux of about a magnetic flux quantum (2,07 x 10 -' Gauss). A Josephson circuit usually consists of a Josephson junction and a resistance or inductance.

臨界電流値の制御によシジョセフソン接合を電圧状態に
スイッチさせて論理を行なう。よって、臨界電流値が外
部磁界によって変化するとジョセフソン回路が誤動作す
る。回路の正常動作を得るたメニ、インフォメイション
・ディスプレイ(In−formation disp
lay )の昭和58年4月号に記載されているような
3重、4重の磁気シールド内にジョセフソン回路を挿入
して動作させる必要がある。しかしながら、4重の磁気
シールドを設けても、漏れ磁束を完全に除くことができ
ない。このため、ジョセフソン回路を液体ヘリウム温度
に冷却する時1回路下に配置されている通常ニオブ膜で
形成された接地面に磁束量子が磁束(トラップと称する
)される0ジ讐セフソン接合やスクイラド(SQUID
)の近辺゛に磁束量子がトラップされると、トラップさ
れた磁束が作る磁界に影響され、接合の臨界電流値やス
クイラドの閾値特性が変化する。バーモン(Bermo
n )等は、回路の機能パターンが力い領域に強制的に
磁束量子をトラップさせ1回路の機能パターン中への磁
束トラップを減するモー) (moat)構造を提案し
た(アイ・イー・イー・トランザクシ璽ンズ・オン・マ
グネティクス(IEEB  transactions
 on magnetics)第MAG=19巻、第3
号、第1160頁)。モート構造は、機能回路部分の周
りの接地面に穴をあけた構造である。モートによシスク
イツト回路は、1ミリガウスの磁界中においても正常に
動作した。
Logic is performed by switching the Josephson junction into a voltage state by controlling the critical current value. Therefore, if the critical current value changes due to an external magnetic field, the Josephson circuit will malfunction. Menu and information display (In-formation display) to ensure normal operation of the circuit.
In order to operate the Josephson circuit, it is necessary to insert it into a triple or quadruple magnetic shield as described in the April 1988 issue of J. Lay. However, even if a four-fold magnetic shield is provided, leakage magnetic flux cannot be completely eliminated. For this reason, when a Josephson circuit is cooled to liquid helium temperature, magnetic flux quanta are trapped (called a trap) on the ground plane, which is usually formed of a niobium film, placed below the circuit. (SQUID
) When magnetic flux quanta are trapped in the vicinity of ), the critical current value of the junction and the threshold characteristics of the squirad change due to the influence of the magnetic field created by the trapped magnetic flux. Bermo
proposed a moat structure that forcibly traps magnetic flux quanta in regions where the circuit's functional pattern is strong and reduces magnetic flux trapping in the functional pattern of one circuit.・Transactions on Magnetics (IEEE transactions)
on magnetics) Volume 19, Volume 3
No. 1160). The mote structure has holes in the ground plane around the functional circuitry. The mote system operated normally even in a 1 milliGauss magnetic field.

しかしながら、モートは接地面に穴を設けるため、接地
面の連続性が失なわれる。一方、ジョセフソン回路を数
ピコ秒で動作させるためには、完全な接地面により、接
地面上に回路電流のイメージ電流を発生させ、電磁界を
回路と接地面間に閉じ込める必要がある。従って、接地
面に不連続部があると、不連続部で電磁界の乱れが生じ
、伝送信号の反射、隣接線へのクロストークが増大する
However, since motes provide holes in the ground plane, the continuity of the ground plane is lost. On the other hand, in order to operate a Josephson circuit in a few picoseconds, it is necessary to generate an image current of the circuit current on the ground plane using a perfect ground plane, and to confine the electromagnetic field between the circuit and the ground plane. Therefore, if there is a discontinuity in the ground plane, electromagnetic field disturbance occurs at the discontinuity, which increases reflection of transmission signals and crosstalk to adjacent lines.

伝送信号の反射、クロストークは1回路中の他の機能素
子に雑音として作用し1回路の動作マージンを低下させ
る。即ち、モート構造においては、モート部で雑音が生
じ、動作マージンを低下させ、回路を誤動作させていた
Reflection of the transmitted signal and crosstalk act as noise on other functional elements in one circuit, reducing the operating margin of one circuit. That is, in the moat structure, noise is generated in the moat section, lowering the operating margin and causing the circuit to malfunction.

(発明の目的) 本発明の目的は1上記したジョセフソン回路装置の欠点
を除き、漏れ磁束の大きい磁場環境においても広い動作
マージンを持つ回路装置を提供することにある。
(Objective of the Invention) An object of the present invention is to provide a circuit device which eliminates the above-described drawbacks of the Josephson circuit device and has a wide operating margin even in a magnetic field environment with large leakage flux.

(発明の構成) 本発明は、少くとも超伝導体から成る接地面と。(Structure of the invention) The present invention provides a ground plane made of at least a superconductor.

前記接地面上に絶縁体を介して形成された互いに絶縁さ
れた第1の超伝導体と第2の超伝導体と。
A first superconductor and a second superconductor that are insulated from each other and are formed on the ground plane with an insulator interposed therebetween.

前記第1及び第2の超伝導体の一部に形成されたジョセ
フソン接合とを含むジョセフソン回路において、前記接
地面と第1及び第2の超伝導体のいずれよりも高い超伝
導体臨界温度を持つ第3の超伝導体を前記ジョセフソン
装置中に多数個備えたことを特徴とする磁束トラップ防
止型ジョセフソン装置である。
a Josephson circuit including a Josephson junction formed in a portion of the first and second superconductors, the ground plane and a superconductor criticality higher than either of the first and second superconductors; This is a magnetic flux trap prevention type Josephson device characterized in that a large number of third superconductors having temperature are provided in the Josephson device.

(構成の詳細な説明) 第1図は、本発明の詳細な説明するための磁束トラップ
防止型ジョセフソン装置の概略図である。
(Detailed Description of Configuration) FIG. 1 is a schematic diagram of a magnetic flux trap prevention type Josephson device for explaining the present invention in detail.

同図(aJは1本発明の装置をチップ上から見た回路パ
ターンのブロック図、同図(b)〜(f)は、同図(a
)のAB面の断面の概略を示した図である。
The same figure (aJ is a block diagram of the circuit pattern of the device of the present invention viewed from the top of the chip, and the same figure (b) to (f) are the same figure (a)
) is a diagram schematically showing a cross section of the AB plane.

本発明の装置は、接地面101上に、少くとも第1の超
伝導体と第2の超伝導体とジョセフソン接合から構成さ
れるジョセフソン回路の機能部102と、第3の超伝導
体103が以下のように配置される。ここで、ジョセフ
ソン回路の機能部102には。
The device of the present invention includes, on a ground plane 101, a functional part 102 of a Josephson circuit composed of at least a first superconductor, a second superconductor, and a Josephson junction, and a third superconductor. 103 are arranged as follows. Here, in the functional section 102 of the Josephson circuit.

信号入力線121と信号出力線122とが必要によ〕多
数本接続される0 第3の超伝導体103は、第1図(a)に示す平面的な
配置として、ジョセフソン回路の機′能部102を包む
ように、機能部102よシ大きい領域に配置される。ジ
ョセフソン回路の機能部102に対する第3の超伝導体
の立体的配置は、第1図(b)〜(e)に取られる。第
3の超伝導体104〜110は1図(b)のように接地
面101と機能部1020間1図(C)のように機能部
102の上部1図(d)に示すように機能部102の上
部と下部1図(e)に示すように、ジョセフソン回路が
塔載されている基板111の裏側即ち1機能部102が
配置されてい々い側、図げ)に示すように基板111の
裏側と機能部102の上部にそれぞれ設けられる。図(
e)(f)の実施例において、第3の超伝導体108〜
110の平面寸法は、基板111(通常シリコン基板が
使用される)の厚さより十分大きくとられる。
A large number of signal input lines 121 and signal output lines 122 are connected as necessary. The third superconductor 103 is arranged in a plane as shown in FIG. It is arranged in an area larger than the functional section 102 so as to surround the functional section 102 . The three-dimensional arrangement of the third superconductor with respect to the functional part 102 of the Josephson circuit is shown in FIGS. 1(b) to 1(e). The third superconductors 104 to 110 are arranged between the ground plane 101 and the functional section 1020 as shown in FIG. 1(b) and above the functional section 102 as shown in FIG. 1(C). The upper and lower parts of the board 102 are shown in FIG. and on the upper side of the functional section 102, respectively. figure(
e) In the embodiment of (f), the third superconductor 108~
The planar dimensions of 110 are set to be sufficiently larger than the thickness of substrate 111 (usually a silicon substrate).

以上第3の超伝導体104〜110は、第3の超伝導体
104〜110の外側にトラップされた磁束からのもれ
磁界がジョセフソン回路の動作に影響を与えないように
配置される。ここで、信号入力線121と信号出力線1
22は、接地面101と第3の超伝導体103〜110
から絶縁されている。
The third superconductors 104-110 are arranged so that the leakage magnetic field from the magnetic flux trapped outside the third superconductors 104-110 does not affect the operation of the Josephson circuit. Here, signal input line 121 and signal output line 1
22, the ground plane 101 and the third superconductors 103 to 110;
insulated from

第3の超伝導体104〜110は、第1の超伝導体、第
2の超伝導体、接地面101の超伝導体よシ高い超伝導
臨界温度TCを持つ。ジョセフソン装置の温度を室温か
ら装置が動作する、たとえば4.2にの動作温度に徐々
に下げてゆく場合、第3の超伝導体104〜11.0が
最初に超伝導状態へ転移する。
The third superconductors 104 to 110 have a higher superconducting critical temperature TC than the first superconductor, the second superconductor, and the superconductor of the ground plane 101. When the temperature of the Josephson device is gradually lowered from room temperature to the operating temperature at which the device operates, e.g.

ここで反磁性によるエネルギー増加をEI&1磁束量子
がトラップされた時のエネルギー増加をE。
Here, the energy increase due to diamagnetism is EI & 1 The energy increase when a magnetic flux quantum is trapped is E.

とする。第3の超伝導体104〜110が超伝導状態へ
転移する時、第3の超伝導体を貫いていた磁束量が磁束
量子(2,01x 1o−11iウエバ)の1以下であ
るとする。E、>2E1 即ちE、−El)E、となシ
shall be. It is assumed that when the third superconductors 104 to 110 transition to a superconducting state, the amount of magnetic flux penetrating the third superconductor is less than or equal to 1 magnetic flux quantum (2,01 x 1o-11i Weber). E, >2E1 ie E, -El) E, tonashi.

る残留磁界の大きさく磁束のトラップを生じさせない大
きさ)は4ミリガウスである。一方、従来のニオブ接地
面のみが配置された5ミリ角のチップの場合、許容でき
る残留磁界の大きさは0.0004ミリガウス/ cd
となる。即ち、本発明によシ、残留磁界の許容値が4桁
改善される。4ミリガウス/d程度の残留磁界は、3重
磁気シールドにょシ容易に実現できる。
The size of the residual magnetic field (the size that does not cause magnetic flux trapping) is 4 milligauss. On the other hand, in the case of a conventional 5 mm square chip with only a niobium ground plane, the allowable residual magnetic field is 0.0004 mm Gauss/cd.
becomes. That is, according to the present invention, the permissible value of the residual magnetic field is improved by four orders of magnitude. A residual magnetic field of about 4 milliGauss/d can be easily achieved using triple magnetic shielding.

(第1の実施例) 本発明の第1の実施例の回路パターン図を第2図に示す
(First Embodiment) FIG. 2 shows a circuit pattern diagram of the first embodiment of the present invention.

実施例の装置は、第1の超伝導体201と、第2の超伝
導体202と、第1の超伝導体201と第2の超伝導体
202の間に形成されたジョセフソン接合203、20
4と1制御線205から構成される2接合スクイッドの
回路パターンである。2接合スクイッド回路の機能部は
、ジョセフソン接合203.204を含む破線で示した
領域206である。第3の超伝導体210は、2接合ス
クィッドの機能部の領域206の下面をおおうように配
置される。
The device of the embodiment includes a first superconductor 201, a second superconductor 202, a Josephson junction 203 formed between the first superconductor 201 and the second superconductor 202, 20
This is a circuit pattern of a 2-junction SQUID consisting of 4 and 1 control lines 205. The functional portion of the two-junction SQUID circuit is the region 206 shown in dashed lines that includes the Josephson junctions 203 and 204. The third superconductor 210 is arranged to cover the lower surface of the functional region 206 of the two-junction SQUID.

204と制御線205から成る2接合スクィッドは、−
面上に接して設けられている。第3の超伝導体の゛+1
.素片302の大きさは、2接合スクイッドよシ太きi
<設定されている。これにより、第3の超伝導体5・の
素片302の外側にトラップされた磁束からの漏れ磁界
による影響を小さくしている。即ち、装置を冷却してわ
く時、超伝導臨界温度Tcが最も高い第3の超伝導体2
10が最初に超伝導状態に転移する。この時、残留磁界
は、第3の超伝導体の外側に排除される。第3の超伝導
体の素片302を多数個チップ上のジョセフソン装置に
配置すると。
The two-junction squid consisting of 204 and control line 205 is -
It is placed in contact with the surface.゛+1 of the third superconductor
.. The size of the elemental piece 302 is thicker than that of the two-junction Squid.
<Set. This reduces the influence of the leakage magnetic field from the magnetic flux trapped outside the elemental piece 302 of the third superconductor 5. That is, when the device is cooled down, the third superconductor 2 has the highest superconducting critical temperature Tc.
10 first transitions to the superconducting state. At this time, the residual magnetic field is expelled to the outside of the third superconductor. When a large number of pieces 302 of the third superconductor are placed in a Josephson device on a chip.

チップを貫通している残留磁界は、第3の超伝導体素片
間にトラップされる。よって、ジ習セフソン回路の機能
部を直接貫ぬく磁束のトラップが除かれる。第3の超伝
導体の外側にトラップされた磁束量子からの漏れ磁界は
、第3の超伝導体の素片302を回路の機能部の領域よ
り太きくシ、かつ。
The residual magnetic field penetrating the chip is trapped between the third superconductor pieces. Therefore, the trap of magnetic flux that directly penetrates the functional part of the Ji-Sefson circuit is eliminated. The leakage magnetic field from the magnetic flux quanta trapped outside the third superconductor causes the elemental piece 302 of the third superconductor to be thicker than the functional area of the circuit.

第3の超伝導体の素片302と回路の機能部との立体配
置を近づけることによって小さくすることができる。
The size can be reduced by bringing the three-dimensional arrangement of the third superconductor element 302 and the functional part of the circuit closer to each other.

−以上、本実施例によシ、ジ田セフソン回路の機(第2
の実施例) m−)」 )・j、第4図に本発明の第2の実施例を示す。本実施
第3の超伝導体の素片401は12接合スクィッド回路
上に配置されている。第3の超伝導体の素片401は、
制御線205を流れる電流が作る磁界が。
- As described above, according to this embodiment, the Jita Sefson circuit machine (second
A second embodiment of the present invention is shown in FIG. 4. The third superconductor piece 401 of this embodiment is placed on a 12-junction SQUID circuit. The third superconductor piece 401 is
The magnetic field created by the current flowing through the control line 205.

2接合スクィッドと高い割合で結合するように。Now combines at a high rate with 2-joined Squids.

制御線205から十分陥れた位置に配置される。たとえ
ば、制御線205と第3の超伝導体の素片の間隔は、制
御線205と第1の超伝導体201の間隔の2倍以上が
設定される。本実施例においても、磁束トラップに関し
て第1の実施例と同一の効果が得られる。
It is placed at a position sufficiently recessed from the control line 205. For example, the distance between the control line 205 and the third superconductor piece is set to be twice or more the distance between the control line 205 and the first superconductor 201. In this embodiment as well, the same effects as in the first embodiment can be obtained regarding the magnetic flux trap.

(第3の実施例) 第5図に本発明の第3の実施例の回路パターン図を示す
。本実施例は、第1図(d)を抵抗結合型パルス発生回
路に対して具体化した例である0第6図は、第5図の回
路パターンをAB面で切断した時の断面図である。本実
施例の回路は、第1の超伝導体501.502と、第2
の超伝導体503,504でいる。第3の超伝導体の素
片510 、511は抵抗結合型回路の機能部であるジ
ョセフソン結合505゜506を包む領域に、かつ回路
の上、下に配置されている。本実施例によシ、抵抗結合
型回路の機能部であるジョセフソン結合505. 50
6を貫ぬく磁束トラップが除去され、第1の実施例と同
一の効果が得られる。
(Third Embodiment) FIG. 5 shows a circuit pattern diagram of a third embodiment of the present invention. This embodiment is an example in which FIG. 1(d) is applied to a resistance-coupled pulse generation circuit. FIG. 6 is a cross-sectional view of the circuit pattern shown in FIG. 5 taken along the AB plane. be. The circuit of this example has a first superconductor 501,502 and a second superconductor 501,502.
They are superconductors 503 and 504. The third superconductor pieces 510 and 511 are arranged in a region surrounding the Josephson couplings 505 and 506, which are functional parts of the resistance-coupled circuit, and above and below the circuit. According to this embodiment, a Josephson coupling 505. which is a functional part of a resistive coupling type circuit. 50
The magnetic flux trap passing through 6 is removed and the same effect as in the first embodiment is obtained.

(発明の効果) 以上1本発明は、ジョセフソン回路中に用いられている
超伝導体より高い超伝導臨界温度を持つ第3の超伝導体
で回路の機能部を包んだことを特徴とする装置である。
(Effects of the Invention) The present invention is characterized in that the functional part of the circuit is wrapped in a third superconductor having a higher superconducting critical temperature than the superconductor used in the Josephson circuit. It is a device.

本発明によシ、ジョセフソン回路の機能部への磁束のト
ラップが除去され、回路の誤動作を防ぐ効果が得られる
。さらに、本発明によシ、許容できる残留磁界の大きさ
が大きくなるので、ジョセフソン装置の磁気シールドが
簡単になる。第3の超伝導体を必要部分のみに限定し、
かつ漏れ磁界も考慮し、できるだけ細分した素片を多数
個チップ上に配置する程1本発明の効果は、大きくなる
According to the present invention, trapping of magnetic flux to the functional portion of the Josephson circuit is eliminated, and an effect of preventing malfunction of the circuit can be obtained. Furthermore, the present invention simplifies magnetic shielding of the Josephson device because the magnitude of the allowable residual magnetic field is increased. Limiting the third superconductor to only the necessary parts,
In addition, taking leakage magnetic fields into consideration, the effect of the present invention becomes greater as a larger number of fragments are arranged on a chip.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の詳細な説明するための本発明の装置
の概略図で図(a)に平面図を図(b)〜(e)に断面
図を示す。第2図は本発明の第1の実施例の回路パター
ン図、第3図は第2図の回路パターンをAB面で切断し
た断面図、第4図は本発明の第2の実施例を示した断面
図、第5図は本発明の第3の実施例の回路パターン図、
第6図は第5図の回路パターンをAB面で切断した断面
図である。 101−接地面、102・ジョセフソン回路の機能部。 103〜107 :第3の超伝導体、201・・・第1
の超伝導体1202・・・第2の超伝導体、 203.
204・・・ジョセフソン接合、205・・制御線、 
206・・・ジョセフソン回路の機能部の領域、210
・・・第3の超伝導体、301・・・接地面、302.
401  第3の超伝導体の素片、  501.502
・・第1の超伝導体、 503.504・・・第2の超
伝導体、  505.506・・・ジョセフソン接合。 5(17,508・・・抵抗、 510.511・・・
第3の超伝導体の素片、601・・・接地面。 王群目1唇::7院長 S 第1図 第1図 101=接地面 102:ジョセフソン回路の機能部 103〜110:第3の超伝導体 111:基板 121:信号入力線 1つつ・ノ舌旦中千福自 201:第1の超伝導体    205:制御線202
:第2の超伝導体    206:機能部の領域203
 、204 : ジョセフソン接合210:第3の超伝
導体第3図
FIG. 1 is a schematic diagram of an apparatus of the present invention for explaining the present invention in detail, and FIG. 1(a) shows a plan view, and FIG. 1(b) to (e) show cross-sectional views. FIG. 2 is a circuit pattern diagram of the first embodiment of the present invention, FIG. 3 is a sectional view of the circuit pattern of FIG. 2 taken along the AB plane, and FIG. 4 is a diagram of the second embodiment of the present invention. 5 is a circuit pattern diagram of the third embodiment of the present invention,
FIG. 6 is a cross-sectional view of the circuit pattern of FIG. 5 taken along the AB plane. 101 - Ground plane, 102 - Functional part of the Josephson circuit. 103-107: third superconductor, 201...first
superconductor 1202... second superconductor, 203.
204... Josephson junction, 205... control line,
206... Area of functional part of Josephson circuit, 210
. . . third superconductor, 301 . . . ground plane, 302.
401 Third superconductor piece, 501.502
...First superconductor, 503.504...Second superconductor, 505.506...Josephson junction. 5 (17,508...resistance, 510.511...
The third superconductor piece, 601...ground plane. King Group Eye 1 Lip: :7 Director S Figure 1 Figure 1 Figure 1 101 = Ground plane 102: Josephson circuit functional parts 103 to 110: Third superconductor 111: Substrate 121: Signal input line 1 Tsutsu/Notondan Nakasenpukuji 201: First superconductor 205: Control line 202
: Second superconductor 206 : Functional region 203
, 204: Josephson junction 210: Third superconductor Fig. 3

Claims (1)

【特許請求の範囲】[Claims]  少くとも、超伝導体から成る接地面と、前記接地面上
に絶縁体を介して形成された、互いに絶縁された第1の
超伝導体と第2の超伝導体と、前記第1及び第2の超伝
導体の一部に形成されたジョセフソン接合とを含むジョ
セフソン装置において、前記接地面と第1及び第2の超
伝導体のいずれよりも高い超伝導臨界温度を持つ第3の
超伝導体を前記ジョセフソン装置中に多数個備えたこと
を特徴とする磁束トラップ防止型ジョセフソン装置。
At least a ground plane made of a superconductor, a first superconductor and a second superconductor formed on the ground plane via an insulator and insulated from each other, and the first and second superconductors. a third superconductor having a higher superconducting critical temperature than both the ground plane and the first and second superconductors; A magnetic flux trap prevention type Josephson device, characterized in that a large number of superconductors are provided in the Josephson device.
JP60021923A 1985-02-08 1985-02-08 Magnetic flux trap preventive type josephson device Granted JPS61182282A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60021923A JPS61182282A (en) 1985-02-08 1985-02-08 Magnetic flux trap preventive type josephson device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60021923A JPS61182282A (en) 1985-02-08 1985-02-08 Magnetic flux trap preventive type josephson device

Publications (2)

Publication Number Publication Date
JPS61182282A true JPS61182282A (en) 1986-08-14
JPH055193B2 JPH055193B2 (en) 1993-01-21

Family

ID=12068588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60021923A Granted JPS61182282A (en) 1985-02-08 1985-02-08 Magnetic flux trap preventive type josephson device

Country Status (1)

Country Link
JP (1) JPS61182282A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04214684A (en) * 1990-09-30 1992-08-05 Daikin Ind Ltd Squid

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129657U (en) * 1982-02-24 1983-09-02 富士通株式会社 Mounting structure of Josephson junction element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129657U (en) * 1982-02-24 1983-09-02 富士通株式会社 Mounting structure of Josephson junction element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04214684A (en) * 1990-09-30 1992-08-05 Daikin Ind Ltd Squid

Also Published As

Publication number Publication date
JPH055193B2 (en) 1993-01-21

Similar Documents

Publication Publication Date Title
CA2017299C (en) Integrated-type squid magnetometer and system for biomagnetic measurements using the same
Jeffery et al. Magnetic imaging of moat‐guarded superconducting electronic circuits
US2966647A (en) Shielded superconductor circuits
JPH05297089A (en) Magnetic sensor
US4392148A (en) Moat-guarded Josephson devices
JPS61182282A (en) Magnetic flux trap preventive type josephson device
JP4769938B2 (en) Large single flux quantum logic circuit
JPS5856374A (en) Josephson logical product device
JPS59139728A (en) Quantum logical circuit of superconductive magnetic flux
US3086130A (en) Cryogenic coupling device
JP2812060B2 (en) SQUID
US6323645B1 (en) Superconducting quantum interference device
JPH0439795B2 (en)
JP2940503B2 (en) Superconducting integrated circuits
JP2838979B2 (en) Superconducting circuit
WO1996009654A1 (en) A method and device for improving the performance of thin-film josephson devices in magnetic fields
JPH07183585A (en) Seperconducting circuit
JP3020172B1 (en) Superconducting magnetic field generator and superconducting detector
JPH0435074A (en) Apparatus for releasing flux trap in superconducting circuit
JPH0334868B2 (en)
JP2692178B2 (en) Superconducting thin film coil
JPS63124585A (en) Magnetic-field-coupling type josephson integrated circuit
JP2943293B2 (en) DC-SQUID magnetometer
JPH04204069A (en) Squid fluxmeter
JPH0522118A (en) Superconducting magnetic flux quantum logic circuit

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term