JPS61177748A - Electronic component - Google Patents

Electronic component

Info

Publication number
JPS61177748A
JPS61177748A JP60018544A JP1854485A JPS61177748A JP S61177748 A JPS61177748 A JP S61177748A JP 60018544 A JP60018544 A JP 60018544A JP 1854485 A JP1854485 A JP 1854485A JP S61177748 A JPS61177748 A JP S61177748A
Authority
JP
Japan
Prior art keywords
package
products
semiconductor device
code
bar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60018544A
Other languages
Japanese (ja)
Inventor
Yasuyuki Saito
斉藤　康幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60018544A priority Critical patent/JPS61177748A/en
Publication of JPS61177748A publication Critical patent/JPS61177748A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54413—Marks applied to semiconductor devices or parts comprising digital information, e.g. bar codes, data matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To promote the efficient automatic mounting of electronic components by enabling the automatic discrimination of products of the same shape and different types, by a method wherein the surface of an electronic component package is provided with an indication convertible to electric signals. CONSTITUTION:The package surface is partly provided with a print of a product discrimination mark 9a made of letters and a bar-code 9b as the indication 9. The above-mentioned mark is indicated together with the bar-code 9b in order that users can discriminate products visually without using an electronic reader. This bar-code 9b is the result of coding as difference with kinds of products and is used to discriminate the kinds of products by conversion into electric signals through a bar-code reader. Since the surface of the resin 2, i.e. package, of a semiconductor device 1 has a print of a bar-code 9b as the indication 9 like this, the automatic discrimination of products can be easily performed.

Description

【発明の詳細な説明】 ［技術分野］ 本発明は、半導体装置等の電子部品の自動実装に適用し
て有効な技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique that is effective when applied to automatic mounting of electronic components such as semiconductor devices.

［背景技術］ マイクロコンピュータを内蔵した電気機器等の需要の急
増に伴い、効率の良い電子部品の実装技術の開発が必要
となってきている。[Background Art] With the rapid increase in demand for electrical equipment with built-in microcomputers, it has become necessary to develop efficient mounting techniques for electronic components.

ここで、製品のパッケージ形状に関する情報をあらかじ
めコンピュータに入力しておき、この情報にもとづいて
製品を自動認識する方法も考えられるが、この方法では
同一パッケージ形状の異種製品の識別を行うことができ
ないことが本発明者によって明らかにされた。すなわち
、半導体装置を例にとれば、ディアル・インライン・パ
ッケージ（Ｄ　Ｉ　Ｐ）型の樹脂封止パッケージの様に
汎用性の高いパッケージ形状の場合には、同一パフケー
ジであっても異なる特性のベレットを搭載したものが多
（、パッケージの外観から製品を識別する方法では正確
の認識を行うことができないのである。Here, it is possible to input information about the product's package shape into a computer in advance and automatically recognize the product based on this information, but this method cannot identify different products with the same package shape. This was revealed by the inventor. In other words, taking semiconductor devices as an example, in the case of a highly versatile package shape such as a dual inline package (DIP) type resin-sealed package, even if the same puff cage is used, pellets with different characteristics may be used. Many products are equipped with this technology (and the method of identifying products from the appearance of the package does not allow for accurate recognition.

また、上記のような製品認識装置は高価であり、より低
コストに製品の種類の識別が可能な技術の開発がさらに
必要であることも同時に本発明者によって明らかにされ
た。Furthermore, the present inventors have also clarified that the above-mentioned product recognition device is expensive, and that there is a need to further develop a technology that can identify the type of product at a lower cost.

なお、電子部品の表示に関する技術としては、特願昭５
８−３５８３０号がある。Note that the technology related to the display of electronic components is
There is No. 8-35830.

［発明の目的］ 本発明の目的は電子部品、特に半導体装置の製品識別を
容易に行い、効率的な自動実装を促進することにある。[Object of the Invention] An object of the present invention is to facilitate product identification of electronic components, particularly semiconductor devices, and to promote efficient automatic mounting.

本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

［発明の概要］ 本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.

すなわち、電子部品のパッケージ表面に光学的または磁
気的に読み取って電気信号に変換可能な表示部を設ける
ことにより、同形状異品種の製品の自動識別が可能とな
り、電子部品の効率的な自動実装を促進することができ
るものである。In other words, by providing a display section on the surface of an electronic component package that can be read optically or magnetically and converted into an electrical signal, it is possible to automatically identify products of different types with the same shape, and this enables efficient automatic mounting of electronic components. This is something that can be promoted.

［実施例１］ 第１図は本発明の一実施例である半導体装置を示す平面
図、第２図は■−■線拡線断大断面図る。[Embodiment 1] FIG. 1 is a plan view showing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged cross-sectional view taken along the line ■-■.

本実施例１の半導体装置１はたとえばシリコン（Ｓ　ｉ
）からなるペレット２がエポキシ樹脂等のレジン３によ
り封止されてなる、いわゆる樹脂′封止型の半導体装置
ｌであり、外形はディアル・インライン・パフケージ（
Ｄ　Ｔ　Ｐ）型のものである。The semiconductor device 1 of the first embodiment is made of, for example, silicon (S i
) is sealed with a resin 3 such as epoxy resin, which is a so-called resin-sealed semiconductor device l, and the external shape is that of a dual in-line puff cage (
DTP) type.

本実施例１の半導体装置ｌの製造方法を説明すると以下
の如くである。The method for manufacturing the semiconductor device 1 of Example 1 will be explained as follows.

まず、タブ４および多数のり一部５がシート状に一体成
形されてなるリードフレーム（図示せず）のタブ４上に
所定の回路が形成されたベレット２をペースト等６で取
付けた後にベレット２上に−設けられているアルミニウ
ム（Ａ１）等からなるパフドアと各リード５とを金（Ａ
ｕ）等からなるワイヤ８でボンディングする。First, the pellet 2 with a predetermined circuit formed thereon is mounted on the tab 4 of a lead frame (not shown) in which the tab 4 and a plurality of glue parts 5 are integrally molded in a sheet shape, and then the pellet 2 is attached with paste or the like 6. The puff door made of aluminum (A1) etc. provided above and each lead 5 are made of gold (A1).
Bonding is performed using a wire 8 made of a material such as u).

次に、金型を用いてペレット２の周囲にレジン３を注入
しベレット２を封止する。その後、レジン３で封止され
た部分から外部に突出したり−ド５を各々に切断・独立
させ、折り曲げることによって本実施例の半導体装置１
を得る。Next, resin 3 is injected around the pellet 2 using a mold to seal the pellet 2. Thereafter, the semiconductor device 1 of this embodiment is protruded from the portion sealed with the resin 3, and the semiconductor device 1 of this embodiment is cut and made independent from each other and bent.
get.

ここで、本実施例１の半導体装置１には第１図に示すよ
うにパッケージ表面の一部に表示部９として文字からな
る製品識別マーク９ａとともにバーコード９ｂが印刷さ
れている。文字からなる製品識別マークは、電子的な読
み取り装置によらず／　　　　　　　に、使用者が目視
によって製品を識別できるようにするために、バーコー
ド９ｂとともに表示されるコードとして符号化されたも
のであり、バーコードリーダー（図示せず）により電気
信号に変換して該製品の種類を識別するものである。Here, as shown in FIG. 1, in the semiconductor device 1 of the first embodiment, a bar code 9b is printed as a display section 9 on a part of the package surface together with a product identification mark 9a consisting of characters. The product identification mark consisting of characters is encoded as a code displayed with the barcode 9b so that the user can visually identify the product without using an electronic reading device. , which is converted into an electrical signal by a barcode reader (not shown) to identify the type of product.

このように本実施例１によれば、半導体装置１のレジン
２すなわちパッケージ表面に表示部９とシテハーコード
９ｂが印刷されているため、製品の自動識別を容易に行
うことができ、自動実装を促進することができる。As described above, according to the first embodiment, since the display section 9 and the code 9b are printed on the resin 2 of the semiconductor device 1, that is, on the surface of the package, automatic product identification can be easily performed, and automatic mounting can be promoted. can do.

また、同形状パッケージからなる異種製品の場合であっ
てもコード内容を変更することにより自動識別を容易に
行うことができる。Further, even in the case of different types of products having packages of the same shape, automatic identification can be easily performed by changing the code contents.

さらに、表示部９はバーコード９ａとともに製品識別マ
ーク９ｂも併記されて印刷されているため、機械による
自動識別と同時に人の目視による製品識別も可能である
。Furthermore, since the bar code 9a and product identification mark 9b are printed on the display section 9, it is possible to identify the product visually by a person as well as automatically by a machine.

［実施例２］ 第３図は本発明の他の実施例である半導体装置の表示部
を示す部分平面図である。[Embodiment 2] FIG. 3 is a partial plan view showing a display section of a semiconductor device according to another embodiment of the present invention.

本実施例に示す半導体装Ｗ１１は実施例１で説明した半
導体装置１とほぼ同様の樹脂封止型半導体装置であるが
、表示部１２のみ異なるものである。The semiconductor device W11 shown in this example is a resin-sealed semiconductor device that is almost the same as the semiconductor device 1 described in Example 1, except for the display portion 12.

すなわち、本実施例２によれば、表示部１２はバーコー
ド１２ａからなるが、このバーコード１２ａはレジン３
の表面に複数の溝状の凹部を設けることにより形成され
ている。That is, according to the second embodiment, the display section 12 is made up of a barcode 12a, but this barcode 12a is
It is formed by providing a plurality of groove-like recesses on the surface.

該バーコード１２ａはレジンモールドの際にあらかじめ
金型の内面側に該バーコード１２ａに対応する凸部を設
けておくことにより容易に形成することができる。The barcode 12a can be easily formed by providing a convex portion corresponding to the barcode 12a on the inner surface of the mold in advance during resin molding.

このように本実施例２によれば表示部１２であるバーコ
ード１２ａはモールドの段階で形成されるため、その後
のいずれの製造工程においても製品の自動識別が容易と
なり、マガジン等への誤収納を防止することができる。In this way, according to the second embodiment, the barcode 12a, which is the display section 12, is formed at the molding stage, making it easy to automatically identify the product in any subsequent manufacturing process, and preventing erroneous storage in magazines, etc. can be prevented.

［実施例３］ 第４図は本発明の他の実施例である半導体装置の断面図
である。[Embodiment 3] FIG. 4 is a sectional view of a semiconductor device according to another embodiment of the present invention.

本実施例の半導体装置２１は、いわゆるガラス封止ディ
アルインラインパッケージ型の半導体装置であり、基板
２２に取付けられたペレット２３がアルミナ等よりなる
キャンプ２４で低融点ガラス２５を介して気密封止され
てなるものである。The semiconductor device 21 of this embodiment is a so-called glass-sealed dual in-line package semiconductor device, in which a pellet 23 attached to a substrate 22 is hermetically sealed with a camp 24 made of alumina or the like via a low melting point glass 25. That's what happens.

この半導体装Ｗ２１は、基板２２に銀等のペースト２６
を用いてペレット２３を取付けた後、該ペレット２３の
周囲にリード２７を低融点ガラス２８で固定し、該リー
ド２７とペレット２３に設けられているパッド２９とを
金等のワイヤ３ｏでボンディングし、最後に基板２２を
覆う様にしてキャップ２４を低融点ガラス２５で取付け
て得られるものである。This semiconductor device W21 has a paste 26 such as silver on a substrate 22.
After attaching the pellet 23 using the pellet 23, the lead 27 is fixed around the pellet 23 with a low melting point glass 28, and the lead 27 and the pad 29 provided on the pellet 23 are bonded with a wire 3o made of gold or the like. Finally, a cap 24 is attached with a low melting point glass 25 so as to cover the substrate 22.

本実施例２ではキャップ２４の表面に磁気テープ３１が
貼着されている。該磁気テープ３１は、表面に磁気記録
体が塗布され、該磁気記録体には当該製品の型名・型番
等の情報が記録されており、一方裏面は粘着面となって
いる。In the second embodiment, a magnetic tape 31 is attached to the surface of the cap 24. The surface of the magnetic tape 31 is coated with a magnetic recording material, and information such as the model name and model number of the product is recorded on the magnetic recording material, while the back surface is an adhesive surface.

当該情報は製品への貼着前に予め磁気テープ３１に人力
しておいても良いし、貼付した後に半導体装置２１毎に
情報を入力しても良い。The information may be manually written onto the magnetic tape 31 before being attached to the product, or the information may be input for each semiconductor device 21 after being attached.

以上のように本実施例３によれば従来の製造工程にわず
かな工程を付加するのみで機械による自動識別が容易な
半導体装置２１を提供することができる。As described above, according to the third embodiment, a semiconductor device 21 that can be easily automatically identified by a machine can be provided by adding only a few steps to the conventional manufacturing process.

［効果］ （１）、電子部品のパッケージ表面に電気信号に変換可
能な表示部を有する構造とすることにより、同形状異品
種の製品の自動識別が可能となり、電子部品の効率的な
自動実装を促進することができる。[Effects] (1) By having a structure that has a display part that can be converted into an electrical signal on the surface of the package of electronic components, it is possible to automatically identify products of different types with the same shape, and efficient automatic mounting of electronic components. can be promoted.

（２）１表示部としてバーコードを印刷することにより
、バーコードリーダーによる製品識別が容易となり、電
子部品の自動実装をさらに効率的に行うことができる。(2) By printing a barcode as one display section, product identification by a barcode reader becomes easy, and automatic mounting of electronic components can be carried out more efficiently.

（３）１表示部としてバーコードおよび製品識別マーク
が併記されていることにより、機械による自動識別と同
時に人の目視による製品識別も容易に行うことができる
。(3) Since a bar code and a product identification mark are displayed together as one display section, it is possible to easily identify the product visually by a person as well as automatically by a machine.

（４）１表示部として磁気テープを貼着することによっ
て、製造工程にわずかな工程を付加するのみで機械によ
る自動識別が容易な電子部品を提供することができる。(4) By attaching a magnetic tape as one display part, it is possible to provide an electronic component that can be easily automatically identified by a machine by adding only a few steps to the manufacturing process.

以上本発明を実施例に基づき具体的に説明したが、本発
明は前記実施例に限定されるものではなく、その要旨を
逸脱しない範囲で種ケ変更可能であることはいうまでも
ない。Although the present invention has been specifically described above based on Examples, it goes without saying that the present invention is not limited to the above-mentioned Examples, and can be modified without departing from the gist thereof.

たとえば、実施例ではパッケージ表面に製品識別マーク
とともにバーコードを印刷した場合、およびパッケージ
表面に凹部を設けることにより、バーコードを形成する
場合についてのみ説明したが、これに限らず、たとえば
バーコードを印刷したシールをパッケージ表面に貼着し
ても良い。For example, in the examples, explanations have only been given of cases in which a barcode is printed on the package surface along with a product identification mark, and cases in which a barcode is formed by providing a concave portion on the package surface, but the present invention is not limited to this. A printed sticker may be attached to the surface of the package.

また、表示部もバーコードに限らずなんらかの方法で電
気信号に変換可能なものであれば如何なるものであって
もよい。Further, the display section is not limited to a bar code, and may be any display section as long as it can be converted into an electrical signal by some method.

さらに、実施例では樹脂封止型および低融点ガラス封止
型の半導体装置についてのみ説明したがこれらに限られ
ず、他の封止方法によるものであってもよい。また、パ
ッケージ形状もディアル・インライン・パッケージ型に
限らずチップキャリア型、フラットパッケージ型等であ
っても良い。Further, in the embodiments, only resin-sealed type and low-melting point glass-sealed type semiconductor devices have been described, but the present invention is not limited to these, and other sealing methods may be used. Furthermore, the package shape is not limited to the dual inline package type, but may also be a chip carrier type, flat package type, or the like.

パッケージ上面のサイズが小さい場合などにより、パッ
ケージ上面に実質的に目視可能な製品識別マークしか表
示できない場合、バーコードはパッケージ下面に設置さ
れても良い。If only a substantially visible product identification mark can be displayed on the top of the package, such as due to the small size of the top of the package, the barcode may be placed on the bottom of the package.

［利用分野］ 以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野である、いわゆる半導体装
置に適用した場合について説明したが、これに限定され
るものではなく、トランジスタ、コンデンサ等、他の電
子部品に適用しても有効な技術である。[Field of Application] In the above explanation, the invention made by the present inventor was mainly applied to the field of application which is the background thereof, which is a so-called semiconductor device, but the invention is not limited to this, and This technology is also effective when applied to other electronic components such as capacitors.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の実施例１である半導体装置を示す平面
図、 第２図は実施例１の半導体装置を示す第１図■−■線拡
大断面図、 第３図は実施例２の半導体装置の表示部を示す拡大部分
平面図、 第４図は実施例３の半導体装置を示す断面図である。 １・・・半導体装置、２・・・ベレット、３・・・レジ
ン、４・・・タブ、５・・・リード、６・・・ペースト
、７・・・パッド、８・・・ワイヤ、９・・・表示部、
９ａ・・・製品識別マーク、９ｂ・・・バーコード、１
０・・・表示部、ｌＯａ・・・バーコード、１１・・・
半導体装置、１２・・・表示部、１２ａ・・・バーコー
ド、２１・・・半導体装置、２２・・・基板、２３・・
・ペレット、２４・・・キャップ、２５・・・低融点ガ
ラス、２６・・・ペースト、２７・・・リード、２８・
・・低融点ガラス、２９・・・パッド、３０・・・ワイ
ヤ、３１・・・磁気テープ。 第　　１　　図 一〇 Ｌア 第　　２　　図 第　　３　　図 第　　４　　図FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention, FIG. 2 is an enlarged sectional view taken along the line ■-■ in FIG. 1, showing a semiconductor device according to a first embodiment, and FIG. FIG. 4 is an enlarged partial plan view showing the display portion of the semiconductor device; FIG. 4 is a cross-sectional view showing the semiconductor device of Example 3; DESCRIPTION OF SYMBOLS 1... Semiconductor device, 2... Bullet, 3... Resin, 4... Tab, 5... Lead, 6... Paste, 7... Pad, 8... Wire, 9 ...display section,
9a...Product identification mark, 9b...Barcode, 1
0...Display section, lOa...Barcode, 11...
Semiconductor device, 12...Display section, 12a...Barcode, 21...Semiconductor device, 22...Substrate, 23...
- Pellet, 24... Cap, 25... Low melting point glass, 26... Paste, 27... Lead, 28...
...Low melting point glass, 29...Pad, 30...Wire, 31...Magnetic tape. Figure 1 Figure 10LA Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】 １、パッケージ表面に光学的または磁気的に読み取って
電気信号に変換可能な表示部を有することを特徴とする
電子部品。 ２、表示部がバーコードからなることを特徴とする特許
請求の範囲第１項記載の電子部品。 ３、バーコードがパッケージ表面に印刷または貼着され
ている層から成ることを特徴とする特許請求の範囲第２
項記載の電子部品。 ４、バーコードがパッケージ表面の凹部もしくは凸部に
よって構成されていることを特徴とする特許請求の範囲
第２項記載の電子部品。 ５、表示部が磁気記録体からなることを特徴とする特許
請求の範囲第１項記載の電子部品。 ６、表示部がバーコードおよび製品識別マークからなる
ことを特徴とする特許請求の範囲第１項記載の電子部品
。[Scope of Claims] 1. An electronic component characterized by having a display section on the surface of a package that can be read optically or magnetically and converted into an electrical signal. 2. The electronic component according to claim 1, wherein the display section is made of a barcode. 3. Claim 2, characterized in that the barcode consists of a layer printed or pasted on the surface of the package.
Electronic components listed in section. 4. The electronic component according to claim 2, wherein the barcode is formed by a concave or convex portion on the surface of the package. 5. The electronic component according to claim 1, wherein the display section is made of a magnetic recording material. 6. The electronic component according to claim 1, wherein the display portion comprises a bar code and a product identification mark.
JP60018544A 1985-02-04 1985-02-04 Electronic component Pending JPS61177748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60018544A JPS61177748A (en) 1985-02-04 1985-02-04 Electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60018544A JPS61177748A (en) 1985-02-04 1985-02-04 Electronic component

Publications (1)

Publication Number Publication Date
JPS61177748A true JPS61177748A (en) 1986-08-09

Family

ID=11974574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60018544A Pending JPS61177748A (en) 1985-02-04 1985-02-04 Electronic component

Country Status (1)

Country Link
JP (1) JPS61177748A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022841U (en) * 1988-06-15 1990-01-10
WO2004055894A1 (en) * 2002-12-17 2004-07-01 Infineon Technologies Ag Integrated semiconductor module comprising an identification region
JP2006102364A (en) * 2004-10-08 2006-04-20 Le Tekku:Kk Semiconductor device for controlling game machine, and inspection apparatus and inspection method therefor
JP2007059948A (en) * 2006-11-27 2007-03-08 Oki Electric Ind Co Ltd Semiconductor chip, method for manufacturing semiconductor chip, lead frame, method for manufacturing lead frame, semiconductor device, and method for manufacturing semiconductor device
JP2010056930A (en) * 2008-08-28 2010-03-11 Nippon Dempa Kogyo Co Ltd Piezoelectric element built-in component and discrimination symbol printing method therefor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022841U (en) * 1988-06-15 1990-01-10
WO2004055894A1 (en) * 2002-12-17 2004-07-01 Infineon Technologies Ag Integrated semiconductor module comprising an identification region
JP2006102364A (en) * 2004-10-08 2006-04-20 Le Tekku:Kk Semiconductor device for controlling game machine, and inspection apparatus and inspection method therefor
JP4691346B2 (en) * 2004-10-08 2011-06-01 株式会社エルイーテック Semiconductor device for gaming machine control, and inspection apparatus and inspection method therefor
JP2007059948A (en) * 2006-11-27 2007-03-08 Oki Electric Ind Co Ltd Semiconductor chip, method for manufacturing semiconductor chip, lead frame, method for manufacturing lead frame, semiconductor device, and method for manufacturing semiconductor device
JP2010056930A (en) * 2008-08-28 2010-03-11 Nippon Dempa Kogyo Co Ltd Piezoelectric element built-in component and discrimination symbol printing method therefor

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