JPS61176143A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS61176143A
JPS61176143A JP60017294A JP1729485A JPS61176143A JP S61176143 A JPS61176143 A JP S61176143A JP 60017294 A JP60017294 A JP 60017294A JP 1729485 A JP1729485 A JP 1729485A JP S61176143 A JPS61176143 A JP S61176143A
Authority
JP
Japan
Prior art keywords
lead frame
leads
lead
boundary
indicate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60017294A
Other languages
Japanese (ja)
Inventor
Ko Aso
麻生　香
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60017294A priority Critical patent/JPS61176143A/en
Publication of JPS61176143A publication Critical patent/JPS61176143A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable to easily find the fact that a noble metal plating is adhering over the prescribed region on the surfaces of the leads of a lead frame by a method wherein a discrimination part to indicate the boundary of the sealing resin region is provided at parts of the surfaces of the leads. CONSTITUTION:A discrimination part 8 to indicate the boundary of the sealing resin region is provided at parts of the surfaces of leads 3 for outside lead-out. Figures (a-d) are the enlarged figures that the leads 3 formed with the discrimination part are seen from the side surfaces thereof. The figure (a) is one that a step 11 to indicate the boundary by the thickness thereof is provided at a part of the surface of the lead 3 as the discrimination part, the figure (b) is one that a recessed part 12 is provided, the figure (c) is one that a protruded part 13 is provided and the figure (d) is one that a step 14 to indicate the boundary by the height thereof is provided while holding the thickness thereof to a constant. These discrimination parts can be formed by well-known various methods. The case of the figures (a), (b) and (c) can be formed by an etching processing method according to half etching, the case of the figures (a) and (b) of III diagram by a coining method, the case of the figure (b) by a laser processing method or an electron beam processing method and the case of the figure (d) by an embossing method.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はリードフレームに関するもので、特に樹脂封止
型半導体装置に使用されるものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a lead frame, particularly for use in resin-sealed semiconductor devices.

〔発明の技術的背景〕[Technical background of the invention]

樹脂封止型半導体装置に広く用いられているリードフレ
ームの構造を第３図に示す。リードフレーム１０は中央
部に半導体素子を搭載するためのベッド（アイランド）
１を有し、このベッド１はタイバー２によって外枠（図
示せず）に固定されている。このベッド１の囲りには、
外部引出用のインナリード３がその一端をベッド１に近
接した状態で略放射状に多数配設されている。このイン
ナリードの他端も外枠に（図示せず）に接続され固定さ
れている。FIG. 3 shows the structure of a lead frame widely used in resin-sealed semiconductor devices. The lead frame 10 is a bed (island) for mounting semiconductor elements in the center.
1, and this bed 1 is fixed to an outer frame (not shown) by tie bars 2. Around this bed 1,
A large number of inner leads 3 for external drawers are arranged substantially radially with one end thereof close to the bed 1. The other end of this inner lead is also connected and fixed to the outer frame (not shown).

このようなリードフレームを用いて半導体装置を製造す
るにはベッド１上に半導体チップを搭載し、半導体チッ
プ上の電極とリード３との間にワイヤボンディングによ
る所定の配線を実施後、樹脂封止を行なっている。To manufacture a semiconductor device using such a lead frame, a semiconductor chip is mounted on the bed 1, and after performing predetermined wiring by wire bonding between the electrodes on the semiconductor chip and the leads 3, resin sealing is performed. is being carried out.

これによって樹脂封止部４が形成され、この後タイバー
２やリード３を接続している外枠を切り離し、所定の曲
げを行うことにより半導体装置が完成する。なお、通常
樹脂封止部４内に存在するリード３をインナリードと称
し、樹脂封止部４より外側に存在するリード３をアウタ
リードと称している。As a result, a resin sealing portion 4 is formed, and then the outer frame connecting the tie bars 2 and leads 3 is separated and a predetermined bending is performed to complete the semiconductor device. Note that the leads 3 existing within the resin sealing part 4 are usually referred to as inner leads, and the leads 3 existing outside the resin sealing part 4 are referred to as outer leads.

ところで、リードフレーム１０には、半導体チップとイ
ンナリードとの接続に用いる金ワイヤがインナリードに
接続可能となるように、金めつき等の貴金属めっきを施
すことが行われる。Incidentally, the lead frame 10 is plated with a noble metal such as gold plating so that the gold wire used for connecting the semiconductor chip and the inner leads can be connected to the inner leads.

このような貴金属めっきは樹脂封止部４よりも内側の領
域に施される。すなわち、このめっき部５内に存在する
リード３およびベッド１を残して他の部分を例えばゴム
のマスクで被い、めっき液に浸漬することにより所定範
囲のめっきが行われる。Such noble metal plating is applied to the area inside the resin sealing part 4. That is, except for the leads 3 and bed 1 existing in the plating section 5, the other parts are covered with a rubber mask, for example, and immersed in a plating solution, thereby plating a predetermined range.

〔背景技術の問題点〕[Problems with background technology]

しかしながらリードフレーム１０に施される貴金属めっ
きは、樹脂封止部４内に施される時には問題は生じない
が、樹脂封止部４の境界とめっき部５とが位置的に近く
なるとめっきの洩れや位置ずれ等により樹脂封止部４の
境界外にめっきが付着する場合があり、このような状態
で半導体装置の組立てを行うと問題が発生する。However, when the precious metal plating applied to the lead frame 10 is applied inside the resin sealing part 4, no problem occurs, but if the boundary of the resin sealing part 4 and the plating part 5 are close to each other, the plating may leak. Plating may adhere outside the boundaries of the resin sealing part 4 due to misalignment or misalignment, and problems will occur if a semiconductor device is assembled in such a state.

第４図は樹脂封止を行って完成した半導体装置の断面図
を示したものである。通常アウタリード３の表面には外
装用の寄金ｆｆ１（Ｓｎ　、　Ｐｂ　）めっきがｇＩｉ
される。この際、樹脂封止部４の境界外にめっき部５が
はみ出していたり、余分なめっきが付着していた場合に
は貴金属めっきと外装用の卑金属めっきとが直接接触す
ることになる。FIG. 4 shows a cross-sectional view of a semiconductor device completed by resin sealing. Normally, the surface of the outer lead 3 is coated with external donor ff1 (Sn, Pb) plating.
be done. At this time, if the plating part 5 protrudes outside the boundary of the resin sealing part 4 or if excess plating is attached, the noble metal plating and the base metal plating for the exterior will come into direct contact.

このような状態で長時間放置されると、外装用の卑金属
めりき６はリードフレーム１０の貴金属めっき中に拡散
し、特にインナリードの長さが短かい場合には金ワイヤ
接続部にまで達してしまう。If left in this condition for a long time, the base metal plating 6 for the exterior will diffuse into the precious metal plating of the lead frame 10, and will even reach the gold wire connection part, especially if the length of the inner lead is short. I end up.

金ワイヤ接続部に卑金属が拡散した状態では金ワイヤと
めっき部５との密着を低下させ、最悪の場合には断線が
発生し、信頼性を低下させるという問題がある。半導体
装置の高集積化により半導体チップの大きさは拡大化し
ており、これに伴ってベッド部ら拡大化し、インナリー
ドの長さはさらに短くなりつつあり、めっきずれは重大
な問題となりつつある。When the base metal is diffused into the gold wire connection part, there is a problem in that the adhesion between the gold wire and the plating part 5 is reduced, and in the worst case, disconnection occurs, reducing reliability. The size of semiconductor chips is increasing due to the increased integration of semiconductor devices, and with this, the bed portion is also becoming larger, and the length of inner leads is becoming shorter, and plating misalignment is becoming a serious problem.

〔発明の目的〕[Purpose of the invention]

本発明は上述した欠点を除去するためになされたもので
、樹脂封止部内の負金属と外部の卑金属とが直接接触し
たものが組立工程に流れることのないように目視検査が
容易なリードフレームを提供することを目的とする。The present invention has been made in order to eliminate the above-mentioned drawbacks, and has a lead frame that can be easily visually inspected so that the negative metal in the resin sealing part and the base metal outside do not come into direct contact with each other in the assembly process. The purpose is to provide

〔発明の概要〕[Summary of the invention]

上記目的達成のため、本発明においては、外部導出用リ
ードを有するリードフレームにおいて、前記リード表面
の一部に封止樹脂領域の境界を示す識別部を設けたこと
を特徴としており、貴金属めっきが所定領域を越えて付
着していることを容易に発見できるものである。In order to achieve the above object, the present invention is characterized in that a lead frame having external leads is provided with an identification part indicating the boundary of the sealing resin area on a part of the lead surface, and the noble metal plating is It is easy to detect that the adhesive has adhered beyond a predetermined area.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照しながら本発明の実施例を詳細に説明
する。Embodiments of the present invention will be described in detail below with reference to the drawings.

第１図は本発明の一実施例を示すリードフレームの平面
図であって、外部引出し用リード３の表面の一部に封止
樹脂領域の境界を示す識別部８を設けている。FIG. 1 is a plan view of a lead frame showing an embodiment of the present invention, in which an identification portion 8 indicating the boundary of the sealing resin region is provided on a part of the surface of the lead 3 for external extraction.

第３図にこの識別部の各種形状を示す。第３Ｆｊ４は識
別部を形成したリードを側面からみた拡大図であって、
第３図（ａ）は厚さの段差１１を設けたもの、第３図（
ｂ）は凹部１２を設けたもの、第３図（Ｃ）は突起部１
３を設けたもの、第３図（ｄ）は厚さ一定で高さの段差
１４を設けたものである。これらは公知の各種の方法で
形成することができ、ハーフエッチによるエツチング加
工では第３図（ａ）、（ｂ）、（Ｃ）の場合を、コイニ
ング加工では第°３図（ａ）（ｂ）の場合を、し−ザー
加工あるいは電子ビーム加工では第３図（ｂ）の場合を
、エンボス加工では第３図（ｄ）の場合を形成すること
ができる。これらにおける厚さや高さの段差、四部の深
さ、突起部の高さ等は任意に選択できるが、リードの強
度を低下させずに目視で樹脂封止領域の境界部が明瞭に
識別できれば十分であり、例えば２μｍ程度が採用され
る。FIG. 3 shows various shapes of this identification section. 3rd Fj4 is an enlarged side view of a lead on which an identification part is formed,
Fig. 3(a) shows one with a step 11 in thickness;
b) is the one with the recess 12, and FIG. 3(C) is the one with the protrusion 1.
3, and the one shown in FIG. 3(d) has a constant thickness and a step 14 in height. These can be formed by various known methods; half-etching is used in the cases shown in Figs. 3(a), (b), and (C), and coining is shown in Figs. ), the case shown in FIG. 3(b) can be formed by laser processing or electron beam processing, and the case shown in FIG. 3(d) can be formed by embossing. The thickness and height differences, the depth of the four parts, the height of the protrusions, etc. can be selected arbitrarily, but it is sufficient that the boundaries of the resin-sealed area can be clearly identified visually without reducing the strength of the lead. For example, about 2 μm is adopted.

第２図は、このような識別部８を設（プたリードフレー
ムを用いて樹脂封止部を形成した半導体装置の平面図を
示したものであり、樹脂封止部４の外端が識別部８と一
致するように樹脂封止部４が形成される。FIG. 2 shows a plan view of a semiconductor device in which a resin sealing part is formed using a lead frame in which such an identification part 8 is installed, and the outer end of the resin sealing part 4 is an identification part. The resin sealing portion 4 is formed to match the portion 8 .

貴金属めっきが施されたリードフレームについては目視
検査が行われるが、樹脂封止領域にまでめっきがはみ出
している場合には識別部に着目することにより容易に判
別することができ、不良品として除去できるため、樹脂
封止後に貴金属めっきと卑金属めっきがアウタリード上
で接触する状態が発生ずることを防止することができる
。Lead frames with precious metal plating are visually inspected, but if the plating protrudes into the resin sealing area, it can be easily identified by looking at the identification area and removed as a defective product. Therefore, it is possible to prevent the noble metal plating and the base metal plating from coming into contact on the outer lead after resin sealing.

〔発明の効果〕〔Effect of the invention〕

以上実施例に基づいて詳細に説明したように本発明では
リードの一部を表面加工することにより封止樹脂封止領
域との境界を示す識別部を設けているので、めっきずれ
やめつき洩れ等の原因によりこの識別部外にめっきが付
着した場合には容易に検査において判別が可能となり、
樹脂封止工程に流さないようにできるため、樹脂封止を
行ったのちアウタリード部に卑金属めっきを施こした場
合に両金属が接触するという＠態は発生せず、半尋体装
台の信頼性を高めることができる。As described above in detail based on the embodiments, in the present invention, a part of the lead is surface-processed to provide an identification part that indicates the boundary with the sealing resin sealing area, so that there may be problems such as plating misalignment and sticking leakage. If plating adheres outside of this identification area due to this reason, it can be easily identified through inspection.
Since it is possible to prevent it from flowing into the resin sealing process, when base metal plating is applied to the outer lead part after resin sealing, there is no situation where the two metals come into contact with each other, which increases the reliability of the half-body mounting base. You can increase your sexuality.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明の一実施例を示すリードフレームの平
面図、第２図は第１図に示すリードフレームを用いて半
導体装置を形成した際の平面図、第３図は識別部の各種
形状を示す拡大側面図、第４図は従来のリードフレーム
を用いた半導体装置の平面図、第５図は従来のリードフ
レームによる問題点を説明するための半導体装置の断面
図である。 １・・・ベッド、２・・・タイバー、３・・・外部導出
引出用リード、４・・・樹脂封止部、５・・・めっき部
、６・・・卑金属めっき層、７・・・金ワイヤ、８・・
・識別部。 出願人代理人　　猪　　股　　　　漬 ′ｆ）１　図 ？’、２１！１FIG. 1 is a plan view of a lead frame showing an embodiment of the present invention, FIG. 2 is a plan view of a semiconductor device formed using the lead frame shown in FIG. 1, and FIG. 3 is a plan view of various types of identification parts. FIG. 4 is an enlarged side view showing the shape, FIG. 4 is a plan view of a semiconductor device using a conventional lead frame, and FIG. 5 is a cross-sectional view of the semiconductor device for explaining problems caused by the conventional lead frame. DESCRIPTION OF SYMBOLS 1... Bed, 2... Tie bar, 3... Lead for external extraction, 4... Resin sealing part, 5... Plating part, 6... Base metal plating layer, 7... Gold wire, 8...
・Identification part. Applicant's agent Tsuke Inomata'f) 1 Figure? ', 21!1

Claims (1)

【特許請求の範囲】 １、外部導出用リードを有するリードフレームにおいて
、前記リード表面の一部に封止樹脂領域の境界を示す識
別部を設けたことを特徴とするリードフレーム。 ２、識別部が厚さの段差で成る特許請求の範囲第１項記
載のリードフレーム。 ３、識別部が凹部で成る特許請求の範囲第１項記載のリ
ードフレーム。 ４、識別部が突起で成る特許請求の範囲第１項記載のリ
ードフレーム。 ５、識別部が高さの段差で成る特許請求の範囲第１項記
載のリードフレーム。 ６、識別部がハーフエッチにより形成された特許請求の
範囲第２項または第３項記載のリードフレーム。 ７、識別部がコイニング加工により形成された特許請求
の範囲第２項、第３項、第４項のいずれか記載のリード
フレーム。 ８、識別部がエンボス加工により形成された特許請求の
範囲第５項記載のリードフレーム。[Claims] 1. A lead frame having a lead for leading to the outside, characterized in that an identification portion indicating a boundary of a sealing resin region is provided on a part of the lead surface. 2. The lead frame according to claim 1, wherein the identification portion is formed by a step in thickness. 3. The lead frame according to claim 1, wherein the identification portion is a recess. 4. The lead frame according to claim 1, wherein the identification portion is a projection. 5. The lead frame according to claim 1, wherein the identification portion is formed by a step in height. 6. The lead frame according to claim 2 or 3, wherein the identification portion is formed by half etching. 7. The lead frame according to any one of claims 2, 3, and 4, wherein the identification portion is formed by coining processing. 8. The lead frame according to claim 5, wherein the identification portion is formed by embossing.
JP60017294A 1985-01-31 1985-01-31 Lead frame Pending JPS61176143A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60017294A JPS61176143A (en) 1985-01-31 1985-01-31 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60017294A JPS61176143A (en) 1985-01-31 1985-01-31 Lead frame

Publications (1)

Publication Number Publication Date
JPS61176143A true JPS61176143A (en) 1986-08-07

Family

ID=11939975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60017294A Pending JPS61176143A (en) 1985-01-31 1985-01-31 Lead frame

Country Status (1)

Country Link
JP (1) JPS61176143A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4924292A (en) * 1988-04-12 1990-05-08 Kaufman Lance R Direct bond circuit assembly with crimped lead frame

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4924292A (en) * 1988-04-12 1990-05-08 Kaufman Lance R Direct bond circuit assembly with crimped lead frame

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