JPS61172443A - Amplifier circuit - Google Patents

Amplifier circuit

Info

Publication number
JPS61172443A
JPS61172443A JP60011798A JP1179885A JPS61172443A JP S61172443 A JPS61172443 A JP S61172443A JP 60011798 A JP60011798 A JP 60011798A JP 1179885 A JP1179885 A JP 1179885A JP S61172443 A JPS61172443 A JP S61172443A
Authority
JP
Japan
Prior art keywords
amplifier
power
attenuation
attenuator
amplifiers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60011798A
Other languages
Japanese (ja)
Other versions
JPH0516692B2 (en
Inventor
Hiroyuki Fukushima
弘之 福島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60011798A priority Critical patent/JPS61172443A/en
Publication of JPS61172443A publication Critical patent/JPS61172443A/en
Publication of JPH0516692B2 publication Critical patent/JPH0516692B2/ja
Granted legal-status Critical Current

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  • Mobile Radio Communication Systems (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain an economical amplifier circuit operated stably by decreasing the attenuation of an attenuator when a power voltage is fed to an amplifier and increasing the attenuation when the power is cut off. CONSTITUTION:Attenuators 15 and 16 consist of PIN diodes or the like and the attenuation is minimized at application of power and maximized at interruption of power. When amplifiers 2 and 3 are operated, e.g., a power switch 5 is disconnected from the connecting state to inactivate an amplifier section 6, causing the input/output VSWR to be deteriorated. Even when the isolation between ports of a distributor 1 and a synthesizer 4 resultingly is decreased, the maximum attenuation of the attenuator 15 is increased more than the amplification gain of the amplifier 3 and the back isolation quantity as the amplifier 2 is selected to a sufficiently large value. Since no positive feedback loop is formed with respect to the amplifier 3, even when the power of one system is disconnected, a gain reduction of nearly 6dB exists, but the operation is continued stably.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、無線電話通侶機などに用いられる増幅回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an amplifier circuit used in a radio telephone communication device or the like.

(従来の技術) 従来用いられてきた増幅回路のブロック図を第2図に示
す0本図で、1は分配器、2及び3は増幅器、4は合成
器、5及び7は電源スィッチ、6及び8は増幅部、9は
入力信号、10は出力信号をそれぞれ示す、電源スィッ
チ5及び7が接の状態で、入力信号9が分配器1に入力
されると、分配器1により入力信号9は2分配きれ、出
力ボート11及び12には均等分配された出力信号が現
れる。
(Prior Art) A block diagram of a conventionally used amplifier circuit is shown in FIG. 2, in which 1 is a distributor, 2 and 3 are amplifiers, 4 is a combiner, 5 and 7 are power switches, and 6 and 8 are amplifiers, 9 is an input signal, and 10 is an output signal. When the input signal 9 is input to the distributor 1 with the power switches 5 and 7 on, the input signal 9 is output by the distributor 1. is divided into two, and equally distributed output signals appear on the output ports 11 and 12.

それぞれの出力信号は増幅器2及び増幅器3に加えられ
増幅部6及び増幅部8により増幅される。
The respective output signals are applied to amplifiers 2 and 3 and amplified by amplifiers 6 and 8.

増幅部6及び増幅部8により均等増幅されたそれぞれの
出力信号は、合成器4の入力ボート13及び14に加え
られ合成器4にて合成され出力信号10となる。
The output signals uniformly amplified by the amplifier sections 6 and 8 are applied to the input ports 13 and 14 of the combiner 4, and are combined by the combiner 4 to become the output signal 10.

(発明が解決しようとする問題点) このような従来の増幅回路では、入力信号9が入力され
増幅器2及び3が動作中に電源スィッチ5を接から断に
すると、増幅部6が非動作になることにより増幅部6自
身のバックアイソレーション及び入出力VSWRが悪化
し、ひいては分配器1の出力ボート11及び合成器のλ
カボート13においてもVSWRは悪化する。
(Problems to be Solved by the Invention) In such a conventional amplifier circuit, if the input signal 9 is input and the power switch 5 is disconnected while the amplifiers 2 and 3 are operating, the amplifier section 6 becomes inoperable. As a result, the back isolation and input/output VSWR of the amplifier section 6 itself deteriorates, and as a result, the output port 11 of the distributor 1 and the λ of the combiner deteriorate.
VSWR also deteriorates in Kavoto 13.

そこで、分配器1のアイソレーション特性(出力ボート
11→出力ボート12)及び合成器4のアイソレーショ
ン特性(λカボート14→入カボート13)が悪化する
から、増幅器3の増幅利得がこれらのアイソレーション
量に増幅器2のバックアイソレーション量を加えた値よ
り大きければ、増幅器3の出力信号の一部は分配器1の
出力ボート12に帰還きれることにより正帰還ループを
形成し増幅器3が発振状態になる。
Therefore, the isolation characteristics of the divider 1 (output port 11 → output port 12) and the isolation characteristics of the combiner 4 (λ port 14 → input port 13) deteriorate, so the amplification gain of the amplifier 3 is adjusted to compensate for these isolation characteristics. If the amount is larger than the sum of the amount of back isolation of amplifier 2, a part of the output signal of amplifier 3 can be fed back to the output port 12 of distributor 1, forming a positive feedback loop, and amplifier 3 enters an oscillation state. Become.

したがって従来の増幅回路ではこのような発振状態を回
避するため番こバックアイソレーションを太きくり、V
SWRを小さくするために増幅器2,3内にアイソレー
タを挿入したり、また正常な負荷状態における分配器1
及び合成器4のアイソレーション量を必要以上にとるな
どした。従って、従来の増幅回路は、高価で非経済的で
あった。
Therefore, in conventional amplifier circuits, in order to avoid such an oscillation state, the back isolation is made thicker and the V
In order to reduce the SWR, isolators are inserted into the amplifiers 2 and 3, and the distributor 1 under normal load conditions is used.
Also, the isolation amount of the synthesizer 4 was set higher than necessary. Therefore, conventional amplifier circuits have been expensive and uneconomical.

そこで、本発明の目的は、このような上記の従来技術の
欠点を解決し、経済的でかつ安定に動作する増幅回路の
提供ある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an amplifier circuit that is economical and operates stably, solving the above-mentioned drawbacks of the prior art.

(問題点を解決するための手段) 前述の問題点を解決するために本発明が提供する手段は
、λカロ号を複数の経路に分配する分配器と、前記経路
の信号をそれぞれ増幅する複数の増幅器と、これら増幅
器の出力信号を合成する合成器とが備えである増幅回路
であって、前記増幅器は信号経路に減衰器をそれぞれ有
しており、前記減衰器の減衰量は前記増幅器に電源電圧
が印加されているときには/J\さくその電源電圧が遮
断きれているときには大きいことを特徴とする。
(Means for Solving the Problems) Means provided by the present invention to solve the above-mentioned problems includes a distributor that distributes the λ Caro signal to a plurality of paths, and a plurality of distributors that amplify the signals of the paths, respectively. an amplifier and a synthesizer for synthesizing the output signals of these amplifiers, the amplifiers each having an attenuator in a signal path, and the attenuation amount of the attenuator is equal to the amount of attenuation of the attenuator. It is characterized in that it is large when the power supply voltage is applied and /J\ is large when the power supply voltage is completely cut off.

(実施例) 次に実施例を挙げ本発明の詳細な説明する。(Example) Next, the present invention will be explained in detail with reference to Examples.

第1150は本発明の一実施例のブロック図である。こ
の実施例では、増幅器2及び3が信号経路に減衰器15
及び16をそれぞれ有している。この実施例において電
源スィッチ5及び7が接の状態で、入力信号9が分配器
1に入力きれると、分配器1により入力信号9は2分配
きれ出力ボート11及び12には均等分配された出力信
号が現われる。
No. 1150 is a block diagram of an embodiment of the present invention. In this embodiment, amplifiers 2 and 3 are provided with an attenuator 15 in the signal path.
and 16, respectively. In this embodiment, when the power switches 5 and 7 are on and the input signal 9 is fully input to the distributor 1, the input signal 9 is divided into two by the distributor 1, and the output ports 11 and 12 are equally distributed outputs. A signal appears.

それぞれの出力信号は増幅器2及び増幅器3に加えられ
、一方は減衰器15を経た後に増幅部6により、他方は
減衰器16を経た後に増幅部8.によりそれぞれ均等増
幅きれる。増幅されたそれぞれの出力信号は、合成器4
のλカボート13及び14に加えられ、合成器4にて合
成され出力信号10となる。
The respective output signals are applied to amplifiers 2 and 3, one passing through an attenuator 15 and then being sent to an amplifying section 6, and the other passing through an attenuator 16 and then sent to an amplifying section 8. Each can be amplified equally. Each amplified output signal is sent to a combiner 4.
The signal is added to the λ covers 13 and 14, and is combined in the combiner 4 to form the output signal 10.

減衰器15及び16は、例えばP工Nダイオード等によ
り構成し、電源液の状態では最小の減衰量に、電源断の
状態では最大の減衰量になる。
The attenuators 15 and 16 are constituted by, for example, P-N diodes, and have a minimum attenuation amount when the power supply liquid is present, and a maximum attenuation amount when the power supply is off.

このような実施例において、電源スィッチ5及び7を接
にし増幅器2及び3が動作状態の時に、例えば電源スィ
ッチ5を接から断にし増幅部6が非動作になることによ
り入出力VSWRが悪化し結果的に分配器1及び合成器
4の各ポート間のアイソレーション量が低下したとする
。この実施例ではこのような状態になっても、減衰器1
5の最大減衰量が増幅器3の増幅利得より大きな値にし
てあり、増幅器2としてのバックアイソレーション量は
充分大きな値となる。そこで、増幅器3について正帰還
ループが形成されないから、本実施例では片系の電源が
断になっても、約6dBの利得低下はあるが、安定に動
作をmate−aせることができる。
In such an embodiment, when the power switches 5 and 7 are connected and the amplifiers 2 and 3 are in operation, the input/output VSWR is deteriorated by, for example, turning off the power switch 5 and making the amplifier section 6 inoperative. Assume that the amount of isolation between each port of the distributor 1 and combiner 4 is reduced as a result. In this embodiment, even in such a state, the attenuator 1
The maximum attenuation amount of the amplifier 5 is set to a value larger than the amplification gain of the amplifier 3, and the amount of back isolation as the amplifier 2 becomes a sufficiently large value. Therefore, since a positive feedback loop is not formed for the amplifier 3, in this embodiment, even if the power of one system is cut off, the mate-a can operate stably, although there is a gain drop of about 6 dB.

第1図及び第2図を互いに比較しても明らかなように、
第2図の従来技術では片系の増幅器の電源を断にした時
に、正帰還ループが構成され発振状態になる恐れがあり
、またその対策のためには増幅器内にアイソレータを挿
入するなどといった非経済的な手段をとっていた。これ
に対し、本実施例では、片系の電源断時に増幅器内に実
装した減衰器の減衰量が最小から最大になり増幅器とし
てのバックアイソレーションが充分大きくとれるから、
正帰還ループが形成されることなく安定に動作を継続き
せることができる。
As is clear from comparing Figures 1 and 2,
In the conventional technology shown in Figure 2, when the power to one amplifier is turned off, a positive feedback loop may be formed and an oscillation state may occur, and countermeasures such as inserting an isolator into the amplifier are necessary. He took economic measures. On the other hand, in this embodiment, the amount of attenuation of the attenuator mounted in the amplifier increases from the minimum to the maximum when the power of one system is cut off, and the back isolation as an amplifier can be sufficiently large.
Stable operation can be continued without the formation of a positive feedback loop.

(発明の効果) 以上に説明したように、本発明によれば、経済的でしか
も安定に動作する増幅回路が提供できる。
(Effects of the Invention) As described above, according to the present invention, it is possible to provide an amplifier circuit that is economical and operates stably.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック図、第2図は従来
の増幅回路のブロック図である。 1・・・分配器、2.3・・・増幅器、4・・・合成器
、5.7・・・電源スィッチ、6.8・・・増幅部、9
・・・入力信号、10・・・出力信号、11.12・・
・分配器の出力ボート、13.14・・・合成器の入力
ボート、15.16・・・減衰器。 代理人弁理士  本 庄 伸 介 第1図 ◆V 第2図 ◆l
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional amplifier circuit. DESCRIPTION OF SYMBOLS 1...Distributor, 2.3...Amplifier, 4...Synthesizer, 5.7...Power switch, 6.8...Amplification section, 9
...Input signal, 10...Output signal, 11.12...
- Output port of the distributor, 13.14... Input port of the synthesizer, 15.16... Attenuator. Representative Patent Attorney Shinsuke Honjo Figure 1◆V Figure 2◆l

Claims (1)

【特許請求の範囲】[Claims] 入力信号を複数の経路に分配する分配器と、前記経路の
信号をそれぞれ増幅する複数の増幅器と、これら増幅器
の出力信号を合成する合成器とが備えてある増幅回路に
おいて、前記増幅器は信号経路に減衰器をそれぞれ有し
ており、前記減衰器の減衰量は前記増幅器に電源電圧が
印加されているときには小さくその電源電圧が遮断され
ているときには大きいことを特徴とする増幅回路。
In an amplifier circuit that includes a divider that distributes an input signal to a plurality of paths, a plurality of amplifiers that amplify signals on each of the paths, and a synthesizer that combines the output signals of these amplifiers, the amplifier is connected to a signal path. and an attenuator, and the attenuation amount of the attenuator is small when a power supply voltage is applied to the amplifier and large when the power supply voltage is cut off.
JP60011798A 1985-01-26 1985-01-26 Amplifier circuit Granted JPS61172443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60011798A JPS61172443A (en) 1985-01-26 1985-01-26 Amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60011798A JPS61172443A (en) 1985-01-26 1985-01-26 Amplifier circuit

Publications (2)

Publication Number Publication Date
JPS61172443A true JPS61172443A (en) 1986-08-04
JPH0516692B2 JPH0516692B2 (en) 1993-03-05

Family

ID=11787896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60011798A Granted JPS61172443A (en) 1985-01-26 1985-01-26 Amplifier circuit

Country Status (1)

Country Link
JP (1) JPS61172443A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5147359A (en) * 1974-10-22 1976-04-22 Tokyo Shibaura Electric Co KOSHUHAGOSEI KAIRO

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5147359A (en) * 1974-10-22 1976-04-22 Tokyo Shibaura Electric Co KOSHUHAGOSEI KAIRO

Also Published As

Publication number Publication date
JPH0516692B2 (en) 1993-03-05

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