JPS61166267A - Original read sensor - Google Patents

Abstract

PURPOSE:To attain low cost by preparing a main board having many number of photo cells and a sub-board having a few photo cell number than that of the main board in a contact type read sensor, arranging the main board in a line on an insuation board and arranging the sub-board in a column to the joints so as to reduce bit number of a line memory required for a read system. CONSTITUTION:The main boards 2, 5, 8 formed with photo cell arrays 3, 6, 9 and drive circuit arrays 4, 7, 10 are arranged on the insulation board 1 so that the photo cell arrays 3, 6, 9 are arranged in a line, and the sub-boards 11, 14 formed with photo cell arrays 12, 15 having a few photo cell number than that of the main board and <=100-bit and with drive circuit arrays 13, 16 are arranged to the joints so that the photo cell arrays 3, 6, 9 and the photo cell arrays 12, 15 are opposed to each other and the sub-boards 11, 14 are arranged in a line. the distance. between the main board and the sub-board is selected as 0.1-1.0mm because of the processing accuracy. It is required to select the distance between the photo cell arrays of both the boards as an integal number of multiple of the reading resolution and the distance is selected as <=1mm.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、ファクシミリなどの原稿入力部に使用し、
特にレンズ縮少系を用いず原稿と一対一に対して原稿を
読取る密着型の原稿読取りセンサに関するものである。[Detailed Description of the Invention] [Industrial Application Field] This invention is used in a document input section of a facsimile machine, etc.
In particular, the present invention relates to a contact type document reading sensor that reads a document one-on-one without using a lens reduction system.

〔発明の概要〕[Summary of the invention]

この発明は密着型の原稿読＠シセンサにおいてフォトセ
ルアレイと走査回路である駆動回路アレイを一体に形成
した主走査方向に長さの異々る基板を２種類用意し、長
い方の基板を複数個、絶縁基板上に直線上に配列し、そ
の継ぎ口部に咄記基板とは列状に短い方の基板を配列し
、ラインバッファメモリの規模を低減できるようにした
ものである。This invention uses two types of substrates with different lengths in the main scanning direction on which a photocell array and a drive circuit array (scanning circuit) are integrally formed in a contact type original reading @shi sensor, and a plurality of substrates with the longer length are used. , are arranged in a straight line on an insulating substrate, and short substrates are arranged in a row at the joint part of the memory board, so that the scale of the line buffer memory can be reduced.

〔従来の技術〕[Conventional technology]

第２図Ｆｉ、従来の原稿読取シセンサの平面図を示すも
ので、絶縁基板２１上に、光信号を光電変換するフォト
セルを複数配列したフォトセルアレイ２５，２６．２９
と、フォトセル出方を順次読出すための駆動回路列２４
，２７．５０が、それぞれ同−憂の基板２２，２５．２
８に一体に形成されていて、基板２２，２５．２８は７
オトセルアレイ２５，２６．２９の配列された側の長辺
を向い合わせるようにして列状に配されている。FIG. 2 Fi shows a plan view of a conventional document reading sensor, in which photocell arrays 25, 26, 29 are arranged on an insulating substrate 21, and a plurality of photocells for photoelectrically converting optical signals are arranged.
and a drive circuit array 24 for sequentially reading out the photocell output direction.
, 27.50 are the same boards 22 and 25.2, respectively.
8, and the substrates 22, 25, 28 are integrally formed with 7.
The Otocell arrays 25, 26, and 29 are arranged in a row with the long sides facing each other.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

第２図の従来例で、隣シ合う基板２２．２５に形成され
たフォトセルアレイ２５と２６の距離は、原稿トの間に
挿入されたセルフォックレンズアレイを一本で済ます必
要かパら故■以内とするのが通常である。いまこれを１
■とし、センサの解像度を１６本／Ｗとすると、フォト
セルアレイ２５゜及び２９と２５は最大副走査方向に１
６ライン異なった原稿の場所を読むことになる。このた
め読取ジシステムハ、フォトセルアレイ２５０了レイ数
と、上記ライン数（１６）と、階調ビット数を掛は合わ
せた数のラインメモリを必要とし、低価格化を妨げてい
た。In the conventional example shown in FIG. 2, the distance between the photocell arrays 25 and 26 formed on adjacent substrates 22 and 25 is determined by the distance between the photocell arrays 25 and 26 formed on adjacent substrates 22 and 25 because it is not necessary to use only one Selfoc lens array inserted between the originals. It is normal to keep it within ■. Now this is 1
2, and the sensor resolution is 16 lines/W, the photocell array 25° and 29 and 25 have a maximum width of 1 in the sub-scanning direction.
You will be reading six different lines of the manuscript. For this reason, the reading system requires a number of line memories equal to the sum of the number of rays in the photocell array 250, the number of lines (16), and the number of gradation bits, which hinders cost reduction.

また、基板２２，２５．２８の長さは、それぞれ重複部
分を必要とするため、その和は全体で必要とする長さよ
り大きくなる。このため、製造上ウェハー内からの取れ
個数が減ると共に歩留シの低下を招いていた。Further, since the lengths of the substrates 22, 25, and 28 each require an overlapping portion, the sum thereof becomes larger than the total length required. For this reason, the number of wafers that can be removed from the wafer during manufacturing is reduced, and the yield rate is also lowered.

〔問題点を解決するための手段〕[Means for solving problems]

フォトセルアレイと駆動回路プレイを一体に形成した基
板を２種類用意し、一方がフォトセル数が多い主基板で
、他方がフォトセル数が１００ビツト以下で主基板よシ
少ない副基板で、主基板を直線上に配列し、その継ぎ目
に、列状にかつ主基板上と副基板上の７オトセルの距離
が１６以下であるように副基板をガラス、あるいはアル
ミナなどの絶縁基板上に配した。Two types of substrates are prepared in which the photocell array and drive circuit board are integrally formed, one is the main substrate with a large number of photocells, and the other is a sub-board with the number of photocells less than 100 bits and smaller than the main substrate. were arranged in a straight line, and the sub-substrates were arranged on an insulating substrate such as glass or alumina at the joints in a row so that the distance between the seven cells on the main substrate and the sub-substrate was 16 or less.

〔実施例〕〔Example〕

第１図は本発明の原稿読取シセンサの平面図であって、
ガラスあるいはアルミナなどの絶縁基板Ｉ上Ｋ　、アモ
ルファスシリコンのショットキ型、あるいは単結晶シリ
コンのＰＮ型などで成るフォ）−ｔ！ルノ７Ｌ／イであ
るフォトセルアレイ３，６゜９及び、スイッチ、シフト
レジスタ、あるいはＣＣＤ用の転送電極などであるｆｆ
ｉ勤回路アレイ４゜７．１０を形成した単結晶シリコン
がどの主基板２．５．８を７オトセルアレイ５，６．９
が一直線に並ぶよう配列し、その継ぎ目部分に、主基板
２．５．８上に形成されたフォトセルアレイ３゜６．９
よシフオドセル数の少ないフォトセルアレイ１２．１５
．同じく駆動回路丁レイ１５．１６を形成した生着＠２
．５．８と同じ材料である副基板１１，１４をフォトセ
ルアレイ５，６．９及びフォトセルアレイ１２．１５が
向かい合い、かつ副基板＋１．、Ｉ’４が一直線に並ぶ
よう配列する。FIG. 1 is a plan view of a document reading sensor of the present invention,
It is made of an insulating substrate I such as glass or alumina, a Schottky type of amorphous silicon, or a PN type of single crystal silicon. Photocell array 3, 6゜9, which is Luno 7L/I, and ff, which is a switch, shift register, or transfer electrode for CCD, etc.
Which main substrate 2.5.8 is the monocrystalline silicon that formed the i-function circuit array 4° 7.10 7 Otocell array 5, 6.9
The photocell array 3.5.8 is arranged in a straight line, and the photocell array 3.5.8 is formed on the main substrate 2.5.8 at the joint.
Photocell array with a small number of shift cells 12.15
．． Engraftment @2 which also formed the driving circuit Dingray 15.16
．． The photocell arrays 5, 6.9 and the photocell array 12.15 face the sub-substrates 11 and 14, which are made of the same material as in 5.8, and the sub-substrates +1. , I'4 are arranged in a straight line.

主基板２．５及び５．８の間隔は小さいことが好ましい
が、切り出しの加工精度上がらＯ，１〜１・０■程度に
するのが艮い。主基板２，５．８と副基板１．１．、＋
４の間隔はレンズ系として一本のセルフォックレンズア
レイを用いることが通常であり、セルフォックレンズア
レイの厚みは標準で４．８■であシ像の伝送幅であるス
リット幅はそれ以上敗れるが、この間隔を大きくするこ
とは、この間に入る読＠シデータを一旦ラインメモリに
保持する必要があるため好ましくなく、主基板、及び副
基板の加工精度上からＱ、１〜１．０■程度にするのが
艮い。また両者のフオセル了しイ間の間隔は読取シ解像
度の整数倍とする必要かあυ８本／Ｗの場合は［１１２
５，［１２５０，０，５７５＝１，０００ｍのいずれか
、１６本／■の場合はａｏ　６２５゜ＣＬｔ２５．　α
１８７５・・・・・・１９口００■のいずれかとなる。Although it is preferable that the distance between the main substrates 2.5 and 5.8 be small, it is best to set it to about 0.1 to 1.0 cm in order to improve cutting accuracy. Main board 2, 5.8 and sub board 1.1. ,+
With a spacing of 4, it is normal to use one SELFOC lens array as a lens system, and the standard thickness of the SELFOC lens array is 4.8mm, and the slit width, which is the transmission width of the image, cannot be larger than that. However, it is not preferable to increase this interval because it is necessary to temporarily hold the reading @shi data that enters this interval in the line memory, and from the viewpoint of processing accuracy of the main board and sub-board, Q is about 1 to 1.0 cm. It's weird to do that. Also, the interval between the two photocells needs to be an integral multiple of the reading resolution.
5, [1250, 0,575 = 1,000m, if 16 lines/■, ao 625°CLt25. α
1875...It will be one of 19 units 00■.

副基板１１．１４に形成されるフォトセルのビット数は
最大Ｉｍである主基板間の間隔を埋める必要と端効果を
考慮して両側にダミービットを配することから解像度が
８本／Ｗの場合最小１６ビット、１６本本口−場合５２
ビツトとし、最大数は経済的理由からそれぞれ５０ビツ
ト、１００ビツト程度にするのが良い。The maximum number of photocell bits formed on the sub-substrates 11 and 14 is Im.Dummy bits are arranged on both sides in consideration of the need to fill the gap between the main substrates and the edge effect, so the resolution is 8 bits/W. case minimum 16 bits, 16 main ports - case 52
For economic reasons, it is preferable to set the maximum number to about 50 bits and 100 bits, respectively.

以上の説明は主基板が３個、副基板が２個であったが本
発明はこれにとられれる必要はなく主基板は２個以上何
個でも、副基板は主基板よシ１個少ないいずれの場合に
も有効である。In the above explanation, the number of main boards is three and the number of sub boards is two, but the present invention does not need to be limited to this, and the number of main boards may be two or more, and the number of sub boards is one less than the main board. It is effective in either case.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、２列の列状に配されたフォトセルアレ
イのうち一方の列のフォトセルの数を大幅に低減できる
ので、読＠シシステムとして必要となるライ、ンメモリ
のビット数が低減出来る。また、他の列のフォトセルア
レイもその列の中で重複させる必要が橙くなυ従来より
短かくすることが可能であシフオドセルアレイと駆動回
路を一体、−６− に形成した比較的長い基板自体の高収率化を可能とし、
全体として装置の低価格化に貢献でき、７アクシミ１１
、あるいはコンピュータ周辺のスキャナなどの普及に役
立つことが出来る。According to the present invention, the number of photocells in one of the two columns of photocell arrays can be significantly reduced, reducing the number of line memory bits required for the reading system. I can do it. In addition, there is no need to overlap the photocell arrays in other columns within that column, and it is possible to make them shorter than conventional ones. Enables high yield of the substrate itself,
Overall, it contributes to reducing the cost of the device, and
It can also be useful for the spread of scanners around computers.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の原稿読取シセンサの平面図、第２図は
従来の原稿読ＩＲＪ）センサの平面図である。 １・・・絶縁基板 ２．５．８・・・主基板 ５．６，９，１２．１５・・・フォトセルアレイ４．７
．＋０．１５．１６・・・駆動回路アレイ１１、．１４
・・・副基板 以　　　上 出願人　セイコー電子工業株式会社 原ｊ向漉駅′）πンサの平面図 ３１図 罠素の＃禍椛Ｈ又’ｌｔンサの千面図 第２図FIG. 1 is a plan view of a document reading sensor according to the present invention, and FIG. 2 is a plan view of a conventional document reading IRJ sensor. 1... Insulating substrate 2.5.8... Main substrate 5.6, 9, 12.15... Photocell array 4.7
．． +0.15.16...Drive circuit array 11, . 14
... Sub-board or above Applicant: Seiko Electronic Industries Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 原稿と１対１に対応し、フォトセルとフォトセルの駆動
回路を一体に形成した基板を、複数個列状に絶縁基板上
に搭載した原稿読取りセンサにおいて、前記基板がフォ
トセル数の多い主基板と、フォトセル数が少なく１００
ビット以下の副基板の２種類あつて、前記主基板を直線
上に配列し、その継ぎ目に、列状にかつ主基板上と副基
板上のフォトセルの距離が１ｍｍ以下であるように副基
板上に配したことを特徴とする原稿読取りセンサ。In a document reading sensor in which a plurality of substrates in which photocells and photocell drive circuits are integrally formed in one-to-one correspondence with the document are mounted on an insulating substrate in a row, the substrate is the main substrate with a large number of photocells. The number of substrates and photocells is less than 100.
There are two types of sub-substrates for bits and below, the main substrates are arranged in a straight line, and the sub-substrates are arranged in a row at the joint so that the distance between the photocells on the main substrate and the sub-substrate is 1 mm or less. A document reading sensor characterized by being placed on top.