JPS61164318A - Variable attenuation circuit - Google Patents
Variable attenuation circuitInfo
- Publication number
- JPS61164318A JPS61164318A JP638985A JP638985A JPS61164318A JP S61164318 A JPS61164318 A JP S61164318A JP 638985 A JP638985 A JP 638985A JP 638985 A JP638985 A JP 638985A JP S61164318 A JPS61164318 A JP S61164318A
- Authority
- JP
- Japan
- Prior art keywords
- trs
- transistors
- current
- transistor
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Networks Using Active Elements (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は電子回路に広く利用される可変減衰回路に関す
るものであり、大信号に対しても低歪率の可変減衰回路
を提供するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a variable attenuation circuit widely used in electronic circuits, and provides a variable attenuation circuit with low distortion even for large signals.
従来の技術
第２図は従来例の差動増幅器型可変減衰回路である。端
子Ｃの電圧ｖｃがトランジスタＱ５．Ｑ４およびダイオ
ード接続のトランジスタＱ５．Ｑ６と、抵抗Ｒ２〜Ｒ４
とからなる差動増幅回路によってトランジスタＱｓ、Ｑ
ｂの各ベース・エミッタ間電圧ｖＢｘに変換され、これ
らの電圧は制御電圧としてトランジスタＱ＋、Ｑｚのベ
ースに印加される。この電位差に応じて信号電流工、が
トランジスタＱ１と同Ｑ２とに分配され、負荷抵抗Ｒ４
の端子りには減衰した出力が現われる。なお、抵抗Ｒ５
，Ｒ６はバイアス用抵抗である。BACKGROUND OF THE INVENTION FIG. 2 shows a conventional differential amplifier type variable attenuation circuit. The voltage vc at terminal C is applied to transistor Q5. Q4 and diode-connected transistor Q5. Q6 and resistors R2 to R4
A differential amplifier circuit consisting of transistors Qs, Q
b is converted into each base-emitter voltage vBx, and these voltages are applied as control voltages to the bases of transistors Q+ and Qz. According to this potential difference, the signal current is distributed between the transistors Q1 and Q2, and the load resistor R4
Attenuated output appears at the terminal. In addition, resistance R5
, R6 are bias resistors.
発明が解決しようとする問題点
通常の動作条件では互いの差動回路は、工、ｚＩｏ、ｈ
、、：１００であり、この場合には歪率は約０．５％と
なる。歪みは近似的にＩ８／２１゜ｈ□で与えられ、Ｉ
ｇの増加またはｈ□の低下に伴って回路の歪みが著く増
加する。Problem to be Solved by the Invention Under normal operating conditions, the mutual differential circuits have
, , :100, and in this case, the distortion rate is about 0.5%. The distortion is approximately given by I8/21°h□, and I
As g increases or h□ decreases, the distortion of the circuit increases significantly.
本発明は低歪率の可変減衰回路を提供するものである。The present invention provides a variable attenuation circuit with low distortion.
問題点を解決するための手段
本発明は、要約するに、エミッタ共通接続の第１．第２
のトランジスタのペースに、他の差動型接続された第３
．第４のトランジスタのコレクタ負荷として接続された
第６．第６のトランジスタのペースを接続し、前記第１
のトランジスタのコレクタは直接に、前記第２のトラン
ジスタのコレクタは第１の抵抗を介しそれぞれ電源の他
端に、それぞれ、接続し、前記第６．第６のトランジス
タに対して帰還増幅動作となるように第７．第８のトラ
ンジスタを接続した構成の可変減衰回路である。Means for Solving the Problems The present invention, in summary, provides that the first . Second
The other differentially connected third
．． The sixth transistor connected as a collector load of the fourth transistor. Connect the pace of the sixth transistor and the first
The collector of the sixth transistor is directly connected to the other end of the power supply through the first resistor, and the collector of the second transistor is connected to the other end of the power supply through the first resistor. The seventh transistor performs feedback amplification operation for the sixth transistor. This is a variable attenuation circuit configured to connect an eighth transistor.
作用
本発明により、従来の問題点を解決し、大信号を低電流
の制御回路で低歪率に減衰させることが可能になった。The present invention solves the conventional problems and makes it possible to attenuate a large signal to a low distortion rate using a low current control circuit.
実施例
本発明の実施例を第１図に示す。端子ムは電源ｖ０゜の
端子、端子Ｂは接地端子、Ｑ、、Ｑ２は信号電流！、を
分配するＰＮＰ ）ランジスタ、Ｒ１は負荷抵抗、端子
りは出力端子である。端子Ｃは制御端子で、この端子の
電圧によりバイアス電流２工０のＨＰＮ トランジスタ
Ｑ ｓ 、 Ｑ ４への分配比が制御される。分配され
たこれらの電流は、ＰＩＰトランジスタＱ５．Ｑ６によ
りｖ！１．に変換され、ＰＮＰトランジスタＱ１．Ｑ２
のペース電位を制御する。EXAMPLE An example of the present invention is shown in FIG. Terminal M is the terminal for the power supply v0°, terminal B is the ground terminal, and Q, , Q2 are the signal currents! , R1 is the load resistance, and terminal R is the output terminal. Terminal C is a control terminal, and the voltage at this terminal controls the distribution ratio of the bias current 2 to 0 to the HPN transistors Q s and Q 4 . These divided currents are passed through PIP transistors Q5. v! by Q6! 1. is converted into PNP transistor Q1. Q2
control the pace potential of
本発明実施例では、従来例回路とくらべると、トランジ
スタＱ５．Ｑ６に対して帰還増幅用に付加したトランジ
スタＱｙ、Ｑａを有するものであり、これらのトランジ
スタは信号電流に比例して変化するトランジスタＱ＋
、Ｑ２のペース電流を１／ｈ□の影響に減じて制御部ト
ランジスタＱ５．Ｑ。In the embodiment of the present invention, compared to the conventional circuit, transistor Q5. It has transistors Qy and Qa added to Q6 for feedback amplification, and these transistors are transistors Q+ that change in proportion to the signal current.
, Q2's pace current is reduced to the effect of 1/h□, and the control transistor Q5. Q.
のコレクタにもどしている。このトランジスタＱ、、Ｑ
８．ｙ−ｉ作により、従来例と比較して歪率を１／１１
□ｔｔｃ少させることができた。It has been returned to the collector. This transistor Q,,Q
8. Due to the y-i design, the distortion rate has been reduced to 1/11 compared to the conventional example.
□ttc was able to be reduced.
発明の効果
本発明により、大信号を低電流の制御回路で、低歪率に
減少させることができる可変減衰器が得られる。Effects of the Invention The present invention provides a variable attenuator that can reduce large signals to a low distortion rate using a low current control circuit.
第１図は本発明の差動増幅器型可変減衰回路図、第２図
は従来例の差動増幅器型可変減衰回路図である。
Ｑ１〜Ｑ８・・・・・・トランジスタ、Ｒ１〜Ｒ６・・
・・・・抵抗、ｖｃｃ・・・・・・電源電圧、ｖＤ・・
・・・・出力電圧、Ｖ、・・・・・・制御電圧、工。・
・・・・・バイアス電流、工、・・・・・・信号電流。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第
１ 図
φ℃
：！ ２ ｘ
ｅｒFIG. 1 is a diagram of a differential amplifier type variable attenuation circuit according to the present invention, and FIG. 2 is a diagram of a conventional differential amplifier type variable attenuation circuit. Q1-Q8...Transistor, R1-R6...
...Resistance, vcc...Power supply voltage, vD...
...output voltage, V, ...control voltage, engineering.・
...Bias current, engineering, ...signal current. Name of agent: Patent attorney Toshio Nakao and 1 other person
1 Figure φ℃:! 2xer
Claims (1)
に、他の差動型接続された第３、第４のトランジスタの
コレクタ負荷として接続された第５、第６のトランジス
タのベースを接続し、前記第１のトランジスタのコレク
タは直接に、前記第２のトランジスタのコレクタは第１
の抵抗を介しそれぞれ電源の他端に、それぞれ、接続し
、前記第５、第６のトランジスタに対して帰還増幅動作
となるように第７、第８のトランジスタを接続したこと
を特徴とする可変減衰回路。connecting the bases of the fifth and sixth transistors connected as collector loads of the third and fourth transistors connected differentially to the bases of the first and second transistors whose emitters are commonly connected; The collector of the first transistor is directly connected to the collector of the first transistor, and the collector of the second transistor is directly connected to the first transistor.
, and seventh and eighth transistors are connected to the other ends of the power supply through resistors respectively, and seventh and eighth transistors are connected to perform feedback amplification operation with respect to the fifth and sixth transistors. attenuation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP638985A JPS61164318A (en) | 1985-01-17 | 1985-01-17 | Variable attenuation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP638985A JPS61164318A (en) | 1985-01-17 | 1985-01-17 | Variable attenuation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61164318A true JPS61164318A (en) | 1986-07-25 |
Family
ID=11637016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP638985A Pending JPS61164318A (en) | 1985-01-17 | 1985-01-17 | Variable attenuation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61164318A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04104549U (en) * | 1991-02-16 | 1992-09-09 | 日本特殊陶業株式会社 | Anti-rotation structure of engine pressure sensor |
-
1985
- 1985-01-17 JP JP638985A patent/JPS61164318A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04104549U (en) * | 1991-02-16 | 1992-09-09 | 日本特殊陶業株式会社 | Anti-rotation structure of engine pressure sensor |
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