JPS61160996A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JPS61160996A
JPS61160996A JP60002352A JP235285A JPS61160996A JP S61160996 A JPS61160996 A JP S61160996A JP 60002352 A JP60002352 A JP 60002352A JP 235285 A JP235285 A JP 235285A JP S61160996 A JPS61160996 A JP S61160996A
Authority
JP
Japan
Prior art keywords
conductor
printed wiring
wiring board
layer
conductive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60002352A
Other languages
Japanese (ja)
Inventor
楠山 弘
山根 悦男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60002352A priority Critical patent/JPS61160996A/en
Publication of JPS61160996A publication Critical patent/JPS61160996A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、導電層と絶縁層とを積層して構成される導電
体を′部品搭載面あるいはハンダ面に密着された印刷配
線基板に関するものである。本発明は、印刷配線基板上
の電源ラインおよびアースラインのインピーダンスを低
減するとともに、シールド効果を有するので、機器から
輻射するノイズの低減および外来ノイズによる機器の影
響を低減する場合に有効なものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a printed wiring board in which a conductor formed by laminating a conductive layer and an insulating layer is closely attached to a component mounting surface or a solder surface. . The present invention reduces the impedance of the power line and ground line on the printed wiring board and has a shielding effect, so it is effective in reducing noise radiated from equipment and reducing the influence of external noise on equipment. be.

従来の技術 近年、機器の輻射雑音の抑制および機器の雑音による誤
動作が大きな問題になっており、機器の雑音余裕度が、
機器の性能の一つとして大きく取i上げられている。
Conventional technology In recent years, suppression of equipment radiation noise and malfunction due to equipment noise have become major issues, and equipment noise tolerance has become increasingly important.
It is widely discussed as one of the performance characteristics of equipment.

機器の雑音性能を決定づける主幹部品である印刷配線基
板においては、従来、雑音余裕度を得る方法として、多
層基板(tIItrA層およびアース層を印刷配線基板
内層部に積層プレス加工を施したもの。以下多層基板と
称す。)が用いられている。
For printed wiring boards, which are the main component that determines the noise performance of equipment, the conventional method for obtaining noise margin is to use a multilayer board (a printed wiring board in which a tIItrA layer and a ground layer are laminated and pressed on the inner layer of the printed wiring board. (referred to as a multilayer substrate) is used.

以下図面を参照しながら、上述の多層基板の一例につい
て説明する。
An example of the above multilayer substrate will be described below with reference to the drawings.

第9図は従来の多層基板の断面図を示したもので、4層
基板を例に挙げている。図において、(1)は絶縁層で
、挙制御転導体層4層の間に3層設けられている。(2
)は表面導体層で、部品搭載面およびハンダ面に設けら
れている。(3)は内PIII#!体層で、電源層およ
びアース層である。(4)はレジストで、表面導体層(
2)を表面絶縁するために用いられている。(5)はス
ルホ−p(各導体層を電気的接続するためメッキを施し
た穴。以下スμホールと称す。)で、(6)はこのスル
ホ−/I/ (5)に挿入されたす−ド線付の部品であ
る。
FIG. 9 shows a cross-sectional view of a conventional multilayer board, taking a four-layer board as an example. In the figure, (1) is an insulating layer, and three layers are provided between four layers of behavior control conductor layers. (2
) is a surface conductor layer, which is provided on the component mounting surface and the solder surface. (3) is inner PIII#! It is a power layer and a ground layer. (4) is a resist, and the surface conductor layer (
2) is used for surface insulation. (5) is a sulfo-p (a plated hole for electrically connecting each conductor layer, hereinafter referred to as a smu hole), and (6) is a sulfo-/I/ inserted into (5). This is a part with a soft wire.

以上のように構成された多層基板について、その形成法
について説明する。先ず、絶縁層(1)に内層導体2層
(3)を接着し、エツチング(全面にある導体層より必
要な導体部分のみ伐して不必要な導体箇所を特殊液によ
シ、露光現象等を施し、化学反応により導体を取シ除く
作用。以下エツチングと称す。)して内層導体2層(3
)からなる両面基板を形成する。次に、内層導体両面基
板の両面に絶縁層(1)と導体層(2)を接着し、穴開
けした後、スμホー1v(5)の形成を行って、導体層
4層(2) (3)間の電気的接続の必要な個所を、メ
ッキ工程によシ接続する。次に、表面導体層(2)をエ
ツチングした後、部品挿入穴およびハンダ付けしない箇
所にレジスト(4)を塗布する。内層導体層(3)は、
一般的に電源層、アース層となるため、信号パターンを
形成せず、導体ベタ仕様となっている。
A method for forming the multilayer substrate configured as described above will be explained. First, the two inner conductor layers (3) are adhered to the insulating layer (1), and etching is performed (cutting off only the necessary conductor parts from the conductor layer on the entire surface, removing unnecessary conductor parts with a special liquid, and removing the effects of exposure to light, etc.) (hereinafter referred to as etching) to remove the conductor through a chemical reaction.
) to form a double-sided substrate. Next, the insulating layer (1) and the conductor layer (2) are bonded to both sides of the inner layer conductor double-sided board, holes are made, and a hole 1v (5) is formed, and the conductor layer 4 layer (2) is formed. (3) The parts where electrical connections are required are connected by a plating process. Next, after etching the surface conductor layer (2), a resist (4) is applied to the component insertion holes and the parts not to be soldered. The inner conductor layer (3) is
Generally, it serves as a power supply layer and a ground layer, so no signal pattern is formed and the conductor is solid.

発明が解決しようとする問題点 しかしながら、上記のような構成では、電源層、アース
層を形成する次め多層構成とな夛、信号層のみの場合、
第9図において表面導体層(2)のみの2PIII構成
に比較してプレス積層工程の追加、エツチング工程2回
追加、内層スルホール(5)接続等が必要となり、大幅
なコストアップが生じている。
Problems to be Solved by the Invention However, in the above configuration, there is a multilayer configuration in which a power layer and a ground layer are formed, and in the case of only a signal layer,
In FIG. 9, compared to the 2PIII structure with only the surface conductor layer (2), an additional press lamination process, two additional etching processes, connection of the inner layer through-holes (5), etc. are required, resulting in a significant increase in cost.

また、表面導体層(2)のみの片面基板または両面基板
の場合は、電源パターン、アースパターンの占有面積が
狭くなり、電源、アースの高インピーダンス化による動
作不安定、雑音余裕度不足等による問題が発生し、多層
基板方式にすることを余・儀なくされてい友。
In addition, in the case of a single-sided or double-sided board with only the surface conductor layer (2), the area occupied by the power supply pattern and ground pattern becomes small, resulting in problems such as unstable operation due to high impedance of the power supply and ground, and insufficient noise margin. Due to this issue, my friend was forced to use a multilayer board method.

本発明は上記問題点VC鑑み、加工法を簡単にしかも安
価に、電源ラインおよびアースラインのインピーダンス
を低減させ、シールド効果が得られる印刷配線基板を提
供することを目的とする。
SUMMARY OF THE INVENTION In view of the above problems with VC, an object of the present invention is to provide a printed wiring board that can be processed simply and inexpensively, reduce the impedance of a power supply line and a ground line, and provide a shielding effect.

問題を解決するための手段 上記問題を解決するため本発明の印刷配線基板は、部品
搭載面においては部品挿入穴を避けた面に、ハンダ面に
おいてはハンダ付け部を避けた面に、導電層と絶縁層と
を積層して構成される導電体を密着させる構成とし念。
Means for Solving the Problems In order to solve the above problems, the printed wiring board of the present invention has a conductive layer on the component mounting surface, which avoids the component insertion hole, and on the soldering surface, which avoids the soldering area. The structure is designed to bring the conductor, which is composed of laminated layers and an insulating layer, into close contact.

作用 本印刷配線基板の構成では、部品搭載面およびハンダ面
に導電体を密着させる箇所は任意に選択可能で、密着方
法も接着剤を使用する方法、接着テープによって固定す
る方法、ハンダ付けにょシ導電体を数箇所に固定する方
法等、任意に選択可能とな9、導電材料も材質、厚み、
寸法等、任意に選択可能である。
In the structure of the printed wiring board, the location where the conductor is placed in close contact with the component mounting surface and the solder surface can be selected arbitrarily, and the methods of adhesion include using adhesive, fixing with adhesive tape, and soldering. The method of fixing the conductor in several places can be selected arbitrarily9, and the conductive material can also be changed depending on the material, thickness,
Dimensions etc. can be selected arbitrarily.

また、例えば信号層のみで構成される印刷配線基板に、
導電層と絶縁層とを積層して構成される導電体を、内層
でなく部品搭載面またはハンダ面の表面導体層に密着あ
るいは固定するため、エツチング工程、プレス加工等の
精密加工を必要とせず、加工法も簡単で、電源ライン、
アースラインのインピーダンスの低下、シールド効果を
得ることができる。
In addition, for example, printed wiring boards consisting only of signal layers,
Because the conductor, which is composed of a laminated conductive layer and insulating layer, is tightly attached or fixed to the surface conductor layer on the component mounting surface or solder surface rather than to the inner layer, there is no need for precision processing such as etching or press processing. , the processing method is simple, and the power line,
It is possible to reduce the impedance of the earth line and obtain a shielding effect.

実施例 以下本発明の一実施例を示す印刷配線基板について、図
面を参照しながら説明する。
EXAMPLE Hereinafter, a printed wiring board showing an example of the present invention will be described with reference to the drawings.

第1図は、本発明の第1の実施例における印刷配線基板
の斜視図、第2図は第1図のイ部拡大図である。図にお
いて、叫は導電体を密着させられる側の印刷配線基板で
、(ロ)は導電体、四は部品挿入する場合の部品挿入穴
、(至)は印刷配線基板QO上に搭載する部品でらシ、
第1図は印刷配線基板叫の部品搭載面側に導電体(ロ)
を密着させた例を示している。導電体(ロ)は導電層<
141と絶縁層(ト)とを積層して構成されており、例
えば一般にシーμド材、導電材として製品化されている
ものを必要な大きさく加工することによって得られる。
FIG. 1 is a perspective view of a printed wiring board according to a first embodiment of the present invention, and FIG. 2 is an enlarged view of the part A in FIG. In the figure, the cursor is the printed wiring board on the side where the conductor can be brought into close contact, (b) is the conductor, 4 is the component insertion hole for inserting components, and (to) is the component to be mounted on the printed wiring board QO. Rashi,
Figure 1 shows a conductor (b) on the component mounting side of the printed wiring board.
An example is shown in which the two are placed in close contact with each other. The conductor (b) is a conductive layer <
141 and an insulating layer (G), for example, it is obtained by processing a material that is generally commercialized as a seed material or a conductive material into a required size.

その際、外形加工は面積を自由に選択できるため精密加
工を必要としない。次K、印刷配線基板四の部品(至)
を挿入する個所に導電体(ロ)を密着させる場合は、該
導電体(ロ)に、部品挿入可能でしかも部品四のリード
線と電気的接続されない位置に適当な径で穴開けを行う
。この場合、部品挿入六輪の内周面に従来のように7c
μホールメツキを施す必要がないため、パンチング加工
等で穴開けを行うことができる。
At this time, precision machining is not required because the area can be freely selected for external shape machining. Next K, printed wiring board 4 parts (to)
If the conductor (B) is to be brought into close contact with the part where the part 4 is to be inserted, make a hole of an appropriate diameter in the conductor (B) at a position where the part can be inserted but is not electrically connected to the lead wire of part 4. In this case, as in the conventional case, 7c
Since there is no need to perform μ-hole plating, holes can be made by punching, etc.

このように加工した導電体(ロ)に、第2図に示される
ように、密着する側に接着剤QQを塗布する。
As shown in FIG. 2, adhesive QQ is applied to the conductor (b) processed in this way on the side that will be in close contact with the conductor (b).

これ罠より、印刷配線基板αQの部品搭載面に導電体Q
]Jt−密着させることができる。
From this trap, a conductor Q is placed on the component mounting surface of the printed wiring board αQ.
]Jt-Can be brought into close contact.

次に印刷配線基板(10のハンダ面側に導電体αηを密
着させる方法について図面を参照しながら説明する。
Next, a method of bringing the conductor αη into close contact with the solder side of the printed wiring board (10) will be explained with reference to the drawings.

第3図は印刷配線基板αQのハンダ面に部品(2)のリ
ード線がハンダ付けされ次状態を示している。
FIG. 3 shows the next state in which the lead wires of component (2) are soldered to the solder surface of the printed wiring board αQ.

通常片面印刷配線基板αQは、ハンダ面のみパターン印
刷され、銅箔パターンと部品リード線とがハンダ付けさ
れ、電気的接続される。第4図は導電体(6)を印刷配
線基板αQのハンダ面に密着させた図である。導電体(
ロ)の加工法は部品搭載面に密着させる場合と同じでア
シ、その例を第4図に示す。
Normally, a single-sided printed wiring board αQ has a pattern printed only on the solder side, and the copper foil pattern and component lead wires are soldered and electrically connected. FIG. 4 shows the conductor (6) in close contact with the solder surface of the printed wiring board αQ. conductor(
The processing method for (b) is the same as that used for making the parts adhere to the mounting surface. An example of this is shown in Fig. 4.

すなわち、導電体■には部品挿入可能でしかも部品Uの
リード線と電気的接続されない位置に適当な径の部品挿
入穴(ロ)が開けられている。
That is, a component insertion hole (B) of an appropriate diameter is made in the conductor (2) at a position where the component can be inserted and which is not electrically connected to the lead wire of the component (U).

次に、導電体(6)の導電層(ロ)と印刷配線基板αQ
の電源あるいはアース銅箔パターンを電気的接続する方
法について説明する。−例として印刷配線基板αqのハ
ンダ面に導電体(ロ)を密着させた場合、ハンダ付けに
よって導電体αυの導電層α勾とハンダ面パターンを接
続する場合について図面を用いて説明する。第5図、第
7図は導電体α])を印刷配線基板αQに密着させた状
態の斜視図であり、第7図、第8図は印刷配線基板αq
と導電体回のハンダ付け後の状態を示す。なお図中、(
至)はハンダ付部である。第5図〜第8図において二つ
の部品挿入穴(2)が描かれているが、それぞれ左側が
導電体αMの゛導電層Q4と、印刷配線基板αQのハン
ダ面銅箔パターン(ロ)をハンダ付けしない場合を示し
、右側がハンダ付けした場合を示している。導電体(6
)の導電層α4t−露出させる方法は、2層の絶縁層(
至)と導電層α4を積層する場合に導電層(14が露出
するような形状とする方法と、絶縁層(至)をレジスト
インク等で塗布または印刷する場合に版の形状を導側1
勾が露出するような形状とする方法等がある。したがっ
て、このような方法で第6図、第8図に示すように、電
気的接続の必要な箇所のみ、導電体(6)の導電層へ4
を露出させることにより、ハンダ付けによる電気的接続
が可能となる。
Next, the conductive layer (b) of the conductor (6) and the printed wiring board αQ
This section explains how to electrically connect the power supply or ground copper foil pattern. - As an example, when a conductor (b) is brought into close contact with the solder surface of a printed wiring board αq, a case will be described using the drawings in which the conductive layer α of the conductor αυ and the solder surface pattern are connected by soldering. 5 and 7 are perspective views of the conductor α) in close contact with the printed wiring board αQ, and FIGS. 7 and 8 are the printed wiring board αq
and shows the state of the conductor circuit after soldering. In the figure, (
) is the soldered part. In Figures 5 to 8, two component insertion holes (2) are drawn, and the left side is the conductive layer Q4 of the conductor αM and the copper foil pattern (b) on the solder surface of the printed wiring board αQ. The case without soldering is shown, and the right side shows the case with soldering. Electric conductor (6
The method for exposing the conductive layer α4t of the two-layer insulating layer (
When laminating the conductive layer (14) and the conductive layer α4, the shape of the plate is changed to expose the conductive layer (14), and when the insulating layer (14) is coated or printed with resist ink etc., the shape of the plate is changed to
There are methods such as creating a shape that exposes the slope. Therefore, as shown in FIG. 6 and FIG.
By exposing this, electrical connections can be made by soldering.

印刷配線基板αqの部品搭載面側において、電気的接続
する場合も同様にハンダ付けする方法が考えられるが、
部品搭載面においてはビス締め等の方法により、導電体
(ロ)の導電層α◆露出部分と印刷配線基板(10の銅
箔パターンを必要に応じて電気的接続することが可能で
ある。また、ビス締めおよびハンダ付け等により導電体
(ロ)を接着剤を用いて密着させる必要がない場合は、
導電体(6)から接着剤al19ft省くことが可能で
ある。なお、導電体(ロ)において導電層α◆と絶縁層
(ト)の積層数は適宜決定されるものであシ、一定層数
に限られるものではない。
When making electrical connections on the component mounting side of the printed wiring board αq, a similar method of soldering can be considered.
On the component mounting surface, it is possible to electrically connect the exposed portion of the conductive layer α◆ of the conductor (b) and the copper foil pattern of the printed wiring board (10) by tightening screws or the like as necessary. , If it is not necessary to use adhesive to attach the conductor (b) by tightening screws or soldering,
It is possible to omit 19 ft of adhesive from the conductor (6). Note that the number of laminated layers of the conductive layer α◆ and the insulating layer (g) in the conductor (b) is determined as appropriate and is not limited to a certain number of layers.

発明の効果 以上本発明の印刷配線基板によれば、部品搭載面におい
ては部品挿入孔を避けた面に、ハンダ面においてはハン
ダ付け部を避けた面に、導電層と絶縁層とを積層して構
成される導電体を密着させる構成であるので、印刷配線
基板に対してシールド効果を得ることができ、さらに電
源ライン、アースラインと導電体導電層を接続すること
により、電源ツイン、アースラインのインピーダンスの
低下を計ることが可能となる。しかも、従来の多層印刷
配線基板方式と比較して加工法が著しく簡略となシ、材
料費を安価に構成することができる。
Effects of the Invention According to the printed wiring board of the present invention, a conductive layer and an insulating layer are laminated on the component mounting surface, which avoids the component insertion hole, and the soldering surface, which avoids the soldering part. The structure allows the conductor formed by the conductor to be brought into close contact with the printed wiring board, so it is possible to obtain a shielding effect for the printed circuit board.Furthermore, by connecting the power supply line, the ground line, and the conductor conductive layer, the power supply twin, the ground line It becomes possible to measure the decrease in impedance. Moreover, compared to the conventional multilayer printed wiring board system, the processing method is significantly simpler and the material cost can be lowered.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例における導電体を密着さ
せた印刷配線基板の図、第2図は第1図イ部の拡大図で
、導電体の積層をあられした図、第3図は印刷配線基板
のハンダ面の部品リード線をハンダ付けした図、第4図
は印刷配線基板のハンダ面に導電体を密着させた図、第
5図、第6図は導電体導電層を露出する場合としない場
合の二つの形状を対比させ九斜視図および断面図、第7
図、第8図は第5図、第6図に示す構成においてハンダ
付けした場合の斜視図および断面図、第9図は従来の多
層基板の断面図である。 αQ・・・印刷配線基板、(6)・・・導電体、(2)
・・・部品挿入穴、(至)・・・部品、(ロ)・・・導
電層、QFj・・・絶縁層代理人   森  本  義
  弘 第1図 第2図 第3図 第4図 第5図    第6図 第7図     第1図
FIG. 1 is a diagram of a printed wiring board with conductors in close contact with each other in the first embodiment of the present invention, FIG. 2 is an enlarged view of part A in FIG. The figure shows the component lead wires soldered on the solder side of the printed wiring board, Figure 4 shows the conductor in close contact with the solder side of the printed wiring board, and Figures 5 and 6 show the conductor conductive layer. A perspective view and a cross-sectional view comparing the two shapes with and without exposure, No. 7
8 are a perspective view and a cross-sectional view of the structure shown in FIGS. 5 and 6 when soldered, and FIG. 9 is a cross-sectional view of a conventional multilayer board. αQ...Printed wiring board, (6)...Conductor, (2)
...Component insertion hole, (To)...Component, (B)...Conductive layer, QFj...Insulating layer agent Yoshihiro MorimotoFigure 1Figure 2Figure 3Figure 4Figure 5 Figure 6 Figure 7 Figure 1

Claims (1)

【特許請求の範囲】[Claims] 1、部品搭載面においては部品挿入穴を避けた面に、ハ
ンダ面においてはハンダ付け部を避けた面に、導電層と
絶縁層とを積層して構成される導電体を密着させた印刷
配線基板。
1. Printed wiring in which a conductor made by laminating a conductive layer and an insulating layer is closely attached to the component mounting surface avoiding the component insertion hole, and the soldering surface avoiding the soldering part. substrate.
JP60002352A 1985-01-09 1985-01-09 Printed wiring board Pending JPS61160996A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60002352A JPS61160996A (en) 1985-01-09 1985-01-09 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60002352A JPS61160996A (en) 1985-01-09 1985-01-09 Printed wiring board

Publications (1)

Publication Number Publication Date
JPS61160996A true JPS61160996A (en) 1986-07-21

Family

ID=11526878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60002352A Pending JPS61160996A (en) 1985-01-09 1985-01-09 Printed wiring board

Country Status (1)

Country Link
JP (1) JPS61160996A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4889353A (en) * 1972-02-29 1973-11-22
JPS52140873A (en) * 1976-05-20 1977-11-24 Matsushita Electric Ind Co Ltd Printed circuit board and method of producing same
JPS57162494A (en) * 1981-03-31 1982-10-06 Hitachi Chemical Co Ltd Method of producing printed circuit board
JPS59175798A (en) * 1983-01-31 1984-10-04 カンパニイ ダンフオルマテイツク ミリテ−ル スパシヤル エ アエロノテイツク Flexible printed circuit board,improving method of printed board and improved printed board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4889353A (en) * 1972-02-29 1973-11-22
JPS52140873A (en) * 1976-05-20 1977-11-24 Matsushita Electric Ind Co Ltd Printed circuit board and method of producing same
JPS57162494A (en) * 1981-03-31 1982-10-06 Hitachi Chemical Co Ltd Method of producing printed circuit board
JPS59175798A (en) * 1983-01-31 1984-10-04 カンパニイ ダンフオルマテイツク ミリテ−ル スパシヤル エ アエロノテイツク Flexible printed circuit board,improving method of printed board and improved printed board

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