JPS61160491U - - Google Patents
Info
- Publication number
- JPS61160491U JPS61160491U JP4322685U JP4322685U JPS61160491U JP S61160491 U JPS61160491 U JP S61160491U JP 4322685 U JP4322685 U JP 4322685U JP 4322685 U JP4322685 U JP 4322685U JP S61160491 U JPS61160491 U JP S61160491U
- Authority
- JP
- Japan
- Prior art keywords
- dot pattern
- character generator
- address
- display device
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000002194 synthesizing effect Effects 0.000 description 1
Description
第1図は表示制御部の回路図、第2図は表示装
置の構成ブロツク図、第3図はキヤラクタジエネ
レータの内部構成図、第4図は属性情報を合成す
るための合成図である。
10……アドレス変換回路、20……演算回路
、30……比較回路、40……キヤラクタジエネ
レータ、50……ブランク情報変換回路、60…
…パラレル・シリアル変換回路。
Fig. 1 is a circuit diagram of the display control unit, Fig. 2 is a block diagram of the configuration of the display device, Fig. 3 is an internal configuration diagram of the character generator, and Fig. 4 is a composition diagram for synthesizing attribute information. . DESCRIPTION OF SYMBOLS 10...Address conversion circuit, 20...Arithmetic circuit, 30...Comparison circuit, 40...Character generator, 50...Blank information conversion circuit, 60...
...Parallel/serial conversion circuit.
Claims (1)
タジエネレータと、表示文字の文字コードを第1
のアドレスに変換するアドレス変換回路と、前記
第1のアドレスと前記ドツトパターンの行または
列を指定する第2のアドレスとで前記キヤラクタ
ジエネレータをアクセスする演算回路と、前記キ
ヤラクタジエネレータから読出したドツトパター
ンをビデオ信号に変換する回路と、前記第2のア
ドレスと予め定められたアドレス値との大小を比
較する比較回路を有した表示装置において、前記
比較手段の比較結果によつて前記キヤラクタジエ
ネレータから読み出したドツトパターンをブラン
ク情報に変換する変換回路を有することを特徴と
する表示装置。 A character generator that stores the dot pattern of display characters and a character generator that stores the character code of display characters.
an arithmetic circuit that accesses the character generator with the first address and a second address that specifies the row or column of the dot pattern; In the display device, the display device includes a circuit for converting the read dot pattern into a video signal, and a comparison circuit for comparing the magnitude of the second address and a predetermined address value. A display device comprising a conversion circuit that converts a dot pattern read from a character generator into blank information.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4322685U JPS61160491U (en) | 1985-03-27 | 1985-03-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4322685U JPS61160491U (en) | 1985-03-27 | 1985-03-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61160491U true JPS61160491U (en) | 1986-10-04 |
Family
ID=30554701
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4322685U Pending JPS61160491U (en) | 1985-03-27 | 1985-03-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61160491U (en) |
-
1985
- 1985-03-27 JP JP4322685U patent/JPS61160491U/ja active Pending
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