JPS61155961U - - Google Patents
Info
- Publication number
- JPS61155961U JPS61155961U JP3864285U JP3864285U JPS61155961U JP S61155961 U JPS61155961 U JP S61155961U JP 3864285 U JP3864285 U JP 3864285U JP 3864285 U JP3864285 U JP 3864285U JP S61155961 U JPS61155961 U JP S61155961U
- Authority
- JP
- Japan
- Prior art keywords
- external memory
- checking
- determining
- change
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009434 installation Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Calculators And Similar Devices (AREA)
Description
図面はこの考案の一実施例を示すもので、第１
図は回路構成を示すブロツク図、第２図はオプシ
ヨンＲＡＭの装着状態をメツセージ表示する場合
の動作内容を示すフローチヤート、第３図はＲＡ
Ｍ容量のチエツクの動作内容を示すフローチヤー
トである。
１１……キー入力部、１２……ＣＰＵ、１３…
…メインＲＡＭ、１４，１５……オプシヨンＲＡ
Ｍ、１６……ＲＡＭ容量チエツク部、１６１……
アドレスレジスタ（ＡＤＤ）、１６２……Ａレジ
スタ、１６３……Ｂレジスタ、１７……ＲＡＭチ
エツク部、１８……表示部、１９……レジスタ部
、１９１……前回容量レジスタ、１９２……今回
容量レジスタ、１９３……データエンド（ＤＥ）
レジスタ、２０……前回／今回比較部、２１……
データエンド（ＤＥ）／今回比較部、２２……メ
ツセージ発生部。
The drawing shows one embodiment of this invention.
The figure is a block diagram showing the circuit configuration, Fig. 2 is a flowchart showing the operation details when displaying a message indicating the installation status of option RAM, and Fig. 3 is a block diagram showing the RA.
This is a flowchart showing the operation details of checking the M capacity. 11...Key input unit, 12...CPU, 13...
...Main RAM, 14, 15...Optional RAM
M, 16...RAM capacity check section, 161...
Address register (ADD), 162...A register, 163...B register, 17...RAM check section, 18...display section, 19...register section, 191...previous capacity register, 192...current capacity register , 193...Data end (DE)
Register, 20... Previous/current comparison section, 21...
Data end (DE)/current comparison section, 22...message generation section.
Claims (1)
手段と、このチエツク手段の結果に応じて上記外
部メモリの装着状態の変化を判断する判断手段と
、この判断手段の判断結果により上記外部メモリ
の接続状態の変化があつた場合にその内容をメツ
セージとして使用者に認識させる認識手段とを具
備したことを特徴とする外部メモリを装着可能な
小型電子機器。 a checking means for checking the installation state of the external memory; a determining means for determining a change in the installation state of the external memory according to the result of the checking means; and a change in the connection state of the external memory according to the determination result of the determining means. 1. A small electronic device to which an external memory can be attached, characterized in that the device is equipped with a recognition means that allows a user to recognize the contents as a message when a message occurs.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3864285U JPS61155961U (en) | 1985-03-18 | 1985-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3864285U JPS61155961U (en) | 1985-03-18 | 1985-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61155961U true JPS61155961U (en) | 1986-09-27 |
Family
ID=30545840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3864285U Pending JPS61155961U (en) | 1985-03-18 | 1985-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61155961U (en) |
-
1985
- 1985-03-18 JP JP3864285U patent/JPS61155961U/ja active Pending
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