JPS61140153A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS61140153A
JPS61140153A JP59260749A JP26074984A JPS61140153A JP S61140153 A JPS61140153 A JP S61140153A JP 59260749 A JP59260749 A JP 59260749A JP 26074984 A JP26074984 A JP 26074984A JP S61140153 A JPS61140153 A JP S61140153A
Authority
JP
Japan
Prior art keywords
cavity
moisture
semiconductor device
substrate
fiber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59260749A
Other languages
Japanese (ja)
Inventor
Hideya Otani
大谷　秀弥
Kazuo Kojima
和夫 小島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59260749A priority Critical patent/JPS61140153A/en
Publication of JPS61140153A publication Critical patent/JPS61140153A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent the infiltration of moisture and the like into a cavity by a method wherein a moisture-impermeable material is adhered to the inner surface of a cavity bored at a required part of a pellet mount cap plate made of fiber-reinforced resin. CONSTITUTION:The package substrate 1 is formed out of glass epoxy, one of fiber-reinforced resin, and a cavity 2 which is the recess is bored nearly at the center of the substrate 1. A through-hole 3, the perforated part, is formed around it, and a wiring 6 to electrically connect a wiring 4 produced by print- forming copper or the like on the substrate top with the back electrode 5 is formed on the wall surface of the through-hole. A pellet 7 is installed in the cavity 2 with adhesive 8, and said pellet 7 is electrically connected to the above- mentioned wiring 4 with wires 9 of Au or the like and then potted with silicon gel 10. The cavity inner surface is coated with an epoxy resin. one of moisture- impermeable material.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、ペレット取付用基板に関し半導体装置辺信鯨
性向上に適用して有効な技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique that is effective when applied to improving the reliability of semiconductor devices regarding a substrate for attaching pellets.

〔背景技術〕[Background technology]

半導体装置のコスト低減に有効な手段の１つに、パフケ
ージの全部または一部を樹脂で形成することが考えられ
ろ。One of the effective means for reducing the cost of semiconductor devices is to form all or part of the puff cage from resin.

前記パフケージを形成するに適した材料に、いわゆる繊
維強化樹脂がある。Materials suitable for forming the puff cage include so-called fiber-reinforced resins.

繊維強化樹脂の１つであるガラス繊維強化エポキシ樹脂
（以下ガラスエポキシと言う、）は、通常布織されてい
るガラス繊維に未硬化エポキシ樹脂を含浸させた後、加
圧下で加熱して硬化反応を行わせると同時に、板状等の
所定形状に成形することにより、形成することができる
ものである。Glass fiber-reinforced epoxy resin (hereinafter referred to as glass epoxy), which is a type of fiber-reinforced resin, is produced by impregnating uncured epoxy resin into glass fibers, which are usually woven into cloth, and then heating them under pressure to undergo a curing reaction. It can be formed by simultaneously molding it into a predetermined shape such as a plate shape.

前記ガラスエポキシを板状に形成してなるものを、所定
形状に裁断し、その所定部にペレント取付用の凹部であ
るキャビティを穿設してペレット取付基板であるパフケ
ージ基板を形成し、該基板を用いて半導体装置を形成す
ることができる。The glass epoxy plate is cut into a predetermined shape, a cavity for attaching pellets is formed in a predetermined part to form a puff cage substrate which is a pellet attaching substrate, and the substrate is cut into a predetermined shape. A semiconductor device can be formed using this method.

ところが、前記の如くガラスエポキシ樹脂の内部には縦
および横方向に延長するガラス繊維が埋設されており、
咳繊維と樹脂との接着界面は、僅かではあるが水分が浸
透する性質を有している。However, as mentioned above, glass fibers extending vertically and horizontally are buried inside the glass epoxy resin.
The adhesive interface between the cough fiber and the resin has the property of allowing moisture to penetrate, albeit slightly.

したがって、前記の如きパッケージ基板を用いて半導体
装置を形成する場合は、該基板の側面より前記凹部にま
で水分が浸透していき、該凹部に取り付けられているペ
レットの電極または配線等に腐食を生じさせるという問
題があることが本発明者により見い出された。Therefore, when forming a semiconductor device using a package substrate as described above, moisture permeates into the recess from the side surface of the substrate, causing corrosion to the electrodes or wiring of the pellet attached to the recess. The inventors have discovered that there is a problem in that

なお、繊維強化樹脂からなるパッケ−ジ基板については
、株式会社サイエンスフォーラム、昭和５８年１１月２
８日発行の「超ＬＳＩデバイスハンドブックＪ　Ｐ２４
３以下に説明されている。Regarding package substrates made of fiber-reinforced resin, see Science Forum Co., Ltd., November 2, 1982.
“Very LSI Device Handbook J P24” published on the 8th
3 is explained below.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、ペレット取付用基板に関し、半導体装
置の耐湿性向上に通用して前動な技術を提供することに
ある。An object of the present invention is to provide a technology that is useful and proactive in improving the moisture resistance of semiconductor devices regarding a substrate for attaching pellets.

本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

〔発明の概要〕[Summary of the invention]

本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。A brief overview of typical inventions disclosed in this application is as follows.

すなわち、繊維強化樹脂からなるペレット取付用基板の
所定部に穿設されているキャビティの内面に、非透湿性
材料を被着することにより、前記基板何面より該基板内
に埋設されている繊維界面に沿って浸透してい（水分等
を前記非透湿性材料で遮断することができることにより
、キャビティ内への水分等の侵入を防止することができ
、前記　・目的゛が達成されるものである。That is, by applying a moisture-impermeable material to the inner surface of a cavity bored in a predetermined portion of a pellet mounting substrate made of fiber-reinforced resin, fibers embedded in the substrate can be removed from any side of the substrate. By penetrating along the interface (by being able to block moisture etc. with the non-permeable material, it is possible to prevent moisture etc. from entering into the cavity, and the above-mentioned objective is achieved. .

〔実施例１〕 第１図は、本実施例の半導体装置の概略を、そのほぼ中
心を切る面における断面図で示すものである。[Example 1] FIG. 1 schematically shows a semiconductor device of this example in a cross-sectional view taken along a plane cut approximately at the center thereof.

本実施例の半導体装置はいわゆるＬＣＣ型であり、繊維
強化樹脂の１つであるガラスエポキシでパッケージ基板
１が形成され、該基板のほぼ中央に凹部であるキャビテ
ィ２が穿設され、またその周囲には穿孔部であるスルー
ホール３が形成され、該スルーホール壁面には、基板上
面に銅等をプリント形成してなる配＆ｌＩ４と裏面電極
５とを電気的に接続するための配線６が形成されている
。The semiconductor device of this embodiment is a so-called LCC type, and a package substrate 1 is formed of glass epoxy, which is one of fiber-reinforced resins, and a cavity 2, which is a concave portion, is bored approximately in the center of the substrate. A through hole 3 is formed as a perforation, and a wiring 6 is formed on the wall of the through hole to electrically connect the wiring 4 formed by printing copper or the like on the upper surface of the board to the back electrode 5. has been done.

また、前記基板ｌのキャビティ２にはペレット７が接着
剤８で取り付けられ、該ペレット７は金等のワイヤ９で
前記配線４と電気的に接続された後、シリコーンゲル１
０をポツティングすることにより封止されてなるもので
ある。Further, a pellet 7 is attached to the cavity 2 of the substrate 1 with an adhesive 8, and after the pellet 7 is electrically connected to the wiring 4 with a wire 9 made of gold or the like, the silicone gel 1
It is sealed by potting 0.

なお、本実施例の半導体装置は、実装基板上の電極に前
記裏面電極５を半田等で接合することにより、外部との
電気的接続と実装とを同時に行うものである。Note that the semiconductor device of this embodiment is electrically connected to the outside and mounted at the same time by bonding the back electrode 5 to the electrode on the mounting board by soldering or the like.

本実施例の半導体装置の特徴は、前記キャビティ内面に
非透湿性材料の１つであるエポキシ系樹脂１１が被着さ
れていることにある。The semiconductor device of this embodiment is characterized in that an epoxy resin 11, which is one of moisture-impermeable materials, is coated on the inner surface of the cavity.

すなわち、ガラスエポキシからなるパッケージ基板ｌに
は、その裁断面である側面から水分等が埋設ガラス繊維
界面に沿って内部へ浸透していく性質があるため、前記
の如くキャビティ内面に非透湿性材料を被着することに
より、内部へ浸透してきた水分等を前記非透湿性材料で
遮断することができるので、キャビティ２内へ水分等が
侵入することを防止できるものである。In other words, since the package substrate l made of glass epoxy has the property that moisture, etc. permeates into the interior along the buried glass fiber interface from the side surface, which is the cut surface, so as mentioned above, a non-moisture permeable material is used on the inner surface of the cavity. By covering the cavity 2, the non-moisture permeable material can block moisture and the like from penetrating into the cavity 2, thereby preventing moisture and the like from penetrating into the cavity 2.

なお、キャビテイ２内面への非透湿性材料の被着は、た
とえばペースト状の樹脂を前記内面に塗布した後、加圧
下に加熱処理を行うことにより、基板内部にも前記樹脂
を浸透させた気密性の良い状態で行うことができるもの
である。The moisture-impermeable material can be applied to the inner surface of the cavity 2 by, for example, applying a paste-like resin to the inner surface and then performing heat treatment under pressure to create an airtight seal that allows the resin to penetrate into the inside of the substrate. This can be done in good sexual condition.

〔実施例２〕 本実施例２の半導体装置は、前記実施例１とほぼ同様の
ものであり、非透湿性材料に水ガラスを用いていること
に差異があるものである。[Example 2] The semiconductor device of Example 2 is almost the same as Example 1, except that water glass is used as the moisture-impermeable material.

本実施例２の如く、キャビティ内面に水ガラスを被着す
ることにより、半導体装置の耐湿性を一段と向上させる
ことができるものである。By covering the inner surface of the cavity with water glass as in Example 2, the moisture resistance of the semiconductor device can be further improved.

また、被着方法についても前記実施例１とほぼ同様であ
って水ガラスをキャビテイ２内面に塗布した後、加圧下
で加熱処理することにより容易に被着することができる
。Further, the deposition method is almost the same as that in Example 1, and after applying water glass to the inner surface of the cavity 2, it can be easily deposited by heat treatment under pressure.

〔効果〕〔effect〕

（１）、繊維強化樹脂からなるペレット取付基板の所定
部に穿設されているキャビティの内面に、非透湿性材料
を被着することにより、前記基板側面より該基板内に埋
設されている繊維界面を通して浸遇していく水分等を前
記非透湿性材料で遮断することができることにより、キ
ャビティ内への水分等の侵入を防止することができる。(1) By applying a moisture-impermeable material to the inner surface of a cavity drilled in a predetermined portion of a pellet mounting substrate made of fiber-reinforced resin, fibers are embedded in the substrate from the side surface of the substrate. Since the moisture impermeable material can block moisture and the like from penetrating through the interface, it is possible to prevent moisture and the like from entering the cavity.

（２）、前記１）より、キャビティ内に取り付けられて
いるベレットの電極等の腐食を防止することができるの
で、半導体装置の信頼性向上を達成できる。(2) From 1) above, it is possible to prevent corrosion of the electrodes, etc. of the pellet attached within the cavity, and thus it is possible to improve the reliability of the semiconductor device.

（３）、繊維強化樹脂としてガラス繊維強化エポキシ樹
脂を用いることにより、信鱈性の高い半導体装置を安価
に提供することができる。(3) By using glass fiber reinforced epoxy resin as the fiber reinforced resin, a highly reliable semiconductor device can be provided at low cost.

以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

たとえば、非透湿性材料としてエポキシ系樹脂と水ガラ
スとを示したが、これらに限るものでなく、シリコーン
系樹脂等の同様の目的に使用することができる材料であ
れば、無機、有機を問わす如何なる材料であっても良い
。For example, although epoxy resin and water glass are shown as moisture-impermeable materials, they are not limited to these, and any material that can be used for the same purpose, such as silicone resin, can be used regardless of whether it is inorganic or organic. It may be made of any material.

また、ペレットおよびワイヤ等の保護材料としてシリコ
ーンゲルを用いたものについて示したがエポキシ系等の
他の樹脂材料を用いても良いことは言うまでもない。Moreover, although silicone gel is used as a protective material for pellets, wires, etc., it goes without saying that other resin materials such as epoxy resin materials may also be used.

〔利用分野〕[Application field]

以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野である、いわゆるＬＣＣ型
半導体装置に適用した場合について説明したが、それに
限定されるものではなく、たとえば、ビングリッドアレ
イ型または時計やカメラ等に用いられる、いわゆるチン
プオンボード（ＣＯＢ）型の半導体装置、その他繊維強
化樹脂を用いてパフケージが形成される半導体装置であ
れば如何なるものについても通用して有効な技術である
。In the above description, the invention made by the present inventor was mainly applied to a so-called LCC type semiconductor device, which is the background field of application, but the invention is not limited thereto. This technology is applicable and effective for any type of semiconductor device, such as the so-called chimp-on-board (COB) type used in molds, watches, cameras, etc., and other semiconductor devices in which a puff cage is formed using fiber-reinforced resin. be.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本発明による実施例１である半導体装置を示
す断面図である。 １・・・基板、２・・・キャビティ、３・・・スルーホ
ール、４・・・配線、５・・・裏面電極、６・・・配線
、７・・・ベレット、８・・・接着剤、９・・・ワイヤ
、１０・・・シリコーンゲル、１１・・・非透湿性材料
。 第　　１　　図FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Board, 2... Cavity, 3... Through hole, 4... Wiring, 5... Back electrode, 6... Wiring, 7... Bellet, 8... Adhesive , 9... Wire, 10... Silicone gel, 11... Moisture impermeable material. Figure 1

Claims (1)

【特許請求の範囲】 １、繊維強化樹脂で形成されてなるペレット取付基板の
所定部にキャビティが穿設され、該キャビティ内面には
非透湿性材料が被着されている半導体装置。 ２、非透湿性材料が、エポキシ系またはシリコーン系等
の樹脂材料であることを特徴とする特許請求の範囲第１
項記載の半導体装置。 ３、非透湿性材料が、水ガラスであることを特徴とする
特許請求の範囲第１項記載の半導体装置。 ４、繊維強化樹脂が、ガラス繊維強化エポキシ樹脂であ
ることを特徴とする特許請求の範囲第１項記載の半導体
装置。[Scope of Claims] 1. A semiconductor device in which a cavity is formed in a predetermined portion of a pellet mounting substrate made of fiber-reinforced resin, and a moisture-impermeable material is coated on the inner surface of the cavity. 2. Claim 1, characterized in that the moisture-impermeable material is a resin material such as an epoxy-based or silicone-based material.
1. Semiconductor device described in Section 1. 3. The semiconductor device according to claim 1, wherein the moisture-impermeable material is water glass. 4. The semiconductor device according to claim 1, wherein the fiber reinforced resin is a glass fiber reinforced epoxy resin.
JP59260749A 1984-12-12 1984-12-12 Semiconductor device Pending JPS61140153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59260749A JPS61140153A (en) 1984-12-12 1984-12-12 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59260749A JPS61140153A (en) 1984-12-12 1984-12-12 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS61140153A true JPS61140153A (en) 1986-06-27

Family

ID=17352205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59260749A Pending JPS61140153A (en) 1984-12-12 1984-12-12 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS61140153A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61285926A (en) * 1985-06-12 1986-12-16 井関農機株式会社 Threshing and waste straw bundling apparatus
WO1996025763A3 (en) * 1995-02-15 1996-11-07 Ibm Organic chip carriers for wire bond-type chips

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61285926A (en) * 1985-06-12 1986-12-16 井関農機株式会社 Threshing and waste straw bundling apparatus
WO1996025763A3 (en) * 1995-02-15 1996-11-07 Ibm Organic chip carriers for wire bond-type chips

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