JPS61135235A - Antenna system - Google Patents

Antenna system

Info

Publication number
JPS61135235A
JPS61135235A JP25698384A JP25698384A JPS61135235A JP S61135235 A JPS61135235 A JP S61135235A JP 25698384 A JP25698384 A JP 25698384A JP 25698384 A JP25698384 A JP 25698384A JP S61135235 A JPS61135235 A JP S61135235A
Authority
JP
Japan
Prior art keywords
receiver
antenna
input level
impedance matching
matching circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25698384A
Other languages
Japanese (ja)
Inventor
Takeshi Takano
健 高野
Eiji Itaya
英治 板谷
Masahiko Asano
浅野 賢彦
Yasuyuki Oishi
泰之 大石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP25698384A priority Critical patent/JPS61135235A/en
Publication of JPS61135235A publication Critical patent/JPS61135235A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/18Input circuits, e.g. for coupling to an antenna or a transmission line

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

PURPOSE:To minimize the reduction of a reception input level by controlling a variable reactance element of an impedance matching circuit set between an antenna and a receiver so as to secure the maximum input level of the receiver. CONSTITUTION:The received wave is applied to a receiver 3 via an antenna 1 and an impedance matching circuit 2 containing a variable reactance element like a variable capacity diode, etc. to undergo conversion, amplification, etc. of frequency. Then a signal corresponding to the input level of the receiver 3 is extracted through a terminal RSSi and converted into a digital signal by an A/D converter 4 to be applied to a logical circuit 5. The circuit 5 changes the bias voltage which is applied to variable capacity diodes 2-6 and 2-1 via D/A converters 1 and 6 and controls the bias voltage so that the output level of the terminal RSSi of the receiver 3 is maximum. Thus the reduction of the received input level is minimized to avoid a call unable state even in case a human body, etc. get close to the antenna 1.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は移動無線用受信機、例えばVIP帯以上の周波
数で使用する・携帯用受信機のアンテナシステムの改良
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in the antenna system of a mobile radio receiver, for example, a portable receiver used at frequencies above the VIP band.

近年、VHF−11HF帯の携帯用受信機が広く使用さ
れているが、この受信機に使用されるアンテナシステム
は近傍にある人体や外部の物体の影響を受けてアンテナ
インピーダンスが大幅に変化する為、受信機との整合が
崩れて受信レヘルが大幅に低下して通話が不能になる事
がある。
In recent years, portable receivers in the VHF-11HF band have been widely used, but the antenna system used in these receivers is affected by the influence of nearby human bodies and external objects, which causes the antenna impedance to change significantly. , the matching with the receiver may be disrupted and the reception level may drop significantly, making it impossible to make calls.

そこで、この様な事態が発生する可能性の少ないアンテ
ナシステムが要望されている。
Therefore, there is a need for an antenna system that is less likely to cause such a situation.

〔従来の技術〕[Conventional technology]

一般に、携帯用受信機のアンテナとして%波長のスリー
ブアンテナ、A波長のホイップアンテナ又はループアン
テナ等が用いられているが、これらのアンテナのアンテ
ナインピーダンスは近傍にある人体や物体の影響を受け
て大幅に変化する。
In general, % wavelength sleeve antennas, A wavelength whip antennas, or loop antennas are used as antennas for portable receivers, but the antenna impedance of these antennas is significantly affected by nearby human bodies and objects. Changes to

この為、受信機とアンテナとの間に挿入されインピーダ
ンス整合回路は、アンテナインピーダンスと受信機入力
インピーダンスとの整合を取る事が不可能となり、受信
入力レベルが大幅に低下する。
For this reason, an impedance matching circuit inserted between the receiver and the antenna is unable to match the antenna impedance and the receiver input impedance, resulting in a significant drop in the reception input level.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記で説明した様に、アンテナの近傍にある人体等の影
響によって生じたアンテナインピーダンスの大幅な変化
により、アンテナと受信機との間で大きなインピーダン
ス不整合が生じ、受信レヘルが大幅に低下するので相手
局との通話が不可能になる事があると云う問題点があっ
た。
As explained above, a large change in antenna impedance caused by the influence of a human body, etc. near the antenna causes a large impedance mismatch between the antenna and the receiver, which significantly reduces the reception level. There was a problem in that it was sometimes impossible to talk to the other station.

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題点は、受信機への入力レベルが最大になる様
にインピーダンス整合回路に挿入した可変リアクタンス
素子のリアクタンス値を制御する本発明のアンテナシス
テムにより解決される。
The above problems are solved by the antenna system of the present invention, which controls the reactance value of the variable reactance element inserted in the impedance matching circuit so that the input level to the receiver is maximized.

〔作用〕[Effect]

本発明は人体等がアンテナの近傍に来る事によって生ず
るアンテナインピーダンスの変化を、自動的に吸収する
インピーダンス整合回路を設けて、受信人力レベルの低
下を防止する様にした。
The present invention provides an impedance matching circuit that automatically absorbs changes in antenna impedance caused by a human body coming close to the antenna, thereby preventing a decrease in the reception power level.

即ち、従来のインピーダンス整合回路はアンテナインピ
ーダンスの変化に対応してアンテナと受信機との間の整
合を取り直す事が困難な為、このアンテナインピーダン
スの変化を吸収する事は出来なかった。
That is, conventional impedance matching circuits cannot absorb changes in antenna impedance because it is difficult to re-match between the antenna and the receiver in response to changes in antenna impedance.

しかし、本発明のインピーダンス整合回路は可変リアク
タンス素子を挿入して受信レベルが最大になる様に、こ
の可変リアクタンス素子のりアクタンス値を制御する様
にした。
However, in the impedance matching circuit of the present invention, a variable reactance element is inserted and the actance value of the variable reactance element is controlled so that the reception level is maximized.

そこで、アンテナと受信機との間のインピーダンスの不
整合によるレベルの低下を最小にする事ができるので、
通話不能は殆どなくなる。
Therefore, it is possible to minimize the drop in level due to impedance mismatch between the antenna and receiver.
Unable to make calls will almost disappear.

〔実施例〕〔Example〕

以下図示実施例により、本発明の要旨を具体的に説明す
る。尚、全図を通じて同一符号は同一対象物を示す。
The gist of the present invention will be specifically explained below with reference to illustrated examples. Note that the same reference numerals indicate the same objects throughout the figures.

第1図は本発明の1実施例のブロック図、第2図はシス
テム動作フロー図を示す。
FIG. 1 shows a block diagram of one embodiment of the present invention, and FIG. 2 shows a system operation flow diagram.

第1図において、受信波はアンテナ1.可変リアクタン
ス素子(例えば可変容量ダイオード)を含む例えばπ型
のインピーダンス整合回路2を介して受信機3に加えら
れる。
In FIG. 1, received waves are received from antenna 1. The signal is applied to the receiver 3 via, for example, a π-type impedance matching circuit 2 that includes a variable reactance element (for example, a variable capacitance diode).

この受信波は受信機3で周波数変換、増幅等の処理を受
けるが、受信機入力レベルに対応する信号〔例えば受信
機内のAGC付き中間周波増幅器(図示せず)のAGC
@圧を対数増幅器(図示せず)を通して線形化した信号
〕が端子R3Siより取出されアナログ/ディジタル変
換回路4でディジタル化され、論理回路5に加えられる
This received wave is subjected to processing such as frequency conversion and amplification in the receiver 3, but a signal corresponding to the receiver input level [for example, AGC of an intermediate frequency amplifier with AGC (not shown) in the receiver
A signal obtained by linearizing the @ pressure through a logarithmic amplifier (not shown) is taken out from the terminal R3Si, digitized by the analog/digital conversion circuit 4, and applied to the logic circuit 5.

論理回路5では第2図に示したシステム動作フローによ
り、先ずインピーダンス整合回路2の中の可変容量ダイ
牙−ド2−1の印加電圧を下記の手順で決定する。、 ■ 可変容量ダイオード2−1 、2−2に初期電圧V
ol、 Vo2を印加し、端子R5S iのレベルを測
定する。
The logic circuit 5 first determines the voltage applied to the variable capacitance diode 2-1 in the impedance matching circuit 2 according to the system operation flow shown in FIG. 2 in the following procedure. , ■ Initial voltage V on variable capacitance diodes 2-1 and 2-2
ol and Vo2 are applied, and the level of terminal R5S i is measured.

■ Vol の電圧のみΔVo1 だけ増加して端子R
5S iのレベルを測定し、前の値と比較する。この時
、・増加していれば、これを繰返す。
■ Vol voltage only increases by ΔVo1 and terminal R
Measure the level of 5S i and compare with the previous value. At this time, if it is increasing, repeat this.

・前の値より下がれば、ΔVolの極性を反転してVo
に印加して繰返す。
・If it falls below the previous value, reverse the polarity of ΔVol and set Vo
Apply and repeat.

・極大なら、Volを固定する。・If it is maximum, fix the Vol.

これで、可変容量ダイオード2−1のバイアス電圧は最
適に設定されたので、次に可変容量ダイオード2−2の
最適バイアス電圧を同じ様な手順で決定する。
Now that the bias voltage of the variable capacitance diode 2-1 has been optimally set, next, the optimal bias voltage of the variable capacitance diode 2-2 is determined using the same procedure.

尚、可変リアクタンス素子として可変容量ダイオードを
使用した場合、スミスチャート上で90%以上の領域を
電子的にカバーする事が可能である。
Note that when a variable capacitance diode is used as the variable reactance element, it is possible to electronically cover more than 90% of the area on the Smith chart.

又、論理回路5よりのディジタル出力を可変容量ダイオ
ードのバイアス電圧に変換する為、ディジタル/アナロ
グ変換回路6及び7を使用している。
Furthermore, digital/analog conversion circuits 6 and 7 are used to convert the digital output from the logic circuit 5 into a bias voltage for the variable capacitance diode.

第3図は本発明の別の1実施例のブロック図を示す。FIG. 3 shows a block diagram of another embodiment of the invention.

図に示す様に端子R5SiよりのAGC電圧はディジタ
ル信号に変換しないで直流増幅器8で増幅し、端子R5
Siよりのレベルが最大になる様に可変容量ダイオード
2−1のバイアス電圧を制御する。
As shown in the figure, the AGC voltage from the terminal R5Si is amplified by the DC amplifier 8 without being converted into a digital signal, and the AGC voltage from the terminal R5Si is amplified by the DC amplifier 8.
The bias voltage of the variable capacitance diode 2-1 is controlled so that the level from Si is maximized.

この場合、コンデンサ2−3に直列に可変容量ダイオー
ドを接続して、直流増幅器8の出力電圧で2つの可変容
量ダイオードのバイアス電圧を制御する事もできる。
In this case, it is also possible to connect a variable capacitance diode in series with the capacitor 2-3 and control the bias voltage of the two variable capacitance diodes using the output voltage of the DC amplifier 8.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明した様に、携帯用受信機のアンテナが人
体等の近傍に設置されても、受信機入力インピーダンス
との整合がほぼ取れる様になっているので、受信入力レ
ベルの低下は最小に押えられ、通話不能は殆ど無くなる
と云う効果が得られる。
As explained in detail above, even if the antenna of a portable receiver is installed near the human body, it can almost match the input impedance of the receiver, so the drop in the received input level is minimized. This has the effect of almost eliminating the possibility of being blocked and unable to make a call.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のブロック図、 第2図は本発明の動作フロー、 第3図は本発明の別のブロック図を示す。 図において、 ■はアンテナ、 2はインピーダンス整合回路、 3は受信機、 4はアナログ/ディジタル変換回路、 5は論理回路を示す。 草l因 草 3 @ FIG. 1 is a block diagram of the present invention, Figure 2 shows the operation flow of the present invention. FIG. 3 shows another block diagram of the invention. In the figure, ■ is antenna, 2 is an impedance matching circuit, 3 is the receiver, 4 is an analog/digital conversion circuit; 5 indicates a logic circuit. grass cause Grass 3 @

Claims (1)

【特許請求の範囲】[Claims] アンテナ、該アンテナと受信機との間のインピーダンス
整合を取るインピーダンス整合回路及び該受信機を含む
受信システムにおいて、該受信機への入力レベルが最大
となる様に該インピーダンス整合回路に挿入した可変リ
アクタンス素子のリアクタンス値を制御する様にした事
を特徴とするアンテナシステム。
In a receiving system including an antenna, an impedance matching circuit for impedance matching between the antenna and the receiver, and the receiver, a variable reactance is inserted into the impedance matching circuit so that the input level to the receiver is maximized. An antenna system characterized by controlling the reactance value of an element.
JP25698384A 1984-12-05 1984-12-05 Antenna system Pending JPS61135235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25698384A JPS61135235A (en) 1984-12-05 1984-12-05 Antenna system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25698384A JPS61135235A (en) 1984-12-05 1984-12-05 Antenna system

Publications (1)

Publication Number Publication Date
JPS61135235A true JPS61135235A (en) 1986-06-23

Family

ID=17300091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25698384A Pending JPS61135235A (en) 1984-12-05 1984-12-05 Antenna system

Country Status (1)

Country Link
JP (1) JPS61135235A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63156128U (en) * 1987-03-31 1988-10-13
EP0372430A2 (en) * 1988-12-05 1990-06-13 Seiko Corporation Automatic antenna tuning
EP0469001A1 (en) * 1989-03-28 1992-02-05 Telefind Corporation Paging receiver with continuously tunable antenna and rf amplifier
EP0633667A1 (en) * 1993-07-06 1995-01-11 Advanced Micro Devices, Inc. Analogue-to-digital converters
US6219532B1 (en) 1997-10-28 2001-04-17 Nec Corporation Movable radio terminal device capable of precisely matching impedances
GB2366081A (en) * 2000-08-09 2002-02-27 Motorola Israel Ltd Radiation-efficient portable radio antenna which adapts to conditions
KR20020096008A (en) * 2001-06-19 2002-12-28 엘지전자 주식회사 Antena matching network
US8000379B2 (en) 2005-07-01 2011-08-16 Panasonic Corporation Radio communication apparatus
EP2557688A1 (en) * 2011-08-11 2013-02-13 Nxp B.V. A controller for a radio circuit
US11950885B2 (en) 2018-08-23 2024-04-09 Mitsubishi Electric Corporation Biosensor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5533214A (en) * 1978-08-31 1980-03-08 Oki Electric Ind Co Ltd Information processing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5533214A (en) * 1978-08-31 1980-03-08 Oki Electric Ind Co Ltd Information processing system

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63156128U (en) * 1987-03-31 1988-10-13
EP0372430A2 (en) * 1988-12-05 1990-06-13 Seiko Corporation Automatic antenna tuning
EP0469001A1 (en) * 1989-03-28 1992-02-05 Telefind Corporation Paging receiver with continuously tunable antenna and rf amplifier
EP0469001A4 (en) * 1989-03-28 1992-12-02 Telefind Corporation Paging receiver with continuously tunable antenna and rf amplifier
EP0633667A1 (en) * 1993-07-06 1995-01-11 Advanced Micro Devices, Inc. Analogue-to-digital converters
US5515050A (en) * 1993-07-06 1996-05-07 Advanced Micro Devices, Inc. Apparatus and method for asynchronous successive approximation
US6219532B1 (en) 1997-10-28 2001-04-17 Nec Corporation Movable radio terminal device capable of precisely matching impedances
AU745065B2 (en) * 1997-10-28 2002-03-07 Nec Corporation Movable radio terminal device capable of precisely matching impedances
GB2366081A (en) * 2000-08-09 2002-02-27 Motorola Israel Ltd Radiation-efficient portable radio antenna which adapts to conditions
KR20020096008A (en) * 2001-06-19 2002-12-28 엘지전자 주식회사 Antena matching network
US8000379B2 (en) 2005-07-01 2011-08-16 Panasonic Corporation Radio communication apparatus
EP2557688A1 (en) * 2011-08-11 2013-02-13 Nxp B.V. A controller for a radio circuit
US11950885B2 (en) 2018-08-23 2024-04-09 Mitsubishi Electric Corporation Biosensor device

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