JPS61134169U - - Google Patents
Info
- Publication number
- JPS61134169U JPS61134169U JP1560885U JP1560885U JPS61134169U JP S61134169 U JPS61134169 U JP S61134169U JP 1560885 U JP1560885 U JP 1560885U JP 1560885 U JP1560885 U JP 1560885U JP S61134169 U JPS61134169 U JP S61134169U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- resistor
- high voltage
- circuit
- dynamic focus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000605 extraction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Details Of Television Scanning (AREA)
Description
第1図は本考案の一実施例を示す回路図、第2
図は従来のダイナミツクフオーカス回路を示す回
路図である。
6:制御トランジスタ、VR1:可変抵抗、イ
,ロ:パラボロ波変調信号。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a circuit diagram showing a conventional dynamic focus circuit. 6: Control transistor, VR 1 : Variable resistor, A, B: Parabolo wave modulation signal.
Claims (1)
直流高電圧取り出し点と基準電位点と基準電位点
との間に分圧回路を構成する抵抗と可変インピー
ダンス動作する制御トランジスタを直列に接続し
、このトランジスタのベースにダイナミツクフオ
ーカス用の変調信号と可変抵抗器によつて調整さ
れる直流電圧を印加し、上記抵抗とトランジスタ
の接続中点から受像管に印加するフオーカス電圧
を得るようにしたダイナミツクフオーカス回路。 A resistor forming a voltage divider circuit and a control transistor operating as a variable impedance are connected in series between the DC high voltage extraction point of the high voltage generation circuit equipped with a flyback transformer and the reference potential point. A dynamic focus system in which a modulation signal for dynamic focus and a DC voltage adjusted by a variable resistor are applied to, and a focus voltage to be applied to the picture tube is obtained from the midpoint of the connection between the resistor and the transistor. circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1560885U JPS61134169U (en) | 1985-02-06 | 1985-02-06 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1560885U JPS61134169U (en) | 1985-02-06 | 1985-02-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61134169U true JPS61134169U (en) | 1986-08-21 |
Family
ID=30501602
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1560885U Pending JPS61134169U (en) | 1985-02-06 | 1985-02-06 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61134169U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5618050U (en) * | 1979-07-21 | 1981-02-17 | ||
JPS59108454A (en) * | 1982-12-14 | 1984-06-22 | Hitachi Ltd | Focus circuit of television receiver |
-
1985
- 1985-02-06 JP JP1560885U patent/JPS61134169U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5618050U (en) * | 1979-07-21 | 1981-02-17 | ||
JPS59108454A (en) * | 1982-12-14 | 1984-06-22 | Hitachi Ltd | Focus circuit of television receiver |