JPS6113319A - Reference voltage generating device - Google Patents

Reference voltage generating device

Info

Publication number
JPS6113319A
JPS6113319A JP13419184A JP13419184A JPS6113319A JP S6113319 A JPS6113319 A JP S6113319A JP 13419184 A JP13419184 A JP 13419184A JP 13419184 A JP13419184 A JP 13419184A JP S6113319 A JPS6113319 A JP S6113319A
Authority
JP
Japan
Prior art keywords
constant
chip
terminal
external output
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13419184A
Other languages
Japanese (ja)
Other versions
JPH0578942B2 (en
Inventor
Minoru Odajima
稔 小田嶋
Michiaki Yamagata
通昭 山県
Mineo Toshima
戸島 峰夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp filed Critical Yokogawa Hokushin Electric Corp
Priority to JP13419184A priority Critical patent/JPS6113319A/en
Publication of JPS6113319A publication Critical patent/JPS6113319A/en
Publication of JPH0578942B2 publication Critical patent/JPH0578942B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce an output operating resistance without increasing the number of output terminals, by containing the resistance of a wiring conductor in a feedback loop. CONSTITUTION:The reference voltage generating device of this invention is provided with an integrated circuit 45 equipped with a constant-voltage element 1, the 1st chip terminal 41 connected in relation with one end of the constant- voltage element 1, constant-current driving circuit 2 which makes a constant current to flow to the element 1, and 2nd chip terminal 50 connected with one end of the circuit 2 on a chip, 1st wiring conductor 46 which connects the 1st chip terminal 41 with an external output terminal 50, and the 2nd wiring conductor 47 which connects the 2nd chip terminal 42 with the external output terminal 50. When an external current source 11 is applied across external output terminals 50 and 51, a constant current is added to the constant-voltage element 1 by means of the constant-current driving circuit 2 and an accurate voltage is generated across both ends of the element 1. Since a feedback loop is connected at the external output terminals 50 and 51, wiring conductors 46 and 49 can be included in the feedback loop and influences can be compensated by the resistance of the wiring conductors.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、低ドリフト・アンプや電圧調整器などの種々
のアナログ回路やA/Dコンバータの設計などにおいて
必要性の高い、集積回路を用いた基準電圧発生装置の改
良に関するものである。
Detailed Description of the Invention (Industrial Application Field) The present invention is applicable to the use of integrated circuits, which are highly necessary in the design of various analog circuits such as low-drift amplifiers and voltage regulators, and A/D converters. This paper relates to improvements to standard voltage generators.

(従来の技術) 第2図は従来の基準電圧発生回路の一例を示すブロック
図である。1は定電圧素子、2はこの定電圧素子に定電
流を流す定電流駆動回路、3.4はこの定電流駆動回路
2の両端子および前記定電圧素子1の両端がそれぞれ接
続するチップ端子シ(チップ・パッドともいう)、5は
チップ上にこれらが形成された集積回路、6.7はその
一端が前記チップ端子3,4にそれぞれ接続しその他端
が外部出力端子(ICのビンが接続する部分)8゜9に
それぞれ接続する配線導体(ワイヤともいう)、10は
以上の部分を含む基準電圧発生装置、11は前記端子8
.9に接続する外部電源(電流源)である。
(Prior Art) FIG. 2 is a block diagram showing an example of a conventional reference voltage generation circuit. 1 is a constant voltage element, 2 is a constant current drive circuit that flows a constant current to this constant voltage element, and 3.4 is a chip terminal series to which both terminals of this constant current drive circuit 2 and both ends of the constant voltage element 1 are respectively connected. (also referred to as a chip pad), 5 is an integrated circuit formed on a chip, 6.7 has one end connected to the chip terminals 3 and 4, and the other end is an external output terminal (the IC pin is connected Wiring conductors (also called wires) connected to the terminals 8 and 9, 10 a reference voltage generator including the above parts, 11 the terminal 8
.. This is an external power supply (current source) connected to 9.

この様な構成の基準電圧発生装置では、基準電圧を発生
する回路全体がICチップ上に形成されているため、出
力端子8.9における動作抵抗はチップ上の回路5の動
作抵抗に配線導体6,7の抵抗を加えたものとなる。例
えば、配線導体の抵抗を0.240とすると、回路5の
動作抵抗をできるだけ小さくなるように構成しても、全
体の外部出力抵抗は0.24Ω以下にはならない。複数
の配l1il導体を並列に結線することにより動作抵抗
を低減するダブルボンドなどの方法もあるが、並列数を
増すにしたがいボンディングの工数が増大しコスト・ア
ップとなる上、原理的に抵抗をOにすることはできない
。すなわち第2図の構成を用いた基準電圧発生装置では
、負荷電流の変動に対する誤差が大きくなる。
In the reference voltage generator with such a configuration, the entire circuit for generating the reference voltage is formed on the IC chip, so the operating resistance at the output terminal 8.9 is the operating resistance of the circuit 5 on the chip plus the wiring conductor 6. , 7 resistances are added. For example, if the resistance of the wiring conductor is 0.240, even if the operating resistance of the circuit 5 is configured to be as small as possible, the overall external output resistance will not be less than 0.24Ω. There are methods such as double bonding that reduce the operating resistance by connecting multiple conductors in parallel, but as the number of parallel conductors increases, the number of bonding steps increases and the cost increases. It cannot be set to O. In other words, the reference voltage generator using the configuration shown in FIG. 2 has a large error due to variations in load current.

第3図は従来の基準電圧発生装置の第2の実施例を示す
ブロック図である。集積回路33上において定電圧素子
1および定電流駆動回路2の一端を別のチップ端子31
.32にそれぞれ接続し、チップ端子31,32をそれ
ぞれ配線導体34゜35を介して外部出力端子36.3
7と接続している点が第2図と異なる。
FIG. 3 is a block diagram showing a second embodiment of a conventional reference voltage generator. On the integrated circuit 33, one end of the constant voltage element 1 and the constant current drive circuit 2 are connected to another chip terminal 31.
.. 32 respectively, and the chip terminals 31 and 32 are connected to external output terminals 36.3 through wiring conductors 34 and 35, respectively.
It differs from FIG. 2 in that it is connected to 7.

この様な構成の基準電圧発生装置38では、基準電圧回
路の解放された帰還ループを第3図のように外部出力端
子36.37を介して接続できるから、配線導体の抵抗
を補償でき、負荷変動に対して出力電圧を安定にするこ
とができる。また帰還ループ内に電流増幅回路を設けて
電流駆動能力を上げることもできる。しかしながら、本
装置では外部出力端子の数が増加するため、製造工数が
増大し、パッケージが大きくなり、したがって内蔵の室
温ヒータの容量が大きくなるなどの欠点を有する。
In the reference voltage generator 38 having such a configuration, the open feedback loop of the reference voltage circuit can be connected via the external output terminals 36 and 37 as shown in FIG. 3, so that the resistance of the wiring conductor can be compensated for and the load The output voltage can be stabilized against fluctuations. It is also possible to increase the current drive capability by providing a current amplification circuit within the feedback loop. However, this device has drawbacks such as an increase in the number of external output terminals, which increases the number of manufacturing steps, increases the size of the package, and therefore increases the capacity of the built-in room temperature heater.

(発明が解決しようとする問題点) 本発明は上記の問題点を解決するためになされたもので
、出力端子の増加なしに、出力動作抵抗の低減を図るこ
とのできる基準電圧発生装置を実現することを目的とし
ている。
(Problems to be Solved by the Invention) The present invention has been made to solve the above-mentioned problems, and realizes a reference voltage generator that can reduce the output operating resistance without increasing the number of output terminals. It is intended to.

(問題点を解決するための手段) 本発明の第1の発明の基準電圧発生装置は外部電源で駆
動される外部出力端子から一定の基準電圧を出力する基
準電圧発生装置において、チップ上に定電圧素子とこの
定電圧素子の一端に関連して接続する第1のチップ端子
と前記定電圧素子に定電流を流す定電流駆動回路とこの
定電流駆動回路の一端が接続する第2のチップ端子とを
備えた集積回路、前記第1のチップ端子と外部出力端子
を接続する第1の配線導体、前記第2のチップ端子と前
記外部出力端子を接続する第2の配線導体を具備するこ
とを特徴とする。
(Means for Solving the Problems) A reference voltage generator according to a first aspect of the present invention is a reference voltage generator that outputs a constant reference voltage from an external output terminal driven by an external power supply. A voltage element, a first chip terminal connected to one end of the constant voltage element, a constant current drive circuit for flowing a constant current to the constant voltage element, and a second chip terminal connected to one end of the constant current drive circuit. an integrated circuit comprising: a first wiring conductor connecting the first chip terminal and the external output terminal; and a second wiring conductor connecting the second chip terminal and the external output terminal. Features.

本発明の第2の発明の基準電圧発生装置は外部電源で駆
動される外部出力端子から一定の基準電圧を出力する基
準電圧発生装置において、チップ上に定電圧素子とこの
定電圧素子の両端に関連してそれぞれ接続する第1およ
び第4のチップ端子と前記定電圧素子に定電流を流す定
電流駆動回路とこの定電流駆動回路の両端がそれぞれ接
続する第2および第3のチップ端子とを備えた集積回路
、前記第1のチップ端子と第1の外部出力端子を接続す
る第1の配線導体、前記第2のチップ端子と第1の前記
外部出力端子を接続する第2の配線導体、前記第4のチ
ップ端子と第2の外部出力端子を接続する第4の配線導
体、前記第3のチップ端子と第2の前記外部出力端子を
接続する第3の配線導体を具備することを特徴とする。
A reference voltage generator according to a second aspect of the present invention is a reference voltage generator that outputs a constant reference voltage from an external output terminal driven by an external power supply, and includes a constant voltage element on a chip and a constant voltage between both ends of the constant voltage element. first and fourth chip terminals connected to each other in relation to each other, a constant current drive circuit that flows a constant current to the constant voltage element, and second and third chip terminals connected to both ends of the constant current drive circuit, respectively. an integrated circuit comprising: a first wiring conductor connecting the first chip terminal and a first external output terminal; a second wiring conductor connecting the second chip terminal and the first external output terminal; A fourth wiring conductor that connects the fourth chip terminal and the second external output terminal, and a third wiring conductor that connects the third chip terminal and the second external output terminal. shall be.

(作用) 本発明の基準電圧発生装置では上記のような構成で配線
導体の抵抗を帰還ループ内に含ませることにより出力動
作抵抗を低減させることができる。
(Function) In the reference voltage generating device of the present invention, the output operating resistance can be reduced by including the resistance of the wiring conductor in the feedback loop with the above-described configuration.

(実施例) 以下本発明を図面を用いて詳しく説明する。(Example) The present invention will be explained in detail below using the drawings.

第1図は本発明に係わる基準電圧発生装置の一実施例を
示す構成ブロック図である。1は定電圧素子、2はこの
定電圧素子1に定電流を流す定電流駆動回路、41は前
記定電圧素子1の一端が接続する第1のチップ端子(チ
ップ・パッド)、42.43は前記定電流駆動回路2の
両入力端子がそれぞれ接続する第2.第3のチップ端子
、44は前記定電圧素子1の他端が前記定電流駆動回路
2を介して接続する第4のチップ端子、45はこれらの
回路をチップ上に有する集積回路、46゜47.48.
49はそれぞれその一端が前記チップ端子41,42.
43.44に接続する配線導体、50および51はこの
配線導体46.47および48.49の他端がそれぞれ
接続する外部出力端子(ICのビンが接続するステムの
部分)、52は以上・の回路から構成される基準電圧発
生装置である。
FIG. 1 is a block diagram showing an embodiment of a reference voltage generator according to the present invention. 1 is a constant voltage element, 2 is a constant current drive circuit that causes a constant current to flow through the constant voltage element 1, 41 is a first chip terminal (chip pad) to which one end of the constant voltage element 1 is connected, and 42.43 is a constant current drive circuit that supplies a constant current to the constant voltage element 1; 2. Both input terminals of the constant current drive circuit 2 are connected to the second. A third chip terminal, 44, a fourth chip terminal to which the other end of the constant voltage element 1 is connected via the constant current drive circuit 2, 45, an integrated circuit having these circuits on a chip, 46°47 .48.
49, one end of which is connected to the chip terminals 41, 42 .
Wiring conductors connected to 43.44, 50 and 51 are external output terminals (parts of the stem connected to IC bins) connected to the other ends of these wiring conductors 46.47 and 48.49, respectively, and 52 is the above. This is a reference voltage generator consisting of a circuit.

この様な構成の基準電圧発生装置において、外部出力端
子50.51間に外部電流源11を加えると、定電流駆
動回路2により定電圧素子1には定電流が加えられ、そ
の両端に正確な基準電圧を発生する。端子50.配線導
体46.チップ端子41、定電圧素子1.定電流駆動回
路2.チップ端子44.配線導体49、端子51を流れ
る電流は一定であるから、端子50.51間に発生する
電圧は常に一定である。
In the reference voltage generator having such a configuration, when the external current source 11 is added between the external output terminals 50 and 51, a constant current is applied to the constant voltage element 1 by the constant current drive circuit 2, and an accurate Generates a reference voltage. Terminal 50. Wiring conductor 46. Chip terminal 41, constant voltage element 1. Constant current drive circuit 2. Chip terminal 44. Since the current flowing through the wiring conductor 49 and the terminal 51 is constant, the voltage generated between the terminals 50 and 51 is always constant.

すなわち、上記のような構成の基準電圧発生装置では、
帰還ループを外部出力端子50.51において接続して
いるから、配線導体46.49は帰還ループの中に含ま
れることになり、配線導体の抵抗による影響を補償でき
、原理的にはOまで近づけることができる。すなわち、
負荷変動に対して出力電圧を安定にできる。
That is, in the reference voltage generator configured as above,
Since the feedback loop is connected at the external output terminal 50.51, the wiring conductors 46 and 49 are included in the feedback loop, and the influence of the resistance of the wiring conductors can be compensated for, and in principle, it can be brought close to O. be able to. That is,
The output voltage can be stabilized against load fluctuations.

また外部出力端子の数は従来のもの(例えば第2図の装
置)より増えないから、製造工数が増えず、パッケージ
も大きくならなくてすむ。
Furthermore, since the number of external output terminals is not increased compared to the conventional device (for example, the device shown in FIG. 2), the number of manufacturing steps does not increase, and the package does not need to be large.

第4図は第1図の基準電圧発生装置において、定電流駆
動回路2をより詳細に示した要部回路図(ただし簡略化
されている)である。第1図と同一の部分には同一の符
号を付している。定電流回路■2で決まる定電流はトラ
ンジスタQ2.Qlにより構成されるカレント・ミラー
回路を介して定電圧素子1に伝えられ、定電圧素子1を
定電流駆動する。R+ 、Q3 、Q4は負荷変動によ
り生じる余分の電流をバイパスさせるためのシャント・
レギュレータを構成する。
FIG. 4 is a main part circuit diagram (however, simplified) showing the constant current drive circuit 2 in more detail in the reference voltage generating device of FIG. 1. The same parts as in FIG. 1 are given the same reference numerals. The constant current determined by constant current circuit 2 is the transistor Q2. The current is transmitted to the constant voltage element 1 through a current mirror circuit constituted by Ql, and drives the constant voltage element 1 with a constant current. R+, Q3, and Q4 are shunts to bypass excess current caused by load fluctuations.
Configure the regulator.

上記のような構成の基準電圧発生装置の試作例について
実測した動作抵抗は0.200であり、カレント・ミラ
ーを用いた同様の回路を第2図のように構成した場合の
動作抵抗0.35Ωと比較して0.150の改善効果が
得られた(従来の回路構成のものは0.5〜1Ω)。ス
テムにおける電圧降下のアンバランスなどにより生じる
誤差を考慮した改良を施すことにより、動作抵抗をざら
にOに近づけることが可能である。
The actual operating resistance measured for the prototype example of the reference voltage generator configured as above is 0.200, and the operating resistance when a similar circuit using a current mirror is configured as shown in Figure 2 is 0.35Ω. An improvement effect of 0.150 was obtained compared to 0.150 (0.5 to 1 Ω for the conventional circuit configuration). By making improvements that take into account errors caused by unbalanced voltage drops in the stem, it is possible to roughly bring the operating resistance closer to O.

(発明の効果) 以上述べたように本発明によれば、出力端子の増加なし
に、出力動作抵抗の低減を図ることのできる基準電圧発
生装置を簡単な構成で実現できる。
(Effects of the Invention) As described above, according to the present invention, it is possible to realize a reference voltage generating device with a simple configuration that can reduce the output operating resistance without increasing the number of output terminals.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る基準電圧発生装置の一実施例を示
す構成ブロック図、第2図および第3図は基準電圧発生
装置の従来例を示すブロック図、第4図は第1図の一部
を詳細に表した要部回路図である。 1・・・定電圧素子、2・・・定電流駆動回路、11・
・・外部電源、41・・・第1のチップ端子、42・・
・第2のチップ端子、43・・・第3のチップ端子、4
4・・・第4のチップ端子、45・・・集積回路、46
・・・第1の配線導体、47・・・第2の配線導体、4
8・・・第3の配線導体、49・・・第4の配線導体、
50.51・・・外部出力端子、52・・・基準電圧発
生装置。 V 第4図
FIG. 1 is a configuration block diagram showing one embodiment of the reference voltage generating device according to the present invention, FIGS. 2 and 3 are block diagrams showing a conventional example of the reference voltage generating device, and FIG. 4 is the same as that shown in FIG. FIG. 2 is a circuit diagram of a main part showing a part in detail. DESCRIPTION OF SYMBOLS 1... Constant voltage element, 2... Constant current drive circuit, 11.
...External power supply, 41...First chip terminal, 42...
・Second chip terminal, 43...Third chip terminal, 4
4... Fourth chip terminal, 45... Integrated circuit, 46
...first wiring conductor, 47...second wiring conductor, 4
8... Third wiring conductor, 49... Fourth wiring conductor,
50.51...External output terminal, 52...Reference voltage generator. V Figure 4

Claims (2)

【特許請求の範囲】[Claims] (1)外部電源で駆動される外部出力端子から一定の基
準電圧を出力する基準電圧発生装置において、チップ上
に定電圧素子とこの定電圧素子の一端に関連して接続す
る第1のチップ端子と前記定電圧素子に定電流を流す定
電流駆動回路とこの定電流駆動回路の一端が接続する第
2のチップ端子とを備えた集積回路、前記第1のチップ
端子と外部出力端子を接続する第1の配線導体、前記第
2のチップ端子と前記外部出力端子を接続する第2の配
線導体を具備し、出力動作抵抗を低減させるように構成
したことを特徴とする基準電圧発生装置。
(1) In a reference voltage generator that outputs a constant reference voltage from an external output terminal driven by an external power supply, there is a constant voltage element on the chip and a first chip terminal connected to one end of the constant voltage element. an integrated circuit comprising: a constant current drive circuit that causes a constant current to flow through the constant voltage element; and a second chip terminal to which one end of the constant current drive circuit is connected; the first chip terminal and an external output terminal are connected to each other; A reference voltage generating device comprising a first wiring conductor and a second wiring conductor connecting the second chip terminal and the external output terminal, and configured to reduce output operation resistance.
(2)外部電源で駆動される外部出力端子から一定の基
準電圧を出力する基準電圧発生装置において、チップ上
に定電圧素子とこの定電圧素子の両端に関連してそれぞ
れ接続する第1および第4のチップ端子と前記定電圧素
子に定電流を流す定電流駆動回路とこの定電流駆動回路
の両端がそれぞれ接続する第2および第3のチップ端子
とを備えた集積回路、前記第1のチップ端子と第1の外
部出力端子を接続する第1の配線導体、前記第2のチッ
プ端子と第1の前記外部出力端子を接続する第2の配線
導体、前記第4のチップ端子と第2の外部出力端子を接
続する第4の配線導体、前記第3のチップ端子と第2の
前記外部出力端子を接続する第3の配線導体を具備し、
出力動作抵抗を低減させるように構成したことを特徴と
する基準電圧発生装置。
(2) In a reference voltage generator that outputs a constant reference voltage from an external output terminal driven by an external power supply, a constant voltage element is provided on the chip, and first and second 4 chip terminal, a constant current drive circuit that flows a constant current to the constant voltage element, and second and third chip terminals to which both ends of the constant current drive circuit are respectively connected, the first chip; a first wiring conductor connecting the terminal and the first external output terminal; a second wiring conductor connecting the second chip terminal and the first external output terminal; and a second wiring conductor connecting the fourth chip terminal and the second external output terminal. a fourth wiring conductor connecting an external output terminal; a third wiring conductor connecting the third chip terminal and the second external output terminal;
A reference voltage generator characterized in that it is configured to reduce output operating resistance.
JP13419184A 1984-06-29 1984-06-29 Reference voltage generating device Granted JPS6113319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13419184A JPS6113319A (en) 1984-06-29 1984-06-29 Reference voltage generating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13419184A JPS6113319A (en) 1984-06-29 1984-06-29 Reference voltage generating device

Publications (2)

Publication Number Publication Date
JPS6113319A true JPS6113319A (en) 1986-01-21
JPH0578942B2 JPH0578942B2 (en) 1993-10-29

Family

ID=15122559

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13419184A Granted JPS6113319A (en) 1984-06-29 1984-06-29 Reference voltage generating device

Country Status (1)

Country Link
JP (1) JPS6113319A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009295841A (en) * 2008-06-06 2009-12-17 Fujitsu Ltd Imaging device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57138170A (en) * 1981-02-20 1982-08-26 Hitachi Ltd Semiconductor integrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57138170A (en) * 1981-02-20 1982-08-26 Hitachi Ltd Semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009295841A (en) * 2008-06-06 2009-12-17 Fujitsu Ltd Imaging device

Also Published As

Publication number Publication date
JPH0578942B2 (en) 1993-10-29

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