JPS61104579U - - Google Patents

Info

Publication number
JPS61104579U
JPS61104579U JP18941084U JP18941084U JPS61104579U JP S61104579 U JPS61104579 U JP S61104579U JP 18941084 U JP18941084 U JP 18941084U JP 18941084 U JP18941084 U JP 18941084U JP S61104579 U JPS61104579 U JP S61104579U
Authority
JP
Japan
Prior art keywords
substrate
integrated circuit
hybrid integrated
cross
funnel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18941084U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18941084U priority Critical patent/JPS61104579U/ja
Publication of JPS61104579U publication Critical patent/JPS61104579U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図はそれぞれこの考案による
混成集積回路用基板の実施例を示す断面図、第3
図は従来の混成集積回路用基板の例を示す断面図
である。 図において、1は基板、2は貫通孔、4,5は
それぞれ導体、6はサラトリした面である。なお
各図中同一符号は同一または相当部分を示す。
1 and 2 are cross-sectional views showing an embodiment of the hybrid integrated circuit board according to this invention, and FIG.
The figure is a sectional view showing an example of a conventional hybrid integrated circuit board. In the figure, 1 is a substrate, 2 is a through hole, 4 and 5 are conductors, and 6 is a flattened surface. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 混成集積回路のサブストレートを形成する基板
の一方の面から他方の面へ貫通する孔の断面が基
板の一方の面および他方の面、あるいはいずれか
一方の面に大きく開口した漏斗形を成し、その孔
の内面に設けた導体により基板の一方の面および
他方の面に設けた導体間を接続することを特徴と
する混成集積回路用基板。
A hole penetrating from one surface to the other of a substrate forming the substrate of a hybrid integrated circuit has a cross section in the form of a funnel with a large opening on one surface and the other surface of the substrate, or on either surface. 1. A board for a hybrid integrated circuit, characterized in that a conductor provided on the inner surface of the hole connects conductors provided on one surface and the other surface of the substrate.
JP18941084U 1984-12-13 1984-12-13 Pending JPS61104579U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18941084U JPS61104579U (en) 1984-12-13 1984-12-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18941084U JPS61104579U (en) 1984-12-13 1984-12-13

Publications (1)

Publication Number Publication Date
JPS61104579U true JPS61104579U (en) 1986-07-03

Family

ID=30746861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18941084U Pending JPS61104579U (en) 1984-12-13 1984-12-13

Country Status (1)

Country Link
JP (1) JPS61104579U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63197377U (en) * 1987-06-09 1988-12-19

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63197377U (en) * 1987-06-09 1988-12-19

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