JPS61103932U - - Google Patents
Info
- Publication number
- JPS61103932U JPS61103932U JP18597484U JP18597484U JPS61103932U JP S61103932 U JPS61103932 U JP S61103932U JP 18597484 U JP18597484 U JP 18597484U JP 18597484 U JP18597484 U JP 18597484U JP S61103932 U JPS61103932 U JP S61103932U
- Authority
- JP
- Japan
- Prior art keywords
- output
- section
- turned
- input
- setting state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000020169 heat generation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Relay Circuits (AREA)
Description
第１図は本考案の実施例の全体構成を示すブロ
ツク図、第２図は第１図におけるタイミング回路
１の内部回路を示す図、第３図は本実施例に係る
スイツチングユニツトの作用を説明するための図
である。
１…タイミング回路、２…入力端子、３…第１
の出力部、４…第２の出力部、８…リレー、９…
リレー８のフイールド、１４…リレー８の接点、
１５…電子スイツチ手段を構成するトライアツク
、２２，２３，２５，２６…増巾器、２４…遅延
回路、２８…オアゲート、２９…エンドゲート。
FIG. 1 is a block diagram showing the overall configuration of an embodiment of the present invention, FIG. 2 is a diagram showing the internal circuit of the timing circuit 1 in FIG. 1, and FIG. 3 shows the operation of the switching unit according to the embodiment. It is a figure for explaining. 1...Timing circuit, 2...Input terminal, 3...First
output part, 4... second output part, 8... relay, 9...
Field of relay 8, 14...Contact of relay 8,
DESCRIPTION OF SYMBOLS 15... Triax constituting electronic switch means, 22, 23, 25, 26... Amplifier, 24... Delay circuit, 28... OR gate, 29... End gate.
Claims (1)
応して第１の出力部の出力をオン・オフするとと
もに、第２の設定状態においては入力のオンと同
時に前記第１の出力部の出力をオンとし、入力の
オフに対して一定時間遅れてその出力をオフにす
る電気回路部と、 第１の設定状態において入力のオン・オフに対
して一定時間遅れて第２の出力部の出力をそれぞ
れオン・オフにするとともに、第２の設定状態に
おいては入力のオンに対して一定時間遅れて前記
第２の出力部の出力をオンとし、入力のオフと同
時にその出力をオフにする電気回路部と、 前記第１の出力部にそのゲートを接続された電
気スイツチ手段と、 前記電気スイツチ手段とその接点部が並列に接
続されているとともに、そのフイールド部が前記
第２の出力部に接続されたリレーとを含む交流、
直流両用低発熱スイツチングユニツト。[Claims for Utility Model Registration] In the first setting state, the output of the first output section is turned on and off in response to the on/off of the input, and in the second setting state, the output of the first output section is turned on and off at the same time as the input is turned on. an electric circuit section that turns on the output of the first output section and turns off the output after a certain time delay with respect to the input turning off; The output of the second output section is turned on and off, respectively, and in the second setting state, the output of the second output section is turned on with a certain time delay after the input is turned on, and at the same time as the input is turned off. an electric circuit section for turning off the output; an electric switch means whose gate is connected to the first output section; the electric switch means and the contact section thereof are connected in parallel, and the field section thereof is connected in parallel. and a relay connected to the second output.
DC dual-use low heat generation switching unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18597484U JPS61103932U (en) | 1984-12-07 | 1984-12-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18597484U JPS61103932U (en) | 1984-12-07 | 1984-12-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61103932U true JPS61103932U (en) | 1986-07-02 |
Family
ID=30743433
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18597484U Pending JPS61103932U (en) | 1984-12-07 | 1984-12-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61103932U (en) |
-
1984
- 1984-12-07 JP JP18597484U patent/JPS61103932U/ja active Pending
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