JPS6110308A - Variable equalizer - Google Patents
Variable equalizerInfo
- Publication number
- JPS6110308A JPS6110308A JP13367284A JP13367284A JPS6110308A JP S6110308 A JPS6110308 A JP S6110308A JP 13367284 A JP13367284 A JP 13367284A JP 13367284 A JP13367284 A JP 13367284A JP S6110308 A JPS6110308 A JP S6110308A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- circuit
- terminal
- resistance value
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/06—Frequency selective two-port networks including resistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/17—Structural details of sub-circuits of frequency selective networks
- H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
- H03H7/175—Series LC in series path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/17—Structural details of sub-circuits of frequency selective networks
- H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
- H03H7/1758—Series LC in shunt or branch path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/17—Structural details of sub-circuits of frequency selective networks
- H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
- H03H7/1766—Parallel LC in series path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/17—Structural details of sub-circuits of frequency selective networks
- H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
- H03H7/1775—Parallel LC in shunt or branch path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/17—Structural details of sub-circuits of frequency selective networks
- H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
- H03H7/1783—Combined LC in series path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/17—Structural details of sub-circuits of frequency selective networks
- H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
- H03H7/1791—Combined LC in shunt or branch path
Landscapes
- Filters And Equalizers (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は伝送特性の等化を行なう可変等化器に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a variable equalizer that equalizes transmission characteristics.
従来この種の装置として第１図に示すものがあった。図
において、ｌａ、ｌｂは二端子対回路の入力端子、２ａ
、２ｂは同じく出力端子、３は一端を端子１ａに接続さ
れ、他端を端子２ａに接続されたインダクタンスとキャ
パシタンスとから成る第１のリアクタンス回路、４はこ
の第１のリアクタンス回路３と並列に置かれ、端子１ａ
と端子２ａとに接続された第１の抵抗器、５は上記第１
のリアクタンス回路３及び第１の抵抗器４と並列に置か
れ、端子１ａに接続された第２の抵抗器、６はこの第２
の抵抗器５に直列に接続され、（を端を端子２ａに接続
されて第２の抵抗器５と同じ抵抗値をもつ第３の抵抗器
、７は上記第２の抵抗器５の出力に接続された第４の抵
抗器、８はこの第４の抵抗器７に直列に接続され、他端
を端子１ｂと端子２ｂとを結ぶ線に接続されたインダク
タンスとキャパシタンスとから成る第２のリアクタンス
回路である。A conventional device of this type is shown in FIG. In the figure, la and lb are input terminals of a two-terminal pair circuit, 2a
, 2b is also an output terminal, 3 is a first reactance circuit consisting of an inductance and a capacitance whose one end is connected to the terminal 1a and the other end is connected to the terminal 2a, and 4 is connected in parallel with this first reactance circuit 3. placed, terminal 1a
and the first resistor 5 connected to the terminal 2a.
A second resistor, 6, placed in parallel with the reactance circuit 3 and the first resistor 4, and connected to the terminal 1a,
A third resistor (7) is connected in series with the resistor 5, and has the same resistance value as the second resistor 5, with its end connected to the terminal 2a, and 7 is connected to the output of the second resistor 5. A fourth resistor 8 connected thereto is a second reactance consisting of an inductance and a capacitance connected in series to this fourth resistor 7 and having the other end connected to a line connecting terminals 1b and 2b. It is a circuit.
次に動作について説明する。第１のリアクタンス回路３
及び第２のリアクタンス回路８のインピーダンスをそれ
ぞれｚｌ、ｚ２とし、第１の抵抗器４の抵抗値をＲ１＋
第２及び第３の抵抗器５゜６の抵抗値をともにＲＱ、第
４の抵抗器７の抵抗値をＲ４とする。第、１図を簡略化
したのが第２図である。この第２図では、並列接続され
た第１のリアクタンス回路３と第１の抵抗器４とをまと
めて第１の回路網１０とし、そのインピーダンスを２３
４、直列接続された第４の抵抗器７と第２のリアクタン
ス回路８とをまとめて第２の回路網２０とし、そのイン
ピーダンスを２７８とすると次式が成り立つ。Next, the operation will be explained. First reactance circuit 3
and the impedance of the second reactance circuit 8 are respectively zl and z2, and the resistance value of the first resistor 4 is R1+
The resistance values of the second and third resistors 5.6 are both RQ, and the resistance value of the fourth resistor 7 is R4. FIG. 2 is a simplified version of FIG. 1. In FIG. 2, the first reactance circuit 3 and the first resistor 4 connected in parallel are collectively referred to as a first circuit network 10, and its impedance is 23.
4. If the fourth resistor 7 and the second reactance circuit 8 connected in series are combined into a second circuit network 20, and its impedance is 278, the following equation holds true.
２７ Ｂ −Ｒ４＋２２ ・・・（２
）ところで、よく知られているように、常にＺ３４ ・
２７ Ｂ ＝ＲＯ２・（３１が成り立つ場合は、第１図
に示した回路は周波数によってインピーダンスが変化し
ない定抵抗回路となり、Ｚ３４を種々に選ぶと種々の減
衰特性が得られ、これは振幅等化器として用いられる。27 B-R4+22...(2
) By the way, as is well known, Z34
27 B =RO2・(If 31 holds true, the circuit shown in Figure 1 becomes a constant resistance circuit whose impedance does not change depending on the frequency, and by selecting Z34 variously, various attenuation characteristics can be obtained, and this is due to amplitude equalization. Used as a vessel.
この例を第３図に示す。An example of this is shown in FIG.
従来の等化器は以上のように構成されているので、その
振幅特性が可変である定抵抗回路を実現するためには、
第（３）式の条件を満たす素子値の関係を求め、その都
度素子を変更することが必要となり、伝送特性の等化に
多大の労力と時間を費やすという欠点があった。Conventional equalizers are configured as described above, so in order to realize a constant resistance circuit whose amplitude characteristics are variable,
It is necessary to find the relationship between the element values that satisfies the condition of equation (3) and change the elements each time, which has the drawback of requiring a great deal of effort and time to equalize the transmission characteristics.
この発明は上記のような従来のものの欠点を除去するた
めになされたもので、等化器に第１．第２の抵抗器群を
付加し、かつ常に定抵抗回路が実現可能なように該両抵
抗器群の抵抗値の比を選択できるように構成することに
より、容易にその振幅特性を可変できる可変等化器を提
供することを目的としている。This invention was made in order to eliminate the above-mentioned drawbacks of the conventional equalizer. By adding a second resistor group and configuring it so that the ratio of the resistance values of both resistor groups can be selected so that a constant resistance circuit can always be realized, the amplitude characteristics can be easily varied. The purpose is to provide an equalizer.
第４図は本件出願の第１の発明の一実施例による可変等
化器を示す。図において、１ａ〜２ｂ。FIG. 4 shows a variable equalizer according to an embodiment of the first invention of the present application. In the figure, 1a to 2b.
３．５，６．８は第１図の従来例と同じものを示し、１
００は今回本発明により新たに付加された抵抗可変回路
である。ここで４０は４子１ａと２３との間に接続され
、その中のいずれかの抵抗値を選択することのできる第
１の抵抗器群、７０Ｇよ第２の抵抗器５の（を端と第２
のリアクタンス回路８との間に接続され、上記第１の抵
抗器群４０の抵抗値と一定の関係にある抵抗値を選択す
ることのできる第′２の抵抗器群である。3.5 and 6.8 are the same as the conventional example in Fig. 1, and 1
00 is a variable resistance circuit newly added according to the present invention. Here, 40 is a first resistor group that is connected between the quadruplets 1a and 23 and whose resistance value can be selected; Second
This is a '2nd resistor group which is connected between the reactance circuit 8 and the resistor group 40 and whose resistance value has a fixed relationship with the resistance value of the first resistor group 40 can be selected.
上記抵抗可変回路１００を第５図にさらに詳しく示す。The variable resistance circuit 100 is shown in more detail in FIG.
図において、４０．７０は第４図に示したものと同じで
あり、Ｐ１〜Ｐ４は抵抗可変回路１００の端子、４１〜
４４はそれぞれ直列に配列された抵抗器、４９は上記抵
抗器４１〜４４の出力のいずれかと端子Ｐ２とを接続す
る第１の選択器、７１〜７４はそれぞれ端子Ｐ３に接続
され、かつ並列に配列された抵抗器、７９は上記抵抗器
７１〜７４の出力の１つあるいは複数個と端子Ｐ４とを
接続する第２の選択器、ＱＯ−Ｑ４．Ｓｏ〜Ｓ４はそれ
ぞれ上記第１．第２の選択器４９．７９の端子である。In the figure, 40.70 is the same as that shown in FIG. 4, P1 to P4 are terminals of the variable resistance circuit 100, and 41 to
44 are resistors arranged in series, 49 is a first selector that connects one of the outputs of the resistors 41 to 44 and the terminal P2, and 71 to 74 are each connected to the terminal P3 and are connected in parallel. The array of resistors 79 connects one or more of the outputs of the resistors 71-74 and the terminal P4 to a second selector QO-Q4. So to S4 are respectively the above-mentioned No. 1. This is the terminal of the second selector 49.79.
以下この回路の動作を説明する。簡単のために、上記４
１〜４４．７１〜７４の抵抗器の抵抗値をすべてＲＯ（
Ω）とする、第１の選択器４９で端子ｑｏと９１とを接
続した時、第２の選択器７９は端子ＳＯとＳｌとを接続
する。また選択器４９で端子ｑｏとｑ２とを接続した時
、選択５７９は端子ＳＯとＳｌ及びＳ２の両者とを接続
し、選択器４９が端子ｑＯとｑ３とを接続した時、選択
器７９は端子ＳＯとＳｌ及びＳ２及びＳ３の３者とを接
続するというように選択器４９と７９とを設定する。こ
のようにすると端子Ｐｉ −Ｒ２間及び端子Ｐ３−Ｐ４
間の抵抗値は変化する。この関係を表１に示す。端子Ｐ
１とＲ２との間の抵抗値をＲ１、端子Ｐ３とＲ４との間
の抵抗値をＲ４とすると、表より選択器４９の端子の接
続がどの位置にあっても、Ｒ１とＲ４の積は常にＲＯ２
である。The operation of this circuit will be explained below. For simplicity, the above 4
1 to 44. All resistance values of resistors 71 to 74 are RO(
Ω), when the first selector 49 connects the terminals qo and 91, the second selector 79 connects the terminals SO and Sl. Further, when the selector 49 connects the terminals qo and q2, the selector 579 connects the terminal SO to both Sl and S2, and when the selector 49 connects the terminals qO and q3, the selector 79 connects the terminal SO to both Sl and S2. The selectors 49 and 79 are set so as to connect the SO, Sl, S2, and S3. In this way, between terminal Pi and R2 and between terminals P3 and P4
The resistance value between them changes. This relationship is shown in Table 1. Terminal P
If the resistance value between terminals P3 and R2 is R1, and the resistance value between terminals P3 and R4 is R4, then the table shows that no matter where the terminals of selector 49 are connected, the product of R1 and R4 is Always RO2
It is.
ところで、第１図に示した回路が定抵抗回路であるため
の条件は第（３）式で与えられるが、この条表１
表２
件を第３図に示した種々の回路網について求める 。By the way, the conditions for the circuit shown in FIG. 1 to be a constant resistance circuit are given by equation (3), and this condition is determined for the various circuit networks shown in FIG. 3.
と表２となる。第４図及び第５図に示した構成で表２に
示す条件を満たすようにインダクタンスとキャパシタン
スを定め、選択ｉ！４９．７９の接点を表１に示したよ
うに左から順に変化させると、Ｒ１・Ｒ４−ＲＱ’の条
件を満たしなからＲ１とＲ４の比が変わる。すなわち、
選択器４９．７９の接点を変化させると第４図に示す回
路の振幅特性が変化するので、可変等化層として用いる
ことが可能となる。and Table 2. In the configuration shown in FIGS. 4 and 5, inductance and capacitance are determined so as to satisfy the conditions shown in Table 2, and selection i! When the contact points of 49.79 are changed sequentially from the left as shown in Table 1, the ratio of R1 and R4 changes since the condition of R1·R4-RQ' is not satisfied. That is,
By changing the contact points of the selectors 49 and 79, the amplitude characteristics of the circuit shown in FIG. 4 change, so that it can be used as a variable equalization layer.
一例として、第３図（ｂｌの回路網を用いた可変等化器
の振幅特性を求めてみる。この時の反電圧伝送関数Ｓ
（３１はＳ−σ＋ｊωとしてＲ１＋’ｌＲ□
となり、可変等化器の特性は第６図となる。As an example, let's find the amplitude characteristics of a variable equalizer using the circuit network shown in Figure 3 (bl).In this case, the anti-voltage transfer function S
(31 becomes R1+'lR□ as S-σ+jω, and the characteristics of the variable equalizer are shown in FIG. 6.
ところで第４図、第５図では、選択！５４９．７９の接
点をそれぞれ個別に変化させる方法を示したが、これは
選択指示回路からの情報を用いて自動的に接点を選択す
ることもできる。この例を第７図に示す。By the way, in Figures 4 and 5, select! Although the method of individually changing the contact points of 549.79 has been shown, it is also possible to automatically select the contact points using information from the selection instruction circuit. An example of this is shown in FIG.
第７図は本出願の第２の発明の一実施例による可変等化
器を示す。図において、１ａ〜２ｂ、３゜５．６，８，
４０．７０は第４図と同一のものを示し、１００は抵抗
可変回路であり、この抵抗可変回路１００において、９
０は第１及び第２の抵抗器群４０及び７０で選択する抵
抗値を定める情報を出力する選択指示回路であり、本実
施例で新たに付加されたものである。FIG. 7 shows a variable equalizer according to an embodiment of the second invention of the present application. In the figure, 1a to 2b, 3°5.6, 8,
40.70 indicates the same thing as in FIG. 4, 100 is a variable resistance circuit, and in this variable resistance circuit 100, 9
0 is a selection instruction circuit that outputs information that determines the resistance values to be selected for the first and second resistor groups 40 and 70, and is newly added in this embodiment.
第８図は上記抵抗可変回路１００の構成につい発明の一
実施例と同一のものであり、９０は選択器４９．７９と
接続され、それらに選択すべき抵抗値を定める情報を出
力する選択指示回路である。FIG. 8 shows the configuration of the variable resistance circuit 100 which is the same as that in one embodiment of the invention, and 90 is connected to selectors 49 and 79, and selection instructions are provided to output information determining the resistance value to be selected. It is a circuit.
次に動作について説明する。Next, the operation will be explained.
選択指示回路９０からの情報が“ｌ”の時、選択器４９
は端子ｑｏとｑｌとを接続し、かつ選択器７９は端子Ｓ
ＯとＳｌとを接続する０選択指示回路９０からの情報が
２″の時、選択器４９は端子ｑｏとｑ２とを接続し、か
つ選択器７９は端子ＳｏとＳｌ及びＳ２とを接続すや、
同様にして選択指示回路９０からの情報が“Ｎ”の時、
選択器４９は端子ｑｏとｑＮとを接続し、’ｈ一つ選択
器７９は端子ＳＱとＳｌ及びＳ２及び・・・・・・ｓＮ
のすべてとを接続する。このようにすると、端子Ｐ１−
Ｐ２間及び端子Ｐ３−Ｐ４間の抵抗値は変化するが、選
択指示回路９０からの情報にかかわらず、Ｒ１とＲ４の
積は常にＲＯ２である。この関係を表３に示す、その結
果、第７図、第８図に示した可変等化器は、第４図、第
５図に示した可変等化器と全く同じ特性をもつことがで
きる。When the information from the selection instruction circuit 90 is “l”, the selector 49
connects the terminals qo and ql, and the selector 79 connects the terminals S
When the information from the 0 selection instruction circuit 90 that connects O and Sl is 2'', the selector 49 connects the terminals qo and q2, and the selector 79 connects the terminals So with Sl and S2. ,
Similarly, when the information from the selection instruction circuit 90 is "N",
The selector 49 connects the terminals qo and qN, and the selector 79 connects the terminals SQ and Sl and S2 and...sN.
Connect with everything. In this way, terminal P1-
Although the resistance values between P2 and between terminals P3 and P4 change, the product of R1 and R4 is always RO2 regardless of the information from the selection instruction circuit 90. This relationship is shown in Table 3. As a result, the variable equalizers shown in FIGS. 7 and 8 can have exactly the same characteristics as the variable equalizers shown in FIGS. 4 and 5. .
なお、上記実施例では、第１及び第２の抵抗器群４０．
７０の中の抵抗値はすべてＲＯ（Ω）であり、また第１
．第２の回路網が第３図中）の回路網である場合につい
て示したが、本発明は必ずしもこの場合に限るものでは
ない、たとえば、第３図中）の回路網で第１の抵抗器群
４０の中の抵抗値をすべてｋＲＱ （Ω）（ｋ：に≧
０の任意の値）とし、第２の抵抗器群７０の中の抵抗値
をすべてＲｏ／ｋ（Ω）とすれば振幅特性は第６図より
もさらに細かいステップで設定することが可能となる。Note that in the above embodiment, the first and second resistor groups 40.
All resistance values in 70 are RO (Ω), and the first
．． Although the case where the second circuit network is the circuit network shown in FIG. 3 is shown, the present invention is not necessarily limited to this case. All resistance values in group 40 are kRQ (Ω) (k: ≧
0), and all the resistance values in the second resistor group 70 are set to Ro/k (Ω), it becomes possible to set the amplitude characteristics in even finer steps than in Fig. 6. .
この時の抵抗Ｒ１はｋＲＱステップごとの値、即ちＲ１
−ｎｋＲｏ （ｎ−１，２，３−） （７）値をトル
ことになる。The resistance R1 at this time is the value for each kRQ step, that is, R1
-nkRo (n-1, 2, 3-) (7) value.
また、第１の抵抗器群４０の中の抵抗値を一律に同じと
せずに、順にｋＲｏ、ｋＲｏ、２ｋＲｏ。Further, the resistance values in the first resistor group 40 are not uniformly set to be the same, but are set to kRo, kRo, and 2kRo in this order.
４ｋＲＯ，８ｋＲｏ、・・・・・・とじ、同時に、第２
の抵抗器群７０の抵抗値を順にＲ□ ／に、Ｒ□ ／ｋ
。4kRO, 8kRo, ......, and at the same time, the second
The resistance values of the resistor group 70 are sequentially set to R□ /, R□ /k
.
ＲＯ／２ ｋ、 ＲＯ／４ ｋ、 ＲＯ／８ ｋ、
、、・、、、と等比級数的に変えれば、抵抗値Ｒ１
はＲ１＝２ｎ・ｋＲｏ （ｎ＝ｏ、ｌ、２．３−）と
変化し、振幅特性の変化量を可変できることになる。RO/2k, RO/4k, RO/8k,
, . . . , if you change it in a geometric series, the resistance value R1
changes as R1=2n·kRo (n=o, l, 2.3-), and the amount of change in the amplitude characteristic can be varied.
なお、第５図で示した第１の抵抗器群４ｏと第２の抵抗
器群７０とを入れ換えて用いることにより、種々の可変
振幅特性が得られることも明らかである。It is also clear that various variable amplitude characteristics can be obtained by interchanging the first resistor group 4o and the second resistor group 70 shown in FIG. 5.
以上のように、この発明によれば、等化器に２つの抵抗
器群を付加し、該抵抗器群の各々の抵抗値として、常に
定抵抗回路の条件を満たすような抵抗値の組合せを選択
器で容易に選択できるように構成したので、精度の高い
可変等化器が容易に得られる効果がある。As described above, according to the present invention, two resistor groups are added to the equalizer, and a combination of resistance values that always satisfy the conditions of a constant resistance circuit is set as the resistance value of each of the resistor groups. Since the configuration is such that selection can be made easily with a selector, there is an effect that a highly accurate variable equalizer can be easily obtained.
第１図は従来の等化器の構成図、第２図はこの従来の等
化器の構成を簡略化した場合の構成図、第３図は種々の
回路網を用いた場合の等化器の振幅特性を示す図、第４
図は本出願の第１の発明の一実施例による可変等化器の
構成図、第５図は上記実施例による可変等化器の一部分
の詳細な構成図、第６図は上記実施例による可変等化器
の振幅特性を示す図、第７図は本出願の第２の発明の一
実施例による可変等化器の構成図、第８図は該実施例に
よる可変等化器の一部分の詳細な構成図である。
３・・・第１のリアクタンス回路、５・・・第１の抵抗
器、６・・・第２の抵抗器、８・・・第２のリアクタン
ス回路、４０・・・第１の抵抗器群、７０・・・第２の
抵抗器群、９０・・・選択指示回路、１００・・・抵抗
可変回路、４９・・・第１の選択器、７９・・・第２の
選択器。
なお図中同一符号は同−又は相当部分を示す。Figure 1 is a configuration diagram of a conventional equalizer, Figure 2 is a simplified configuration diagram of this conventional equalizer, and Figure 3 is an equalizer using various circuit networks. 4th diagram showing the amplitude characteristics of
The figure is a block diagram of a variable equalizer according to an embodiment of the first invention of the present application, FIG. 5 is a detailed block diagram of a part of the variable equalizer according to the above embodiment, and FIG. 6 is a block diagram according to the above embodiment. A diagram showing the amplitude characteristics of a variable equalizer, FIG. 7 is a configuration diagram of a variable equalizer according to an embodiment of the second invention of the present application, and FIG. 8 is a diagram showing a part of the variable equalizer according to the embodiment. FIG. 2 is a detailed configuration diagram. 3... First reactance circuit, 5... First resistor, 6... Second resistor, 8... Second reactance circuit, 40... First resistor group , 70... Second resistor group, 90... Selection instruction circuit, 100... Resistance variable circuit, 49... First selector, 79... Second selector. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (2)
の入力端子と出力端子間に接続された第１のリアクタン
ス回路と、この第１のリアクタンス回路に並列に配置さ
れ上記入力端子に接続された第１の抵抗器と、この第１
の抵抗器の他端に接続され他端を上記出力端子に接続さ
れた第２の抵抗器と、上記第１のリアクタンス回路及び
上記第１及び第２の抵抗器と並列に配置され複数のうち
のいずれかの抵抗値が選択可能な第１の抵抗器群と、上
記第１の抵抗器の他端に接続され上記第１の抵抗器群の
抵抗値と一定の関係にある抵抗値が選択可能な第２の抵
抗器群と、この第２の抵抗器群に直列に接続されその他
端を上記二端子対回路の他方の入力端子及び出力端子に
接続された第２のリアクタンス回路とを備えたことを特
徴とする可変等化器。(1) A variable equalizer consisting of a two-terminal pair circuit, in which a first reactance circuit is connected between one input terminal and an output terminal, and the input terminal is connected in parallel to the first reactance circuit. a first resistor connected to the first resistor;
a second resistor connected to the other end of the resistor and having the other end connected to the output terminal, and one of the plurality of resistors arranged in parallel with the first reactance circuit and the first and second resistors. a first resistor group from which one of the resistance values can be selected; and a resistance value connected to the other end of the first resistor and having a constant relationship with the resistance value of the first resistor group is selected. a second reactance circuit connected in series to the second resistor group and having its other end connected to the other input terminal and output terminal of the two-terminal pair circuit. A variable equalizer characterized by:
の入力端子と出力端子間に接続された第１のリアクタン
ス回路と、この第１のリアクタンス回路に並列に配置さ
れ上記入力端子に接続された第１の抵抗器と、この第１
の抵抗器の他端に接続され他端を上記出力端子に接続さ
れた第２の抵抗器と、上記第１のリアクタンス回路及び
上記第１及び第２の抵抗器と並列に配置され全体の抵抗
値として上記選択指示回路からの情報によりそのいずれ
かの抵抗器の抵抗値が選択可能な第１の抵抗器群と、上
記第１の抵抗器の他端に接続され上記第１の抵抗器群の
抵抗値と一定の関係にある抵抗値が選択可能な第２の抵
抗器群と、上記第１及び第２の抵抗器群に抵抗値を選択
するための情報を出力する選択指示回路と、上記第２の
抵抗器群に直列に接続されその他端を上記二端子対回路
の入力端子及び出力端子に接続された第２のリアクタン
ス回路とを備えたことを特徴とする可変等化器。(2) A variable equalizer consisting of a two-terminal pair circuit, in which a first reactance circuit is connected between one input terminal and an output terminal, and the input terminal is arranged in parallel with the first reactance circuit. a first resistor connected to the first resistor;
a second resistor connected to the other end of the resistor and having the other end connected to the output terminal, and a second resistor arranged in parallel with the first reactance circuit and the first and second resistors to determine the overall resistance. a first resistor group whose resistance value can be selected based on information from the selection instruction circuit; and a first resistor group connected to the other end of the first resistor. a second resistor group from which a resistance value having a certain relationship with the resistance value can be selected; and a selection instruction circuit that outputs information for selecting a resistance value to the first and second resistor groups; A variable equalizer comprising: a second reactance circuit connected in series to the second resistor group, the other end of which is connected to the input terminal and output terminal of the two-terminal pair circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13367284A JPS6110308A (en) | 1984-06-26 | 1984-06-26 | Variable equalizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13367284A JPS6110308A (en) | 1984-06-26 | 1984-06-26 | Variable equalizer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6110308A true JPS6110308A (en) | 1986-01-17 |
Family
ID=15110199
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13367284A Pending JPS6110308A (en) | 1984-06-26 | 1984-06-26 | Variable equalizer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6110308A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5503563A (en) * | 1993-01-13 | 1996-04-02 | Sumimoto Wiring Systems, Ltd. | Connector cover |
| JP2003229791A (en) * | 2002-02-01 | 2003-08-15 | Dx Antenna Co Ltd | Equalizer |
| EP2015448A1 (en) * | 2007-07-10 | 2009-01-14 | Thales | Signal acquisition chain comprising a selective frequency attenuator |
| JP2010278513A (en) * | 2009-05-26 | 2010-12-09 | Yokogawa Electric Corp | Waveform correction circuit and semiconductor test device using the same |
| JP2017524299A (en) * | 2014-08-04 | 2017-08-24 | トムソン ライセンシングＴｈｏｍｓｏｎ Ｌｉｃｅｎｓｉｎｇ | Filter termination combinations for multiband receivers |
| WO2021131062A1 (en) * | 2019-12-27 | 2021-07-01 | 平田機工株式会社 | Regeneration device and regeneration moving body |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS547077U (en) * | 1977-06-17 | 1979-01-18 |
-
1984
- 1984-06-26 JP JP13367284A patent/JPS6110308A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS547077U (en) * | 1977-06-17 | 1979-01-18 |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5503563A (en) * | 1993-01-13 | 1996-04-02 | Sumimoto Wiring Systems, Ltd. | Connector cover |
| JP2003229791A (en) * | 2002-02-01 | 2003-08-15 | Dx Antenna Co Ltd | Equalizer |
| EP2015448A1 (en) * | 2007-07-10 | 2009-01-14 | Thales | Signal acquisition chain comprising a selective frequency attenuator |
| FR2918821A1 (en) * | 2007-07-10 | 2009-01-16 | Thales Sa | FREQUENCY SELECTIVE ATTENUATOR |
| JP2010278513A (en) * | 2009-05-26 | 2010-12-09 | Yokogawa Electric Corp | Waveform correction circuit and semiconductor test device using the same |
| JP2017524299A (en) * | 2014-08-04 | 2017-08-24 | トムソン ライセンシングＴｈｏｍｓｏｎ Ｌｉｃｅｎｓｉｎｇ | Filter termination combinations for multiband receivers |
| WO2021131062A1 (en) * | 2019-12-27 | 2021-07-01 | 平田機工株式会社 | Regeneration device and regeneration moving body |
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