JPS60960B2 - Method for manufacturing gallium nitride light emitting device array - Google Patents
Method for manufacturing gallium nitride light emitting device arrayInfo
- Publication number
- JPS60960B2 JPS60960B2 JP54164427A JP16442779A JPS60960B2 JP S60960 B2 JPS60960 B2 JP S60960B2 JP 54164427 A JP54164427 A JP 54164427A JP 16442779 A JP16442779 A JP 16442779A JP S60960 B2 JPS60960 B2 JP S60960B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- gallium nitride
- substrate
- emitting device
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims description 24
- 229910002601 GaN Inorganic materials 0.000 title claims description 23
- 238000000034 method Methods 0.000 title claims description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims description 18
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 2
- 239000012670 alkaline solution Substances 0.000 claims 1
- 239000013078 crystal Substances 0.000 description 11
- 238000005530 etching Methods 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 229910052594 sapphire Inorganic materials 0.000 description 6
- 239000010980 sapphire Substances 0.000 description 6
- 238000001947 vapour-phase growth Methods 0.000 description 4
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910052725 zinc Inorganic materials 0.000 description 3
- 239000011701 zinc Substances 0.000 description 3
- 230000000740 bleeding effect Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000003513 alkali Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 159000000011 group IA salts Chemical class 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- YXJYBPXSEKMEEJ-UHFFFAOYSA-N phosphoric acid;sulfuric acid Chemical compound OP(O)(O)=O.OS(O)(=O)=O YXJYBPXSEKMEEJ-UHFFFAOYSA-N 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Weting (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Description
【発明の詳細な説明】
本発明は窒化ガリウム（ＧａＮ）発光素子の製造方法に
関するものであって、特にモノリシツク型の発光素子ア
レイの作成法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a gallium nitride (GaN) light emitting device, and more particularly to a method for manufacturing a monolithic light emitting device array.
ＧａＮはｐ型結晶の作成が困難であってこれまで成功し
た例はない。そのため発光素子としては、通常の発光ダ
イオードと異ってｍ−・一ｎ構造となっている。すなわ
ち、サファイア単結晶等の基板上に、まず不純物を添加
しないか、ないしはわずかに亜鉛等の不純物を添加した
結晶を気相成長法などで成長させる。成長した結晶は、
ｎ型の強い導電性をもっている。このｎ型導電性は、Ｇ
ａＮ結晶格子の中で、Ｎ原子が本釆占めるべき格子点が
空になったいわゆるＮ空孔が原因であるとされている。
ｎ型ＧａＮ結晶の上にさらに亜鉛等のアクセプタ不純物
を多量に添加し、Ｎ空孔によるｎ型キャリアを十分に補
償し高抵抗ないし絶縁性のＧａＮを成長させる。It is difficult to create a p-type crystal of GaN, and there has been no successful example of this so far. Therefore, the light emitting element has an m-.1n structure, unlike a normal light emitting diode. That is, on a substrate such as a sapphire single crystal, first, a crystal with no impurity added or with a small amount of impurity such as zinc is grown by a vapor phase growth method or the like. The grown crystal is
It has strong n-type conductivity. This n-type conductivity is G
The cause is said to be so-called N vacancies, which are empty lattice points that should be occupied by N atoms in the aN crystal lattice.
Further, a large amount of acceptor impurity such as zinc is added onto the n-type GaN crystal to sufficiently compensate for n-type carriers due to N vacancies and grow high-resistance or insulating GaN.
この絶縁層の上に金属電極を形成し、金属電極ｍ−絶縁
性結晶ｉ−ｎ型結晶ｈ接合とする。この素子の金属電極
を正に、ｎ型結晶を負になるように電圧を印加すること
によりｉ−ｎ接合付近で発光が見られる。このようにし
て作られる発光素子は、例えば第１図のような構成とな
っている。A metal electrode is formed on this insulating layer to form a metal electrode m-insulating crystal i-n type crystal h junction. By applying a voltage so that the metal electrode of this element becomes positive and the n-type crystal becomes negative, light emission is observed near the i-n junction. The light emitting device produced in this manner has a structure as shown in FIG. 1, for example.
サファイア等の基板１上にｎ型Ｃａｎ層２、絶縁性Ｃａ
ｎ層３があり、さらに金属電極４が形成されている。こ
の４，３，２の構成がｍ−・一ｎ接合部である。こ ．
のチップが例えば半田５などでへツタ８の片側の電極８
ａにボンディングされ、またチップの側面のｎ型層が露
出した部分は、例えばインジウムドット６などで金属線
７によってへツダ８の他の電極８ｂに接続されている。
必要に応じて樹脂９などをかぶせて発光素子が完成する
。この素子の電極８ａを正に、８ｂを負になるように適
当な電圧を外部から加えると、ｎ型ＧａＮ層２と絶縁性
ＧａＮ層３の境界付近から発光し、基板１を通して外に
見える。このような構成をもつＧａＮ発光素子を用いて
、例えば光プリンターなどを作る場合、発光素子を１肌
当り数個から１咳欧個並べるようにしなければならない
。On a substrate 1 such as sapphire, an n-type Can layer 2 and an insulating Ca layer 2 are formed.
There is an n-layer 3, and further a metal electrode 4 is formed. This 4, 3, 2 configuration is an m-/1n junction. child .
For example, if the chip is connected to the electrode 8 on one side of the connector 8 with solder 5, etc.
The exposed portion of the n-type layer on the side surface of the chip is connected to another electrode 8b of the header 8 by a metal wire 7, such as an indium dot 6.
The light emitting element is completed by covering with resin 9 or the like as necessary. When an appropriate voltage is externally applied so that the electrode 8a of this element becomes positive and the electrode 8b becomes negative, light is emitted from near the boundary between the n-type GaN layer 2 and the insulating GaN layer 3, and is visible through the substrate 1. When making, for example, an optical printer using GaN light emitting elements having such a configuration, it is necessary to arrange several to one light emitting elements per skin.
このような場合には、発光素子のチップを並べることは
実際上不可能に近くどうしてもモノリシツク形にしなけ
ればならない。またプリンタなどの光源に使う場合、隣
接する発光点からの光がにじむと、文字や絵の鮮明度が
悪くなるので、各種の工夫がこらされている。例えば発
光点の間に多結晶シリコン膜を形成する方法や電極その
ものを使う方法などが知られている。ＧａＮの場合、発
光色に対する透明度が他の発光素子に比較して大きいた
め、光のにじみの問題は一層深刻なものとなっている。In such a case, it is virtually impossible to arrange the chips of the light emitting devices side by side, so they must be made monolithic. Furthermore, when used as a light source for printers, etc., if light from adjacent light emitting points bleeds, the clarity of letters and pictures deteriorates, so various measures have been taken to avoid this. For example, methods of forming a polycrystalline silicon film between light emitting points and methods of using electrodes themselves are known. In the case of GaN, the transparency of the emitted light color is greater than that of other light emitting elements, so the problem of light bleeding becomes even more serious.
本発明はかかる問題点を解決したＧａＮ発光素子アレイ
の製造方法を提供するものである。ＧａＮを気相成長さ
せるにあたって前もって成長基板にスクラィブラィンの
ような傷をつけておくと、その部分に成長する結晶が特
異な性質、例えばエッチングされやすいなど、を示すこ
とが発明者によって見出された。The present invention provides a method for manufacturing a GaN light emitting element array that solves these problems. The inventor has discovered that if a scribe line-like scratch is made on the growth substrate beforehand during vapor phase growth of GaN, the crystal that grows in that area exhibits unique properties, such as being easily etched. .
そこで、このことを用いてＧａＮモノリシック発光素子
の各発光点を分離することが可能となった。以下図によ
って本発明の一実施例を詳細に述べる。第２図でサファ
イア基板１２の表面にはスクラィバなどで必要なピッチ
で傷５２が入れてある。この基板上に気相成長法などで
Ｃａｎのｎ型層２２、半絶縁層（ｉ層）３２を成長させ
る（同図ｂ）。このとき基板スクライブラィン５２上の
部分には性質の異るＣａｎ層７２が成長する。同図ｃは
この結晶を例えば燐酸系のエッチング液でエッチングし
たもので、７２の部分は前述のようにエッチングされや
すいことから選択的に溶けてしまう。このとき他の部分
は殆んどエッチングされずに残り、またエッチ溝の側面
はやや角度をもった形になる。同図ｄはマスク蒸着等で
ｎ側電極６２、ｉ層電極４２を形成したところである。Therefore, using this fact, it has become possible to separate each light emitting point of the GaN monolithic light emitting element. An embodiment of the present invention will be described in detail below with reference to the drawings. In FIG. 2, scratches 52 are made on the surface of the sapphire substrate 12 with a scriber or the like at a required pitch. On this substrate, a CAN n-type layer 22 and a semi-insulating layer (i-layer) 32 are grown by vapor phase growth or the like (FIG. 2B). At this time, a Can layer 72 having different properties grows on the substrate scribe line 52. Figure c shows this crystal etched with, for example, a phosphoric acid-based etching solution, and the portion 72 is selectively dissolved because it is easily etched as described above. At this time, other portions remain almost unetched, and the sides of the etched grooves have a slightly angular shape. Figure d shows a state where the n-side electrode 62 and the i-layer electrode 42 have been formed by mask vapor deposition or the like.
このようにしたとき、ｎ側電極６２は、分離された各素
子のｎ側相互を接続すると同時にｉ−ｎ接合で発生した
光が隣接する素子に影響を及ぼさないようなマスク効果
も合せ持つことになる。この例では、ＧａＮのうちＴ２
の領域をすべてエッチングで除去したが、これは適当な
深さまでエッチングすればよい。なお基板に形成する傷
は、スクラィブラィンに限られるものでなく、他の手段
を用いても良く、要は「その領域が凹凸を有する粕面で
あれば良い。In this case, the n-side electrode 62 connects the n-sides of the separated elements and at the same time has a masking effect so that the light generated at the i-n junction does not affect adjacent elements. become. In this example, T2 of GaN
Although all of the regions were removed by etching, this can be done by etching to an appropriate depth. Note that the scratches formed on the substrate are not limited to scribe lines, and other means may be used, and the point is that it is sufficient if the area is a scratched surface with unevenness.
このように本発明によれば、通常化学的に安定で、エッ
チング等の加工が困難であったＧａＭこついて簡単にメ
サ型の素子を形成することができるため、実際の素子作
成の自由度が非常に大きくなつた。As described above, according to the present invention, it is possible to easily form a mesa-shaped element using GaM, which is usually chemically stable and difficult to process such as etching, thereby increasing the degree of freedom in actually creating the element. It grew very large.
次に本発明の窒化ガリウム発光素子アレイの製造方法の
第１の実施例について、第２図を用いてさらに詳しく説
明する。第２図において、基板１２としてサファイア０
００１面を用い、スクライバによって２００〃ピッチで
軽くスクラィプラィンを格子状に入れたものを用いた。Next, a first embodiment of the method for manufacturing a gallium nitride light emitting device array of the present invention will be described in more detail with reference to FIG. In FIG. 2, sapphire 0 is used as the substrate 12.
A 001 surface was used, and a scriber was used to lightly scribe lines at a pitch of 200 in a lattice pattern.
これにＧａ／ＨＣＩ／ＮＨ３／キャリアガスの系を用い
てまずアンドープのｎ型ＧａＮ層２２を形成し、続いて
系内に亜鉛の蒸気を導入してＧａＮｉ層３２を形成した
。しかる後約２５０ｏ に加熱した燐酸−硫酸混合液中
でエッチングを行って性質の異なるＧａＮ層７２の部分
を優先的に除去した。これにマスク蒸着法によってＧａ
Ｎｉ層３２上と、除去部を覆ってＮｉ／ＡＩ電極４２及
び６２を形成した。これをあらかじめ半田バンプを形成
しておいた電極リードをもつ基体に熱圧着して素子を作
成した。この素子でｉ層電極４２側が正に、ｎ側電極６
２が負になるように電圧を印放したところ青色発光が得
られた。次に第２の実施例を示す。実施例１と同様にし
てＧａＮｉ−ｎ接合を気相成長で形成した。First, an undoped n-type GaN layer 22 was formed thereon using a Ga/HCI/NH3/carrier gas system, and then a GaNi layer 32 was formed by introducing zinc vapor into the system. Thereafter, etching was carried out in a phosphoric acid-sulfuric acid mixture heated to about 250° C. to preferentially remove portions of the GaN layer 72 having different properties. Ga
Ni/AI electrodes 42 and 62 were formed on the Ni layer 32 and covering the removed portion. This was thermocompression bonded to a substrate having electrode leads on which solder bumps had been formed in advance to create an element. In this element, the i-layer electrode 42 side is the positive side, and the n-side electrode 6
When voltage was released so that 2 became negative, blue light emission was obtained. Next, a second example will be shown. A GaNi-n junction was formed by vapor phase growth in the same manner as in Example 1.
しかる後、アルカリ溶融塩あるいは加熱した過飽和アル
カリ液中で短時間エッチングしたところ第３図のように
エッチ溝の側面が表面に垂直になった。一方溝の底はサ
ファイア基板１３まで達せず、ｎ側Ｃａｎ層２３は連続
した構造が得られた。第３図はこの状態を示す。これに
全面にＮｉ／山を蒸着したところ藩の側面の段差で金属
電極は自動的にｉ側ｎ側の分離ができた。これを用いて
実施例１と同機にして青色モノリシック発光素子アレイ
が作成できた。なおここではスクラィバーを用いた方法
で説明したが、他にもサンドプラストや超音波加工等の
方法によって基板表面の加工を行うことによっても同様
な効果が得られる。Thereafter, when etching was performed for a short time in a molten alkaline salt or a heated supersaturated alkali solution, the side surfaces of the etched grooves became perpendicular to the surface as shown in FIG. On the other hand, the bottom of the groove did not reach the sapphire substrate 13, and the n-side Can layer 23 had a continuous structure. FIG. 3 shows this state. When Ni was deposited on the entire surface, the metal electrode was automatically separated into the i side and the n side due to the step on the side of the wall. Using this, a blue monolithic light emitting element array was created using the same machine as in Example 1. Note that although a method using a scriber has been described here, similar effects can be obtained by processing the substrate surface by other methods such as sand blasting or ultrasonic processing.
以上のように本発明は、基板上に窒化ガリウム発光素子
をアレイ状に構成する窒化ガリウム発光素子アレイの製
造方法において、基板上に格子状に表面凹凸領域を形成
し、この基板上に窒化ガリウムェピタキシヤル層を形成
したのち、前記凹凸領域上に形成された窒化ガリウムェ
ピタキシャル層をエッチングにより選択的に除去して溝
を形成し、この溝に金属電極を形成することにより光ア
ィソレーションをはかったもので、製造方法が縦単であ
り隣接部への光のにじみがなく、文字や絵の鮮明度が良
い等の利点を有する。As described above, the present invention provides a method for manufacturing a gallium nitride light emitting device array in which gallium nitride light emitting devices are arranged in an array on a substrate, in which a surface unevenness region is formed in a lattice pattern on the substrate, and gallium nitride light emitting devices are formed on the substrate. After forming the epitaxial layer, the gallium nitride epitaxial layer formed on the uneven region is selectively removed by etching to form a groove, and a metal electrode is formed in the groove to form an optical isolator. It has advantages such as the manufacturing method is vertical, there is no bleeding of light to adjacent parts, and the clarity of letters and pictures is good.
第１図は通常のＣａｎ発光素子の模式図、第２図ａ〜ｄ
は本発明の発光素子アレイの製造方法における各工程を
順に示す断面図、第３図は本発明の方法による発光素子
アレイの他の構造例を示す断面図である。
１２……サファイア基板、５２・…・・スクラィバー等
によるスクラツチ「 ２２・・…・ｎ−Ｃａｎ、２３…
…ｉ−Ｃａｎ、７２……エッチングを受けやすいＧａＮ
領域。
第１図
第２図
第３図Figure 1 is a schematic diagram of a normal Can light emitting device, Figures 2 a to d
3 is a cross-sectional view sequentially showing each step in the method for manufacturing a light-emitting element array of the present invention, and FIG. 3 is a cross-sectional view showing another structural example of the light-emitting element array according to the method of the present invention. 12... Sapphire substrate, 52... Scratch with a scriber, etc. 22... n-Can, 23...
...i-Can, 72...GaN susceptible to etching
region. Figure 1 Figure 2 Figure 3
Claims (1)
前記凹凸領域を含む基板上に窒化ガリウムエピタキシヤ
ル層を一層以上成長させる工程と、熱燐酸系あるいは熱
過飽和アルカリ液により前記凹凸領域上に形成された窒
化ガリウムエピタキシヤル層の一部または全部を除去し
て溝を形成する工程と、前記溝を覆って電極を形成する
工程とを少なくとも有することを特徴とする窒化ガリウ
ム発光素子アレイの製造方法。1. Forming a surface uneven area in a lattice pattern on the substrate,
A step of growing one or more layers of gallium nitride epitaxial layer on the substrate including the uneven area, and removing part or all of the gallium nitride epitaxial layer formed on the uneven area using a hot phosphoric acid system or a thermally supersaturated alkaline solution. 1. A method for manufacturing a gallium nitride light emitting element array, comprising at least the steps of: forming a groove in the groove; and forming an electrode covering the groove.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54164427A JPS60960B2 (en) | 1979-12-17 | 1979-12-17 | Method for manufacturing gallium nitride light emitting device array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54164427A JPS60960B2 (en) | 1979-12-17 | 1979-12-17 | Method for manufacturing gallium nitride light emitting device array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5687383A JPS5687383A (en) | 1981-07-15 |
| JPS60960B2 true JPS60960B2 (en) | 1985-01-11 |
Family
ID=15792939
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54164427A Expired JPS60960B2 (en) | 1979-12-17 | 1979-12-17 | Method for manufacturing gallium nitride light emitting device array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60960B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011057479A (en) * | 2009-09-08 | 2011-03-24 | Panasonic Corp | Template, method for manufacturing the template, crystal grown by using the template, and method and apparatus for producing the crystal |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0752779B2 (en) * | 1987-12-09 | 1995-06-05 | 日立電線株式会社 | Light emitting diode array |
| US5923946A (en) * | 1997-04-17 | 1999-07-13 | Cree Research, Inc. | Recovery of surface-ready silicon carbide substrates |
| JP4055503B2 (en) | 2001-07-24 | 2008-03-05 | 日亜化学工業株式会社 | Semiconductor light emitting device |
| ES2362407T3 (en) * | 2002-08-29 | 2011-07-04 | Seoul Semiconductor Co., Ltd. | LIGHTING ISSUER DEVICE PROVIDED BY LIGHTING ISSUING DIODES. |
| EP3699963A1 (en) | 2003-08-19 | 2020-08-26 | Nichia Corporation | Semiconductor light emitting diode and method of manufacturing its substrate |
| JP2005159035A (en) * | 2003-11-26 | 2005-06-16 | Sumitomo Electric Ind Ltd | Light emitting diode and light emitting device |
-
1979
- 1979-12-17 JP JP54164427A patent/JPS60960B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011057479A (en) * | 2009-09-08 | 2011-03-24 | Panasonic Corp | Template, method for manufacturing the template, crystal grown by using the template, and method and apparatus for producing the crystal |
Also Published As
| Publication number | Publication date |
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| JPS5687383A (en) | 1981-07-15 |
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