JPS6091746A - Communication control equipment - Google Patents

Communication control equipment

Info

Publication number
JPS6091746A
JPS6091746A JP58198978A JP19897883A JPS6091746A JP S6091746 A JPS6091746 A JP S6091746A JP 58198978 A JP58198978 A JP 58198978A JP 19897883 A JP19897883 A JP 19897883A JP S6091746 A JPS6091746 A JP S6091746A
Authority
JP
Japan
Prior art keywords
data
circuit
conversion
conversion circuit
converted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58198978A
Other languages
Japanese (ja)
Inventor
Yasushi Shibata
泰 芝田
Tetsuo Kawamura
哲夫 川村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58198978A priority Critical patent/JPS6091746A/en
Publication of JPS6091746A publication Critical patent/JPS6091746A/en
Pending legal-status Critical Current

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  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To detect earlier a fault of a data converting circuit or a data inverting circuit by inverting or converting again converted or inverted data and comparing the data with the data before conversion or inversion. CONSTITUTION:The data to be transmitted is converted by a data converting circuit 5 according to a prescribed rule, fed to an AND circuit 8 and also to a data inverting circuit 6, where the converted data is brought to the state before conversion according to the said rule. An output of the data inverting circuit 6 is fed to a comparator circuit 7, where the output is compared and checked with the data before conversion. If a fault exists in the data conversion circuit 5, the data before conversion and the data before inversion are dissident, a dissidence signal is outputted from the comparator circuit 7, the detection of fault is reported and also no defective data is outputted from the AND circuit 8.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は通信制御装置におけるデータ変換回路または逆
変換回路の障害検出回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a fault detection circuit for a data conversion circuit or inverse conversion circuit in a communication control device.

〔発明の背景〕[Background of the invention]

第１図に示すようにデータを一定の規則に従つて変換（
例えばＮ　ＲＺ　Ｉの様な伝送のための変換やあるいは
暗号化などの変換）して他装置または他システムに送信
し、受信したデータを前記規則に従って逆変換する装置
間において、データ変換回路またはデータ逆変換回路の
障害を独自に検出する方法は持っていなか−た。通常こ
れらの障害は第１図の様に行なわれているパリティチェ
ックやＣ，Ｅｔｃにより通信回線の伝送上の障害などと
ともに検出されており、データ変換回路またはデータ逆
変換回路の障害の早期検出が不可能であり、変換回路ま
たは逆変換回路と回線上の障害の区別が困難であった。As shown in Figure 1, data is converted according to certain rules (
For example, a data conversion circuit or a data converter is used between devices that perform conversion for transmission such as N RZ I or conversion such as encryption) and send it to another device or system, and then reverse convert the received data according to the above rules. There was no unique method for detecting faults in the inverse conversion circuit. Normally, these failures are detected along with communication line transmission failures by parity checks, C, etc. as shown in Figure 1, and early detection of failures in data conversion circuits or data inversion circuits is essential. It was difficult to distinguish between a conversion circuit or inverse conversion circuit and a fault on the line.

〔発明の目的〕[Purpose of the invention]

本発明の目的は前述の如き問題点を解消し、データ変換
回路またはデータ逆変換回路の障害の早期検出を可能と
した通信制御装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a communication control device that solves the above-mentioned problems and enables early detection of failures in data conversion circuits or data inversion circuits.

〔発明の概要〕[Summary of the invention]

本発明ではデータを一定の規則に従りて変換または逆変
換する回路？もつ通信制御装置において、前記データ変
換回路よたはデータ逆変換回路を用いて処理されたデー
タを逆変換回路または変換回路χ用いて再度逆変換ある
いは変換乞行ない、変換または逆変換処理前のデータと
再度逆変換または変換を行なつた後のデータを比較する
ことにより前記データ変換回路またはデータ逆変換回路
の障害？チェックする様にしたことを特徴とする。In the present invention, is there a circuit that converts or inversely converts data according to certain rules? In a communication control device having a data conversion circuit or a data inverse conversion circuit, the data processed using the data conversion circuit or the data inverse conversion circuit is inversely converted or converted again using the inverse conversion circuit or the conversion circuit χ, and the data before the conversion or inverse conversion processing is Is there a failure in the data conversion circuit or data inversion circuit by comparing the data after performing the inverse conversion or conversion again? The feature is that it is checked.

〔発明の実施例〕[Embodiments of the invention]

以下、図面乞用いて本発明の詳細な説明する０第２図は
本発明の一実施例のブロック図であり送信部である。５
は送信すべきデータを一定の規則に従つて変換するデー
タ変換回路、６は変換されたデータを前記規則に従フて
変換前の状態にするデータ逆変換回路、７は変換前のデ
ータと逆変換後のデータを比較チェックし、異なりてい
れば障害検出を報告すると共にデータの送信を禁止する
比較回路である。即ち、データ変換回路に障害があった
場合は逆変換後のデータと不一致になり、７より不一致
信号が出力されるので該不一致信号により即座に障害報
告をすると共に、８に与えられた該不一致信号により不
良データを出力しない様処することができる。なお日の
出力は送信画＃Ｉ（図示せず）に接続されており、送信
タイミング制御後送信される０ 第３図は本発明を両方向交互伝送の通信制御装置に適用
した実施例のブロック図である。この場合互いに一方の
み動作するので送信に利用するデータ変換回路と受信に
利用するデータ逆変換回路を互いに利用して、送信時は
変換後のデータを逆変換回路に入力し、変換前のデータ
と逆変換後のデータを比較して異なっていれば障害検出
を報告すると共にデータの送信を禁止する。また受信時
は送信時とは反対に逆変換後のデータを変換回路に入力
し、逆変換前のデータと変換後のデータを比較して異な
りていれば障害検出を報告すると共に受信データを逆変
換回路から先の回路に伝えない。この様にして送信時の
データ変換回路のチェックおよび受信時のデータ逆変換
回路のチェックをわずかな論理の追加により実現できる
Ｏ 〔発明の効果〕 以上の如く本発明によれば、変換されたブタまたは逆変
換されたデータを再び逆変換まは変換して変換または逆
変換前のデータと比するために、データ変換回路または
データ逆換回路の障害を早期に検出することができるThe present invention will be described in detail below with reference to the drawings. FIG. 2 is a block diagram of an embodiment of the present invention, and is a transmitting section. 5
6 is a data conversion circuit that converts the data to be transmitted according to certain rules; 6 is a data inverse conversion circuit that converts the converted data into the state before conversion according to the rules; 7 is an inverse of the data before conversion. This is a comparison circuit that compares and checks the converted data and, if different, reports failure detection and prohibits data transmission. That is, if there is a fault in the data conversion circuit, the data after inverse conversion will not match, and a mismatch signal will be output from 7, so the fault will be immediately reported by the mismatch signal, and the mismatch given to 8 will be detected. The signal can be used to prevent defective data from being output. Note that the output of the day is connected to the transmission picture #I (not shown), and is transmitted after transmission timing control. It is. In this case, only one of them operates, so the data conversion circuit used for transmission and the data inverse conversion circuit used for reception are used together, and when transmitting, the converted data is input to the inverse conversion circuit, and the data before conversion is input to the inverse conversion circuit. The data after the inverse transformation is compared, and if there is a difference, a fault detection is reported and data transmission is prohibited. Also, during reception, the data after inverse conversion is input into the conversion circuit, contrary to the time of transmission, and the data before inverse conversion and the data after conversion are compared, and if they are different, a fault detection is reported and the received data is inverted. The information is not transmitted from the conversion circuit to the next circuit. In this way, it is possible to check the data conversion circuit during transmission and the data inversion circuit during reception by adding a small amount of logic. [Effects of the Invention] As described above, according to the present invention, the converted data Or, in order to inversely transform or transform the inversely transformed data again and compare it with the data before the transformation or inverse transformation, a failure in the data transformation circuit or the data inversion circuit can be detected at an early stage.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のデータ変換を行なった場合ブロック図、
第２図は本発明の一実施例σ〕フ。 ツク図、第６図は本発明の他の実施例のブロク図である
。 １・・・パリティジェネレータ、 ４・・・パリティチェッカ、２，５．９・・・データ変
換回１３．６．１０・・・データ逆変換回路、７．１１
．１２・・・比較回路、８．１ｊ１４・・・ＡＮＤ巨１
５・・・０几回路、　１６．１７・・・切換え回ヒ第　
１　恥 送 た−７ 咬 変 の り 各、 路、Figure 1 is a block diagram when conventional data conversion is performed.
FIG. 2 shows one embodiment of the present invention. 6 is a block diagram of another embodiment of the present invention. 1... Parity generator, 4... Parity checker, 2, 5.9... Data conversion circuit 13.6.10... Data inverse conversion circuit, 7.11
．． 12...Comparison circuit, 8.1j14...AND big 1
5...0 circuit, 16.17...switching circuit
1 Shame sent - 7 bite change paste each, road,

Claims (1)

【特許請求の範囲】[Claims] １、　データを一定の規則に従つて変換または逆変換す
る回路をもつ通信制［相］装置において、前記データ変
換回路またはデータ逆変換回路を用いて処理されたデー
タを逆変換回路または変換回路を用いて再度逆変換ある
いは変換を行ない変換または逆変換処理前のデータと再
度逆変換または変換乞行な−た変換後のデータを比較す
ることにより前記データ変換回路またはデータ逆変換回
路の障害χチェックするようにしたことを特徴とする通
信制御装置。1. In a communication system [phase] device that has a circuit that converts or inversely converts data according to certain rules, data processed using the data conversion circuit or data inversion circuit is converted to the inverse conversion circuit or conversion circuit. Check the failure χ of the data conversion circuit or data inversion circuit by performing inverse conversion or conversion again using the data conversion circuit and comparing the data before the conversion or inverse conversion process with the data after the conversion or inverse conversion process. A communication control device characterized in that:
JP58198978A 1983-10-26 1983-10-26 Communication control equipment Pending JPS6091746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58198978A JPS6091746A (en) 1983-10-26 1983-10-26 Communication control equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58198978A JPS6091746A (en) 1983-10-26 1983-10-26 Communication control equipment

Publications (1)

Publication Number Publication Date
JPS6091746A true JPS6091746A (en) 1985-05-23

Family

ID=16400085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58198978A Pending JPS6091746A (en) 1983-10-26 1983-10-26 Communication control equipment

Country Status (1)

Country Link
JP (1) JPS6091746A (en)

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