JPS6081874A - Photoelectric converter - Google Patents
Photoelectric converterInfo
- Publication number
- JPS6081874A JPS6081874A JP58189578A JP18957883A JPS6081874A JP S6081874 A JPS6081874 A JP S6081874A JP 58189578 A JP58189578 A JP 58189578A JP 18957883 A JP18957883 A JP 18957883A JP S6081874 A JPS6081874 A JP S6081874A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- groove
- semiconductor
- photoelectric conversion
- flat end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 30
- 239000013078 crystal Substances 0.000 claims abstract description 6
- 238000006243 chemical reaction Methods 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 4
- 238000004070 electrodeposition Methods 0.000 claims description 2
- 239000007772 electrode material Substances 0.000 abstract description 2
- 238000002955 isolation Methods 0.000 abstract description 2
- 230000008878 coupling Effects 0.000 abstract 2
- 238000010168 coupling process Methods 0.000 abstract 2
- 238000005859 coupling reaction Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000007789 gas Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- JCLFHZLOKITRCE-UHFFFAOYSA-N 4-pentoxyphenol Chemical compound CCCCCOC1=CC=C(O)C=C1 JCLFHZLOKITRCE-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 241001290610 Abildgaardia Species 0.000 description 1
- 229920000049 Carbon (fiber) Polymers 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 101710205482 Nuclear factor 1 A-type Proteins 0.000 description 1
- 101710170464 Nuclear factor 1 B-type Proteins 0.000 description 1
- 102100022162 Nuclear factor 1 C-type Human genes 0.000 description 1
- 101710113455 Nuclear factor 1 C-type Proteins 0.000 description 1
- 101710140810 Nuclear factor 1 X-type Proteins 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004917 carbon fiber Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000006258 conductive agent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013311 covalent triazine framework Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000003112 inhibitor Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000005340 laminated glass Substances 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000007750 plasma spraying Methods 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Engineering & Computer Science (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Sustainable Energy (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、PINまたはPN接合を少なくとも1つ有
するアモルファス半導体を含む非単結晶半導体が絶縁表
面を有する基板上に設けられた光電変換素子(単に素子
ともいう)を複数個電気的に直列接続した、高い電圧の
発生が可能な光電変換装置の連結部の構造に関する。Detailed Description of the Invention The present invention provides a plurality of photoelectric conversion elements (also simply referred to as elements) in which a non-single crystal semiconductor including an amorphous semiconductor having at least one PIN or PN junction is provided on a substrate having an insulating surface. The present invention relates to the structure of a connecting portion of photoelectric conversion devices that are electrically connected in series and are capable of generating high voltage.
この発明は、複数の素子間の連結に必要な面積を従来の
マスク合わせ方式のl/10〜] /100にするため
、レーザスクライブ方式を用いたことを特徴としている
。The present invention is characterized in that a laser scribing method is used to reduce the area required for connecting a plurality of elements to 1/10 to 1/100 of the conventional mask alignment method.
この発明は、第1および第2の素子の電気的連(2)
結を行う第2の開溝を、PNまたはPIN接合を有する
非単結晶半導体とその下に予め設けられている第1の電
極とを同時に除去してしまい、その結果露呈される第1
の素子の第1の電極の側面および5μ以下の巾の平端部
(上端面または平端部ともいう)に第2の素子の第2の
電極を連結して直列接続を行うものである。The present invention provides electrical connection between the first and second elements (2). The electrode is removed at the same time, and as a result, the exposed first
The second electrode of the second element is connected to the side surface of the first electrode of the element and the flat end portion (also referred to as the upper end surface or flat end portion) having a width of 5 μm or less to perform series connection.
本発明は、この第2の開溝は第1の電極を構成する第1
の開溝よりも第1の素子の第1の電極の内部にわたらせ
て設ける。その結果、第1および第2の開溝の間に第1
の電極材料の一部が凸部を構成残存せしめることにより
、第1の開溝に充填された絶縁性を有する半導体のLS
による多結晶化防止剤として設けたものである。この凸
部により、第1の素子、第2の素子のそれぞれの第1の
電極間の電気的アイソレイションおよび第2の素子の第
1および第2の電極間での電気的ショート(レーザ・ア
ニールで作られた多結晶は導電性である)を防止するこ
とを目的としている。In the present invention, the second groove is the first groove constituting the first electrode.
The opening groove is provided so as to extend inside the first electrode of the first element. As a result, between the first and second open grooves, the first
By leaving a part of the electrode material to form a convex portion, the LS of the semiconductor having insulating properties filled in the first groove is
It was provided as a polycrystallization inhibitor. This convex portion provides electrical isolation between the first electrodes of the first element and the second element, and electrical short-circuiting (laser annealing) between the first and second electrodes of the second element. Polycrystalline materials made of polycrystalline materials are electrically conductive.
この発明は、連結部での電気的接合を第1の素(3)
子の第1の電極を構成する透光性導電膜(CTPという
)の側面に第2の素子の第2の電極を延在して、側面お
よび5μ以下のlJの平端部に密接せしめて用いること
により、連結部でのコンタクトに必要な面積を減少せし
めるとともに、1Ω/cm(1cmの中あたり1Ω)以
下のコンタクト抵抗とせしめたことを特徴としている。This invention connects the electrical connection at the connecting portion to the first element (3) by attaching the second electrode of the second element to the side surface of a transparent conductive film (referred to as CTP) constituting the first electrode of the element. By extending it and using it in close contact with the side surface and the flat end of lJ of 5 μ or less, the area required for contact at the connecting part can be reduced, and the contact resistance of 1 Ω/cm (1 Ω per 1 cm) or less can be achieved. It is characterized by the fact that
さらに第2の開溝を、第1の素子の第1の電極位置上に
わたって設けることにより、LSの走査の際の揺らぎ(
±20μを有する)により、第2の素子の第1の電極と
ショートしてしまうことにより製造上の冗長度(余裕度
)を与えることを特徴としている。Furthermore, by providing a second open groove over the first electrode position of the first element, fluctuations during LS scanning (
±20μ), which causes a short circuit with the first electrode of the second element, thereby providing manufacturing redundancy (margin).
従来、LS方式において、第1図に示すごとく、その連
結部におけるCTFO巾(66)は20〜60μの巾を
コンタクト部の面積として必要としていた。Conventionally, in the LS method, as shown in FIG. 1, the CTFO width (66) at the connecting portion required a width of 20 to 60 μm as the area of the contact portion.
即ち第1図において、これは従来の構造に示すが、第1
のLSにより設けられた開溝(13)、さらにその左端
部(14)より第2の開溝の右端部が右側であった時、
即ち距離(65)が図のごとく負である構(4)
造が知られている。かかる構造において、第2の開溝(
18)により斜線領域(69)が導電性を有する多結晶
となる。その結果、第1の素子(31)の第1の電極(
37)と第2の素子(11)の第2の電極(38)とが
、また第2の素子の第2の電極(38)と第2の素子の
第1の電極(39)とがショートしてしまう。さらに加
えて第2の開溝の作製に必要なLSでの走査(スキャン
)の揺らぎが±20μ一般的には±10μもあるため、
第2の電極とのコンタクトは(66)に示すごと<30
〜50μも露呈させなければならない。さらにこの場合
、この第1の素子(11)の第1の電極(37)の上端
面を意図的に残すためのレーザ光の出力がきわめて微妙
になってしまい、工業的にまったく実用性のない構造と
なってしまった。他方、本発明はかかる欠点を除去しセ
ルファライン構造で連結部を作製したものである。That is, in FIG. 1, this is shown in the conventional structure;
When the right end of the second open groove is on the right side from the open groove (13) provided by the LS, and the left end (14) thereof,
That is, a structure (4) in which the distance (65) is negative as shown in the figure is known. In such a structure, the second open groove (
18), the shaded region (69) becomes polycrystalline with conductivity. As a result, the first electrode (
37) and the second electrode (38) of the second element (11), and also the second electrode (38) of the second element and the first electrode (39) of the second element. Resulting in. In addition, since the scanning fluctuation in the LS required to create the second open groove is ±20μ, generally ±10μ.
The contact with the second electrode is <30 as shown in (66).
~50μ must also be exposed. Furthermore, in this case, the output of the laser beam to intentionally leave the upper end surface of the first electrode (37) of the first element (11) becomes extremely delicate, which is completely impractical industrially. It has become a structure. On the other hand, the present invention eliminates this drawback and creates a connecting portion with a self-aligned structure.
本発明においては、このLSI程を用いるに加えて、そ
のスクライブラインの連結部での合わせ精度に非単結晶
半導体とCTFとのスクライブされる(5)
程度(耐熱性、飛散性)の差を利用して、CTFを5μ
以下の巾に自動的に露呈せしめるという方法を用いるこ
とにより冗長(余裕)度をもたせたことが重要である。In the present invention, in addition to using this LSI, we also take into account the difference in the degree of scribing (heat resistance, scattering) between non-single crystal semiconductors and CTFs (5) in the alignment accuracy at the connecting parts of the scribe lines. Use this to reduce CTF to 5μ
It is important to provide a degree of redundancy (margin) by using a method of automatically exposing the following widths.
そのため隣合った素子間の第1の電極(下側)と他の素
子の第2の電極(上側電極)とが、第2の電極より延在
したリード(連結部)により第1の電極とその側面およ
び上端面よりなるコンタクトにおいて電気的連結させる
ことにより、スクライブラインの開溝の位置に冗長度を
持たせることができた。Therefore, the first electrode (lower side) between adjacent elements and the second electrode (upper electrode) of another element are connected to the first electrode by a lead (connection part) extending from the second electrode. By electrically connecting the contact formed by the side surface and the upper end surface, it was possible to provide redundancy in the position of the open groove of the scribe line.
以下に図面に従って本発明の実施例の詳細を示す。DESCRIPTION OF THE PREFERRED EMBODIMENTS Details of embodiments of the invention are shown below in accordance with the drawings.
第2図は本発明の製造工程を示す縦断面図である。FIG. 2 is a longitudinal sectional view showing the manufacturing process of the present invention.
第2図(A)において、絶縁表面を有する基板例えば透
光性基板(1)即ちガラス板(例えば厚さ1.2 mm
、長さく図面では左右方向) 60cm、中20cn+
)を用いた。さらにこの上面に全面にわたって透光性導
電膜(CTF )例えばITO(約1500人)十Sn
O□(200〜400人)またはハロゲン元素が添加(
6)
された酸化スズを主成分とする透光性導電膜(1500
〜2000人)を真空蒸着法、LP CVD法またはプ
ラズマCVD法またはスプレー法により形成させた。こ
の後この基板の下側または上側より、YAGレーザ加工
機(日本レーザ製)により出力0.5〜2W出力を加え
、スポット径30〜70μφ代表的には50μφをマイ
クロ・コンピュータを制御して照射し、を作製した。In FIG. 2(A), a substrate having an insulating surface, such as a transparent substrate (1), that is, a glass plate (for example, 1.2 mm thick) is used.
, the length is horizontal in the drawing) 60cm, medium 20cm+
) was used. Furthermore, a transparent conductive film (CTF) such as ITO (approximately 1500 layers) and Sn
O□ (200-400 people) or halogen elements added (
6) Transparent conductive film mainly composed of tin oxide (1500
~2000 people) were formed by vacuum evaporation, LP CVD, plasma CVD, or spraying. After that, a YAG laser processing machine (manufactured by Nippon Laser) applies an output of 0.5 to 2 W from the bottom or top of this substrate, and irradiates the substrate with a spot diameter of 30 to 70μφ, typically 50μφ, under control of a microcomputer. and created.
スクライビングにより形成された開溝(13)は巾約5
0μ長さ20c…深さは第1の電極それぞれを完全に切
断分離した。さらにこの上面をハロゲン元素気体または
液体に浸し、低級酸化物を除去した。The open groove (13) formed by scribing has a width of approximately 5
0μ Length 20c...Depth completely cut and separated each of the first electrodes. Furthermore, this upper surface was immersed in a halogen element gas or liquid to remove lower oxides.
気体においては弗素系の気体(CF3 Br、 Ci)
凰5IIl+)分浸して除去した。かくして第1の素子
(31)および第2の素子り11)を構成する中は10
〜20mmとした。その間の開溝は20〜70μ例えば
50μとして(7)
それぞれを完全にアイソレイションをした・以上のレー
ザスクライブ方式により、第1の電極を構成するCTF
(2)を切断分離して開溝を形成した。この後この上
面にプラズマCVD法、光CVD法またはLP CVI
I法によりPNまたはPIN接合を有する非単結晶半導
体N(3)を0.2〜1.0μ代表的には0.4〜0.
5μの厚さに形成させた。その代表例はP型半導体(S
ixC1−Xx =0.850〜150人)−夏型アモ
ルファスまたはセミアモルファスのシリコン半導体(0
,4〜0.5μ)−N型の微結晶(100〜200人)
を有する半導体よりなる1つのPIN接合を有する非単
結晶半導体、またはP型半導体(SixCl−x) 夏
型、N型、P型St半導体−夏型5ixGe l−X半
導体−N型Siまたは5fXCl−x (0< x〈1
)の半導体よりなる2つのPIN接合と1つのPN接合
を有するタンデム型のPINPIN・・・・PIN接合
の半導体(3)である。Among gases, fluorine-based gases (CF3 Br, Ci)
凰5III+) and removed. Thus, the first element (31) and the second element (11) are made up of 10
~20mm. The opening groove between them is 20 to 70μ, for example, 50μ.
(2) was cut and separated to form an open groove. After this, plasma CVD method, photo CVD method or LP CVI is applied to this upper surface.
A non-single crystal semiconductor N (3) having a PN or PIN junction is prepared by the I method to a thickness of 0.2 to 1.0μ, typically 0.4 to 0.0μ.
It was formed to a thickness of 5μ. A typical example is a P-type semiconductor (S
ixC1-Xx = 0.850 to 150) - Summer type amorphous or semi-amorphous silicon semiconductor (0
,4~0.5μ)-N type microcrystals (100~200 people)
or P-type semiconductor (SixCl-x) Summer-type, N-type, P-type St semiconductor - Summer-type 5ixGe I-X semiconductor - N-type Si or 5fXCl- x (0<x<1
) is a tandem type PIN PIN having two PIN junctions and one PN junction made of a semiconductor. This is a PIN junction semiconductor (3).
かかる非単結晶半導体(3)を第1の開溝および素子領
域の全面にわたって均一の膜厚で形成させた。さらに第
2図(B)に示されるごとく、第(8)
1の開溝(13)の左方向側に第2の開溝(18)を5
0μの巾に50〜300μの距離をわたらせて第2のレ
ーザスクライブ工程により形成させた。Such a non-single crystal semiconductor (3) was formed to have a uniform thickness over the first groove and the entire surface of the element region. Further, as shown in FIG. 2(B), a second open groove (18) is formed on the left side of the first open groove (13) (8).
It was formed by a second laser scribing process over a width of 0μ and a distance of 50 to 300μ.
かくして第2の開溝(18)は第1の電極の側面(8>
、< 9 )および上端面(6)を露出させた。The second open groove (18) thus forms a side surface (8>) of the first electrode.
, < 9) and the upper end surface (6) were exposed.
またこの第2の開溝(18)と第1の開溝(13)との
間にCTFの一部が凸部(16)を構成して残存させた
。Further, a portion of the CTF remained between the second open groove (18) and the first open groove (13), forming a convex portion (16).
この第2の開講の構造とレーザ光の照射条件との関係を
さらに第3図、第4図に示す。The relationship between the structure of this second opening and the laser beam irradiation conditions is further shown in FIGS. 3 and 4.
第3図は第2図における連結部(12)を拡大し第1図
の従来例に対応して示したものである。即ち、第3図(
A)において、基板(1)上のCTF(2)に第1の開
溝(13)が設けられ、さらにその左端部(14)より
第2の開溝(18)の右端部(9)は左側に位置し、距
! (15)は正となる。FIG. 3 shows an enlarged view of the connecting portion (12) in FIG. 2, corresponding to the conventional example shown in FIG. That is, Fig. 3 (
In A), the first open groove (13) is provided in the CTF (2) on the substrate (1), and the right end (9) of the second open groove (18) is further extended from the left end (14) of the first open groove (13). Located on the left, distance! (15) is positive.
(図面では約50μを示す)即ち、この結果を第1の素
子の第1の電極(37)と同一材料のCTFが凸部(1
6)を構成して残存している。(Approximately 50μ is shown in the drawing.) That is, this result shows that the CTF made of the same material as the first electrode (37) of the first element has a convex portion (1
6) remains.
即ち、第2の開溝を形成させるに際し、アモル(9)
ファス珪素(3)はレーザアニールにより斜線領域(6
9)が多結晶化され、導電性となってしまう。That is, when forming the second open groove, the amol (9) and the fas silicon (3) are laser annealed to form the diagonal area (6).
9) becomes polycrystalline and becomes conductive.
しかしこの凸部の存在により、第1の開講(13)に充
填された基板近傍のアモルファス半導体は多結晶化され
ず、絶縁性を有せしめることができた。However, due to the presence of this convex portion, the amorphous semiconductor near the substrate filled in the first opening (13) was not polycrystallized and was able to have insulating properties.
即ち、この凸部が残存すると、第1の開溝に充填された
半導体の基板との界面近傍に多結晶半導体領域が作られ
ることがない。その結果、第2の開溝を形成することに
より、第2の素子(11)の第1および第2の導電膜(
39)、<38)が互いにショートすることがなく、正
常の光電変換素子として動作させることができるように
なった。That is, if this convex portion remains, a polycrystalline semiconductor region will not be formed near the interface between the semiconductor filled in the first trench and the substrate. As a result, by forming the second open groove, the first and second conductive films (
39) and <38) are not short-circuited with each other, and can now be operated as a normal photoelectric conversion element.
さらに第3図(A)において、第2の開溝(18)はC
TF (2)の側面(8)、< 9 )に加えて、平端
面(上平端部)(6)を存在させている。Furthermore, in FIG. 3(A), the second open groove (18) is C
In addition to the side surfaces (8), <9) of TF (2), a flat end surface (upper flat end portion) (6) is present.
第3図(B)は、この平端部(6)の上面図を第3図(
C)に示した走査電子顕微鏡写真(倍率4000倍、加
速電圧10KV)に対応して示している。Figure 3 (B) shows a top view of this flat end (6).
It is shown corresponding to the scanning electron micrograph shown in C) (magnification: 4000 times, acceleration voltage: 10 KV).
第3図(B )、< C)において、(70)は基板ガ
ラス(1)に生じたクラック、(71)はLSにより生
(10)
じた開溝周辺部の残存物、(2)は導電膜の平端部であ
る。この平端部は珪素に比べてCTFがレーザ光に対し
4倍も強く、スクライブされにくいことによりセルファ
ライン的に形成されたものである。In Fig. 3 (B) and <C), (70) is a crack that occurred in the substrate glass (1), (71) is a residue around the open groove caused by LS (10), and (2) is a This is the flat end of the conductive film. This flat end portion is formed in a self-aligned manner because CTF is four times stronger against laser light than silicon and is less likely to be scribed.
この特性を利用することが側面のみならず平端部(6)
をも第2の導電膜のコンタクト(連結部)とすることが
でき、ここでの接触抵抗を側面のみの場合の1.5Ω/
cmより0.3〜1Ω/cmに下げることができるよう
になった。This characteristic can be used not only for the side surfaces but also for the flat ends (6).
can also be used as a contact (connection part) for the second conductive film, and the contact resistance here is 1.5Ω/
It is now possible to lower the resistance from 0.3 to 1 Ω/cm.
この平端部の走査スピードとの関係を第3図に示す。The relationship between the flat end portion and the scanning speed is shown in FIG.
第4図は周波数30KIIz、出力1.ll11.光i
soμとしそのレーザ光の走査スピードを60cm /
分〜240cm/分に可変した場合の平端部の巾(μ)
との関係を示す。Figure 4 shows a frequency of 30KIIz and an output of 1. ll11. light i
soμ and the scanning speed of the laser beam is 60cm/
Width of flat end (μ) when variable from min to 240cm/min
Indicates the relationship between
この可変した場合の速度が60cm /分取上を有する
と、被膜の厚さ以上に平端部の巾を作ることができた。When the speed was changed to 60 cm 2 /preparative separation, it was possible to make the width of the flat end portion larger than the thickness of the coating.
即ちより走査スピードを高速とすることにより、この巾
も大きくとることができ、接触抵(11)
抗を少なくすることができた。That is, by increasing the scanning speed, the width can be increased, and the contact resistance (11) can be reduced.
第3図(C)は第3図における走査スピードが120c
m 7分の場合である。In Figure 3 (C), the scanning speed in Figure 3 is 120c.
This is the case of 7 minutes.
また5μ以上あると、集積化にとってlJが広(成りす
ぎ、実効面積の減少を生じ、かえって不都合となる。即
ち、この発明は、第2の開溝のCTF(2)と半導体(
2)とがともに基板」−を覆っている被加工物に対し、
その」二面にレーザ光を照射すると、そのレーザ光の出
力、走査スピードを調整することによりCTFの膜厚以
上の平端部(6)を作ることができるものである。Moreover, if it is 5 μ or more, lJ becomes too wide for integration, resulting in a decrease in the effective area, which is rather inconvenient.
2) For a workpiece that both covers the substrate,
By irradiating the two surfaces with a laser beam, a flat end portion (6) having a thickness greater than that of the CTF can be created by adjusting the output and scanning speed of the laser beam.
本発明においてはこの平坦部はSEMより明らかなよう
に、半導体とその下のCTFとを同時に1回のLSを行
うことにより同時的に即ちセルファライン的に作られる
ため、その巾の揺らぎも、第3図(C)に示すごとく±
0.5 μでおさえることができた。In the present invention, as is clear from the SEM, this flat part is created simultaneously, that is, in a self-line manner, by performing one LS on the semiconductor and the CTF underneath, so that the fluctuation in the width is also ± as shown in Figure 3 (C)
I was able to keep it down to 0.5μ.
本発明においては、この後、これら全体を】/1011
Fに30秒〜1分浸して表面の酸化珪素を除去せしめて
コンタクト抵抗を1Ω/cm以下にさせた。In the present invention, after this, the whole of these]/1011
The silicon oxide on the surface was removed by dipping in F for 30 seconds to 1 minute, and the contact resistance was reduced to 1 Ω/cm or less.
(12)
さらに本発明は従来例に示されるごとく、第1の電極の
表面(14X第1図参照)を露呈させるものではなく、
レーザ光が1.5〜5Wで多少強すぎても何等の支障が
ない。即ちレーザ光の出力パルスの強さに余裕を与える
ことができることが本発明の工業的応用の際きわめて重
要である。(12) Furthermore, the present invention does not expose the surface of the first electrode (see 14X Fig. 1) as shown in the conventional example, but
Even if the laser beam is a little too strong at 1.5 to 5 W, there will be no problem. That is, it is extremely important for the industrial application of the present invention to be able to provide a margin for the intensity of the output pulse of the laser beam.
以上のごとくにして本発明の連結部の第2の開溝を作製
した。The second open groove of the connecting portion of the present invention was produced in the manner described above.
さらに第2図において、この上面に第2図(C)に示さ
れるごとく、裏面の第2の電極(4)を形成し、さらに
第3のレーザスクライブ法の切断分離用の第3の開溝(
20)を設けた。Furthermore, in FIG. 2, a second electrode (4) on the back surface is formed on this top surface as shown in FIG. (
20) was established.
この第2の電極はレーザ光を用いることなくマ:(。This second electrode can be formed without using laser light.
スゲ術にて作製してもよい。It may also be created using sedge technique.
この第2の電極(4)は透光性導電膜を500〜140
0人の厚さにITO(@化インジューム・スズ)により
形成し、さらにその上面に反射性金属の銀を300〜3
000人の厚さに形成した。さらにその上面にアルミニ
ューム1銅、ニッケルまたはクロムとの2N膜を形成さ
せた。例えばITOを1050人、(13)
銀を1000人、さらに銅を1500人の3層構造とし
た。This second electrode (4) has a transparent conductive film of 500 to 140
It is made of ITO (indium tin oxide) to a thickness of 0.0 mm, and a reflective metal of silver is coated on the top surface with a thickness of 300 to 300 mm.
It was formed to a thickness of 1,000 people. Furthermore, a 2N film of aluminum 1 copper, nickel, or chromium was formed on the upper surface. For example, a three-layer structure was created with 1,050 ITO members, (13) 1,000 silver members, and 1,500 copper members.
このITOと銀は裏面側での入射光(10)の反射を促
し、600〜800nmの長波長光を有効に光電変換さ
せるためのものである。The ITO and silver are used to promote reflection of incident light (10) on the back surface side and to effectively photoelectrically convert long wavelength light of 600 to 800 nm.
さらにこのITOは連結部において第1の素子の第1の
電極(37)のコンタクト(6>、< 8 )に直接密
接する。即ちCTFの酸化物導電膜(37)と他の酸化
物導電膜(38)とが互いに密接してコンタクトを側面
および上端部に構成するためである。このため、このコ
ンタクト部において酸化物絶縁物が形成されることがな
く、信頼性」二きわめて好ましいものであった。Furthermore, this ITO is directly in close contact with the contact (6>, <8) of the first electrode (37) of the first element at the connection part. That is, this is because the CTF oxide conductive film (37) and the other oxide conductive film (38) are in close contact with each other to form contacts on the side surfaces and the upper end. Therefore, no oxide insulator is formed in this contact portion, and the reliability is extremely favorable.
これらは電子ビーム蒸着法またはプラズマCVD法を用
いて半導体層を劣化させない300℃以下の温度で形成
させた。These were formed using an electron beam evaporation method or a plasma CVD method at a temperature of 300° C. or lower, which does not cause deterioration of the semiconductor layer.
銀の下側にチタンを10〜30人の厚さに形成し、銀と
ITOとの密着性を向上させることは有効である。It is effective to form titanium on the underside of silver to a thickness of 10 to 30 mm to improve the adhesion between silver and ITO.
このITOは半導体(3)と裏面電極(4)との化学反
応による信頼性低下の防止、即ち信頼性の(14)
向上にも役立っている。This ITO also serves to prevent a decrease in reliability due to a chemical reaction between the semiconductor (3) and the back electrode (4), that is, to improve reliability (14).
かくのごとき裏面電極をレーザ光を上方より照射して第
2の電極を切断分離または酸化絶縁物に変成して第3の
開溝(20)(中50μ)を形成した場合を示している
。このレーザ光は半導体特に上面に密接するNまたはP
型の半導体層を少しえぐりだしく40)、隣合った第1
の素子(31)、第2の素子(1])間の開溝部での残
存金属または導電性半導体によるクロスト−り(リーク
電流)の発生を防止した。A case is shown in which a third open groove (20) (50 μm in diameter) is formed by irradiating such a back electrode with a laser beam from above and cutting and separating the second electrode or converting it into an oxide insulator. This laser light is applied to N or P which is in close contact with the semiconductor, especially the top surface.
Slightly gouge out the semiconductor layer of the mold 40), and
The occurrence of crosstalk (leakage current) due to residual metal or conductive semiconductor in the open groove between the first element (31) and the second element (1]) was prevented.
もちろん第2の電極の開溝部をスクリーン印刷法により
この部分の導電剤を除去して作製してもよい。Of course, the open groove portion of the second electrode may be formed by removing the conductive agent in this portion by screen printing.
かくして第2図(C)に示されるごとく、複数の素子(
31)、<11)を連結部(12)で直列接続する光電
変換装置を作ることができた。Thus, as shown in FIG. 2(C), a plurality of elements (
31) and <11) were connected in series at the connecting part (12).
第2図(D)はさらに本発明を光電変換装置として完成
させんとしたものであり、即ちバンシヘイション膜とし
てプラズマ気相法により窒化珪素膜(21)を500〜
2000人の厚さに形成させ、容素(15)
子間のリーク電流の発生を防いだ。さらに外部引き出し
端子(23)を周辺部(5)にて設けた。これらにポリ
イミド、ポリアミド、カプトンまたはエポキシ等の有機
樹脂(22)を充填した。FIG. 2(D) shows the attempt to further complete the present invention as a photoelectric conversion device, that is, a silicon nitride film (21) with a thickness of 500 to
It was formed to a thickness of 2,000 mm to prevent leakage current between the capacitors (15). Furthermore, an external lead-out terminal (23) was provided at the peripheral portion (5). These were filled with an organic resin (22) such as polyimide, polyamide, Kapton or epoxy.
かくして照射光(10)に対し、この実施例のごとき基
板(60cm X 20cm)において各素子を中14
.35mm、連結部のi】150μ、外部引出し電極部
の巾10mm、周辺部4mmにより、有効面積(192
mm x18.35mm X 32段 1106aJ即
ち92.2%)を得ることができた。その結果、セグメ
ントが10.3%の変換効率を有する場合、パネルにて
9.95%(AMI (100mW /cJ))にて1
0.4Hの出力電力を有せしめることができた。Thus, for the irradiation light (10), each element on the substrate (60 cm x 20 cm) as in this example is
.. Effective area (192
mm x 18.35 mm x 32 stages 1106aJ or 92.2%) was able to be obtained. As a result, if the segment has a conversion efficiency of 10.3%, at 9.95% (AMI (100mW/cJ)) at the panel, 1
It was possible to provide an output power of 0.4H.
以」二の実施例において明らかなように、本発明により
第1の電極と第2の電極との連結部を形成するためのレ
ーザスクライブ法での切断分離により、半導体下のCT
Fをも同時に除去し、その際、第2の開溝のみCTFの
側面および上端部とを同時に形成し、そこでの接触抵抗
を1Ω/cm (1cmあたり1Ω)以下にすることが
できた。As is clear from the following two examples, according to the present invention, the CT under the semiconductor is
F was also removed at the same time, and at that time, only the second open groove was simultaneously formed on the side surface and the upper end of the CTF, and the contact resistance there could be reduced to 1 Ω/cm (1 Ω per 1 cm) or less.
(16)
さらに連結部においては、第1の電極の側面および5μ
以下のきわめて狭い巾で隣の素子の第2の電極と連結を
行うため、この連結部(コンタクト部)の必要面積を従
来方法に比べて1/10以下に十分少なくさせ得ること
ができた。その結果、パネルの有効面積の向上に役立つ
ことができた。(16) Furthermore, in the connection part, the side surface of the first electrode and the 5μ
Since the connection is made to the second electrode of the adjacent element using the following extremely narrow width, the area required for this connection part (contact part) can be sufficiently reduced to 1/10 or less compared to the conventional method. As a result, the effective area of the panel could be improved.
以上はYAG レーザのスポット径をその出力0.5〜
3W(30μ入1〜5W(50μ)で用いた場合である
が、さらにそのスポット径を技術思想において小さくす
ることにより、この連結部をより小さく、ひいては光電
変換装置としての有効面積をより向上させることができ
るという進歩性を有している。The above is the spot diameter of YAG laser whose output is 0.5~
This is the case when using 3W (1 to 5W (50μ) in 30μ), but by further reducing the spot diameter based on the technical concept, this connection part can be made smaller and the effective area as a photoelectric conversion device can be further improved. It has an inventive step in that it can be done.
またさらにこのパネル例えば40cm X 20CI1
1% 600111X 2Ωcmまたは40cm X
120cmを6ケ、4ケまた1ケを直列にアルミサツシ
または炭素繊維枠内に組み合わせることによりパッケー
ジさせ、120cm x40cmのNEDO規格の大電
力用のパネルを設けることが可能である。Furthermore, this panel, for example, 40cm x 20CI1
1% 600111X 2Ωcm or 40cm
It is possible to package 6, 4 or 1 120 cm panels in series within an aluminum sash or carbon fiber frame to provide a 120 cm x 40 cm NEDO standard high power panel.
またこのNEDO規格のパネルはシーフレックスに(1
7)
より他のガラス板を本発明の光電変換装置の反射面側(
図面では上側)にはりあわせて合わせガラスとし、その
間に光電変換装置を配置し、風圧、雨等に対し機械強度
の増加を図ることも有効である。In addition, this NEDO standard panel is available in Seaflex (1
7) Place another glass plate on the reflective surface side of the photoelectric conversion device of the present invention (
It is also effective to make a laminated glass panel (upper side in the drawing) and place a photoelectric conversion device between them to increase mechanical strength against wind pressure, rain, etc.
第2図〜第4図において光入射は下側のガラス板よりと
した。しかし本発明はその光の入射側を上側より照射し
、上側電極はITOのみとし、基板には可曲性基板また
は金属上に絶縁膜が設けられた基板を用いることも同様
に可能である。In FIGS. 2 to 4, light was incident from the lower glass plate. However, in the present invention, the light incident side may be irradiated from above, the upper electrode may be made of only ITO, and the substrate may be a flexible substrate or a substrate provided with an insulating film on a metal.
第1図は従来の光電変換装置の連結部の概要を示す。
第2図は本発明の光電変換装置の製造工程を示す縦断面
図である。
第3図は本発明の第2の開溝部の拡大図である。
第4図は平端部のレーザ光の走査スピードとの関係を示
している。
特許出願人
株式会社半導体エネルギー研究所
代表者 山 崎 舜 平
(18)
Et 12 ′77 試1のFIG. 1 shows an outline of a connecting portion of a conventional photoelectric conversion device. FIG. 2 is a longitudinal sectional view showing the manufacturing process of the photoelectric conversion device of the present invention. FIG. 3 is an enlarged view of the second groove portion of the present invention. FIG. 4 shows the relationship between the flat end portion and the scanning speed of the laser beam. Patent applicant Semiconductor Energy Research Institute Co., Ltd. Representative Shunpei Yamazaki (18) Et 12 '77 Trial 1
Claims (1)
上のPNまたはPU接合を少なくとも1つ有する非単結
晶半導体と、該半導体上に第2の電極とを有する光電変
換素子を複数個圧いに電気的に直列接続せしめて前記基
板上に配設した光電変換装置において、第1および第2
の光電変換素子の第1の電極を構成せしめる第1の開溝
と、該第1の電極および第1の開溝上に設けられた前記
半導体と該半導体下の前記第1の電極とに第2の開溝を
前記第1の素子の前記第1の電極の側面および平端部を
露呈させて設け、前記第2の素子の前記第2の電極より
延在した連結部は前記側面および平端部に密接して設け
られたことを特徴とする光電変換装置。 2、特許請求の範囲第1項において、前記第1の(1) 素子の前記第1の電極位置上にわたって設けられた第2
の開溝と第1の開講との間に第1の電極を構成するjr
A料が残存して設げられたことを特徴とする光電変換装
置。 3、特許請求の範囲第1項において、第1の素子の第1
の電極の平端部は5μ以下であって、第1の電極の厚さ
以上のrpを有することを特徴とした光電変換装置。[Claims] 1. A first electrode on a substrate having an insulating surface, a non-single crystal semiconductor having at least one PN or PU junction on the electrode, and a second electrode on the semiconductor. In the photoelectric conversion device, a plurality of photoelectric conversion elements having
a first groove constituting a first electrode of a photoelectric conversion element; a semiconductor provided on the first electrode and the first groove; and a first electrode under the semiconductor; 2 open grooves are provided to expose the side surfaces and flat end portions of the first electrode of the first element, and the connecting portion extending from the second electrode of the second element is provided on the side surfaces and flat end portions. A photoelectric conversion device characterized in that it is provided in close proximity to. 2. In claim 1, the second electrode provided over the first electrode position of the first (1) element
jr constituting the first electrode between the opening groove and the first opening.
A photoelectric conversion device characterized in that a material A remains. 3. In claim 1, the first element of the first element
A photoelectric conversion device characterized in that the flat end portion of the electrode has a thickness of 5 μm or less and an rp that is greater than the thickness of the first electrode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58189578A JPH0620152B2 (en) | 1983-10-11 | 1983-10-11 | Photoelectric conversion device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58189578A JPH0620152B2 (en) | 1983-10-11 | 1983-10-11 | Photoelectric conversion device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6081874A true JPS6081874A (en) | 1985-05-09 |
JPH0620152B2 JPH0620152B2 (en) | 1994-03-16 |
Family
ID=16243672
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58189578A Expired - Lifetime JPH0620152B2 (en) | 1983-10-11 | 1983-10-11 | Photoelectric conversion device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0620152B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6337674A (en) * | 1986-07-31 | 1988-02-18 | Kyocera Corp | Photovoltaic device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5753986A (en) * | 1980-07-25 | 1982-03-31 | Eastman Kodak Co |
-
1983
- 1983-10-11 JP JP58189578A patent/JPH0620152B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5753986A (en) * | 1980-07-25 | 1982-03-31 | Eastman Kodak Co |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6337674A (en) * | 1986-07-31 | 1988-02-18 | Kyocera Corp | Photovoltaic device |
Also Published As
Publication number | Publication date |
---|---|
JPH0620152B2 (en) | 1994-03-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4755475A (en) | Method of manufacturing photovoltaic device | |
JPH0693515B2 (en) | Semiconductor device manufacturing method | |
JPS6081874A (en) | Photoelectric converter | |
JPH0476227B2 (en) | ||
JP2585503B2 (en) | Laser processing method | |
JPS6081875A (en) | Manufacture of photoelectric converter | |
JPS6014479A (en) | Manufacture of photoelectric conversion device | |
JP3209702B2 (en) | Photovoltaic device manufacturing method | |
JPS60123072A (en) | Photoelectric conversion semiconductor device | |
JPH11126914A (en) | Manufacture of integrated solar cell | |
JPS60113476A (en) | Manufacture of photoelectric conversion semiconductor device | |
JP2975749B2 (en) | Method for manufacturing photovoltaic device | |
JPS60211880A (en) | Manufacture of photoelectric conversion device | |
JPS60211881A (en) | Manufacture of semiconductor device | |
JPH0554274B2 (en) | ||
JPS6085574A (en) | Manufacture of semiconductor device | |
JPH0550870B2 (en) | ||
JPS60211817A (en) | Apparatus for photoelectric conversion | |
JPS60100481A (en) | Photoelectric converting semiconductor device | |
JPH0758797B2 (en) | Method for manufacturing photoelectric conversion semiconductor device | |
JPH0614556B2 (en) | Photoelectric conversion device and manufacturing method thereof | |
JPS60211882A (en) | Photoelectric conversion device and manufacture thereof | |
JPH0558270B2 (en) | ||
JPH0566755B2 (en) | ||
JPS59155973A (en) | Photoelectric conversion semiconductor device |