JPS6077490A - Ceramic multilayer circuit board and method of producing same - Google Patents

Ceramic multilayer circuit board and method of producing same

Info

Publication number
JPS6077490A
JPS6077490A JP18441883A JP18441883A JPS6077490A JP S6077490 A JPS6077490 A JP S6077490A JP 18441883 A JP18441883 A JP 18441883A JP 18441883 A JP18441883 A JP 18441883A JP S6077490 A JPS6077490 A JP S6077490A
Authority
JP
Japan
Prior art keywords
layer
gold
silver
conductor
paste
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18441883A
Other languages
Japanese (ja)
Inventor
矢野 晃朗
水野 福三
山崎 貴則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
Original Assignee
NGK Insulators Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd filed Critical NGK Insulators Ltd
Priority to JP18441883A priority Critical patent/JPS6077490A/en
Publication of JPS6077490A publication Critical patent/JPS6077490A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、混成集積回路部品に使用されるセラミック多
層配線基板およびその製造法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ceramic multilayer wiring board used for hybrid integrated circuit components and a method for manufacturing the same.

従来、混成東栢回路に用いられる多層配線基板d3J:
びその製造法として、例えば第1図に示ずJ:うに、セ
ラミックグリーンシー1・1」二にタングステン、ある
いはモリブデン等の凸融点金属を主成分と1る高融点金
属導体ペースト2、およびその導体ペース1・2の1部
が露出りる聞L二+3を有ずる絶縁ベースト4を重ね合
せ、高EA{貞金属の導体ペースト2の1部が露出する
開口3中に、導体べ一ス1ヘ2と同−のペースト2′を
印刷形成しIC後、還元雰囲気中C″焼成し、次いe導
休ベース1・2が焼結したγk融点金属>94木層十に
銀等の厚膜導休ペースト5を印刷し、酸化雰囲気′C焼
成しC.厚膜導体層を形成しCけラミック多層配線J^
板を4’?る事が知られCいる。
Conventionally, multilayer wiring board d3J used for hybrid Topaku circuit:
For example, as shown in FIG. Lay the insulating base 4 with L2+3 in which a part of the pastes 1 and 2 are exposed, and insert the conductor base 1 into the opening 3 where a part of the high EA metal conductor paste 2 is exposed. The same paste 2' as F2 was formed by printing, and after IC, C'' was fired in a reducing atmosphere. Print the film conductive paste 5 and sinter it in an oxidizing atmosphere to form a thick film conductor layer and create a lamic multilayer wiring J^
4' board? It is known that C.

ところが、厚膜導体ペースト5は、酸化雰囲気で焼結さ
れるため、このとぎ高融点金屈導体層が酸化されて電気
抵抗が高くなり、況成集{^回路としては不適なものと
なる。
However, since the thick film conductor paste 5 is sintered in an oxidizing atmosphere, the high-melting point metal conductor layer is oxidized and its electrical resistance becomes high, making it unsuitable for use as an integrated circuit.

この問題点を解決りるため、畠81!貞金屈導体層を保
護する保護膜の形成が検討され、例えば、特公昭53−
26305号公報に知られるJ、うにタングスデンある
いはしリブデン等からなる高融Jjヨ金属導体層上にニ
ツクルメッキを施し、イの上に金ペーストを印刷した後
、運元雰囲気中で金を焼結さμて保護層を形成し、高l
2}1ζd金属導体層を保護覆る方法が知られCいる。
In order to solve this problem, Hatake 81! The formation of a protective film to protect the conductor layer has been studied, for example,
After applying nickel plating on a high-melting JJ metal conductor layer made of tungsdenum or phosphodenum, etc., as known from Japanese Patent No. 26305, and printing gold paste on A, the gold was sintered in an ungen atmosphere. μ to form a protective layer, and
2} Methods of protectively covering a 1ζd metal conductor layer are known.

しかしながら、この方法に於で、ニツタルと金とが合金
を形成りる場合は、そのニツクル・金合金が酸化雰囲気
Cの厚膜導体ペーストの焼イリけ時に酸化され、また金
が単に焼付りられる場合は、その焼付層が比較的ボーラ
スC酸素を完全に遮…1りる稈には緻密にならないため
、結局、酸化雰囲気ぐの厚膜導休ベーストの焼{=JI
プ1、盲にニツケルメッ:1層が酸化され、酸化欣生成
にどもない導通抵抗の増加は避けられない問題点かあっ
i=。
However, in this method, if nickel and gold form an alloy, the nickel-gold alloy is oxidized during baking of the thick film conductor paste in oxidizing atmosphere C, and the gold is simply burned away. In this case, the baked layer does not completely block the bolus C oxygen and does not become dense in one culm.
Step 1: Nickelmetal layer 1 is oxidized, and the increase in conduction resistance due to the formation of oxide particles is an unavoidable problem.

また、特lift昭49−57366ン}公報に示され
るJ、うに、タングスデン,モリブfン等の導体層上に
、N1メッギ等の第1の保護導体層を形成し、イの1二
に金等の第2の保護導体層を形成し、溶融しC、合金か
ら成る保ms体層を形成する方法も知られているが、ニ
ッケルー金合金や、ニッケル−銅合金は、厚膜導体ペー
ス1・の焼4=Jけ時の酸化雰囲気中850℃焼成時で
表面が酸化されて、酸化膜を生成し電気抵抗が増加ずる
ため、導通不良となる問題点があった。
In addition, a first protective conductor layer such as N1 Meggi is formed on a conductor layer of J, sea urchin, tungsten, molybdenum, etc. as shown in the special publication 1973-57366, and There is also a known method of forming a second protective conductor layer such as nickel-gold alloy or nickel-copper alloy, and melting it to form a protective layer made of alloy. - During firing at 850° C. in an oxidizing atmosphere during firing 4, the surface was oxidized to form an oxide film and the electrical resistance increased, resulting in poor conductivity.

本発明は、前記のような問題魚を解決づるために、成さ
れたものであり、けラミック上に形成されたタングステ
ン或いはモリブデン等の高融点金属層上に、V膜導体ペ
ーストを空気中800℃以上で焼成して厚膜専休層を形
成しても、高融点金属層と厚膜導休層間に、酸化膜を生
成タる事なく充分な導電性を右づるセラミック多層配線
基板とその製造法を提供りる事を目的とりる。
The present invention has been made to solve the above-mentioned problems, and a V film conductor paste is applied in air for 800 minutes on a high melting point metal layer such as tungsten or molybdenum formed on ceramic. A ceramic multilayer wiring board that maintains sufficient electrical conductivity without forming an oxide film between the high melting point metal layer and the thick conductive layer even if it is fired at temperatures above ℃ to form a thick conductive layer. The purpose is to provide manufacturing methods.

本発明は、セラミック基板と高融点金属を主成分とする
導体層どが交互に積層された霞出導休層上に鉄屈金属層
がメッキにより形成ざれ、そのメッキ表面上に、金と銀
とをモル比で1/1〜1/4含む合金層が形成され、そ
の合金層上に酸化雰囲気中e焼結されたI17+股導体
層が形成されCいる事を特徴とづるセラミック多層配線
基板Cある。
In the present invention, a ferroconductive metal layer is formed by plating on a hazy conductive layer in which a ceramic substrate and a conductor layer mainly composed of a high-melting point metal are laminated alternately, and gold and silver are formed on the plating surface. A ceramic multilayer wiring board characterized in that an alloy layer containing 1/1 to 1/4 in molar ratio is formed, and an I17+ crotch conductor layer sintered in an oxidizing atmosphere is formed on the alloy layer. There is C.

さらに本発明の製造法は、アルミナ貿レラミックス等よ
りなるグリーンシー1・上にタングスデン,モリブデン
等の高融点金属を主成分とJる導体ペース1・をスクリ
ーン印刷し、その上に前記レラミックスと同!1の絶縁
ペーストと前記導体ペーストとを交互に複数層スクリー
ン印刷で重ねた後、還冗雰囲気中C焼成し、4!ノられ
Iこ焼成体の露出導体層上に鉄肌金属層をメッキにJ:
り形成した後、該メッキ表面上に金と銀とをモル比で1
/1〜1/4含むベーストをスクリーン印刷し、100
0〜1100℃の非酸化性雰囲気で加熱してペーストを
溶融し゛C、金、銀の溶融合金層を形成し、その合金層
上に厚躾導休層をスクリーン印刷’Cmfliシて、酸
化雰囲気中で焼成1ることを特徴とタるセラミック多層
配線基板の製造法である。
Furthermore, the manufacturing method of the present invention includes screen printing a conductor paste 1 containing high melting point metals such as tungden and molybdenum as a main component on a green sheet 1 made of alumina laminate, etc.; Same as! After the insulating paste of No. 1 and the conductive paste are alternately stacked by multi-layer screen printing, C firing is performed in a redundant atmosphere, and 4. Plating an iron skin metal layer on the exposed conductor layer of the fired body:
After forming the plating, gold and silver are added in a molar ratio of 1 on the plating surface.
Screen print a base containing /1 to 1/4, 100
The paste is melted by heating in a non-oxidizing atmosphere at 0 to 1100°C to form a molten alloy layer of gold and silver, and a thick conductive layer is screen printed on the alloy layer in an oxidizing atmosphere. This is a method for manufacturing a ceramic multilayer wiring board, which is characterized by firing the ceramic multilayer wiring board.

木弁明の訂細を、第2図を参照して各工程ごとに順次説
明Jる。
The details of the tree defense will be explained one by one for each step with reference to Figure 2.

まず、アルミナ,ベリリア等を主成分とづるセラミック
グリーンシー1−を、公知のドクターブレード法等によ
り調製し、混成集伯回路基板として必要な1法に切断し
たセラミックグリーンシ一ト6を準備タる。
First, a ceramic green sheet 1- whose main components are alumina, beryllia, etc. is prepared by a known doctor blade method, etc., and a ceramic green sheet 6 is prepared by cutting the ceramic green sheet 6 into pieces necessary for a hybrid circuit board. Ru.

次いで、そのグリーンシー1・6土に、タングスアン,
モリブデン等の高融点金属、りなわちレラミツクグリー
ンシ一ト6の焼成渇磨J、りも融点が高く、かつ電気抵
抗の低い金屈を主成分とする導体ベーストと、該導体ペ
ーストの一部が露出リる聞[1をイ■りるグリーンシー
1一6ど同−成分を主原料どづる絶縁ベーストとを、ス
クリーン印刷により交Hに印刷し、弟2図に示Jように
導体ペーストよりなる高融点金屈導体層7,7′ど絶縁
ぺ一ストJ、りなる絶縁層8を形成りる。なJ3、高t
.i1ir:よ金属導体層7.7’J5J、び絶縁層8
の層数は限られたしの′CI;lなく、用途に応じた層
数とりれば良い。
Next, on the 1st and 6th soil of Green Sea, Tang Xuan,
A conductor base whose main component is a high-melting-point metal such as molybdenum, namely Reramiku green sheet 6, and a conductor base whose main component is gold, which has a high melting point and low electrical resistance, and a conductor paste. When the part is exposed, print the insulating base with the main ingredients as shown in Figure 2 and conductor as shown in Figure 2. An insulating paste J and an insulating layer 8 are formed on the high melting point metallic conductor layers 7 and 7' made of paste. J3, high t
.. i1ir: metal conductor layer 7.7'J5J, and insulating layer 8
The number of layers is limited, and the number of layers can be selected depending on the application.

そして、6体層7,7′と絶縁層8とを形成するペース
トが印刷きれたCラミックグリーンシー1・6を、運几
呑囲気e焼成−りる。焼成条件は、レラミックグリーン
シ−1一〇の組成、専体ベース1・の成分にJ;り定め
られるが、14(10〜1800℃、5〜180分であ
る。
Then, the C-ramic green sheets 1 and 6 on which the paste forming the 6-body layers 7 and 7' and the insulating layer 8 have been printed are fired. The firing conditions are determined by the composition of Relamic Green Sea-110 and the ingredients of Exclusive Base 1, and are 14 (10-1800°C, 5-180 minutes).

焼成俊、露出した高81{点金属導体層のうち7′上に
、ニツタ−ル等の鉄屈メッキ層9を形成ずる。
After firing, a metal plating layer 9 of nittal or the like is formed on 7' of the exposed 81-point metal conductor layer.

畝屈メッキをりるのは、肖金属どの滴れ性の向上を図る
ためである。rIl屈メッキ層9の厚みは、1〜5μが
適当である6鉄属メッキ層9を形成づる方法は、電解、
無電解のどちらひもよく、電極の取り出しの可否により
選択される。鉄属メッキ層9を形成した後、鉄属メッキ
層9と凸融点金属導体層7′との密稍強度を向上さμる
ため、8oo〜1200゜C、5分〜30分還元雰囲気
中C熱処理してもよい。
The purpose of removing the ridge plating is to improve the dripping resistance of the metal. The appropriate thickness of the rIl plating layer 9 is 1 to 5 μm. The method for forming the hexa-iron plating layer 9 is electrolysis,
Either type is electroless, and the choice is made depending on whether or not the electrode can be taken out. After forming the iron metal plating layer 9, in order to improve the density strength between the iron metal plating layer 9 and the convex melting point metal conductor layer 7', C was heated at 800°C to 1200°C for 5 minutes to 30 minutes in a reducing atmosphere. It may be heat treated.

次いC1少くとも金と銀とを〔ル比c1/1〜1//I
.3ムべ.−).l−ヲ、G’AI7i1ッ1449上
ニスクリーン印刷し、金ど銀との合金層10を形成1る
ペース1へ層を鉄屈メッキ層9上に形成する。銀を50
モルパーゼント以上どJるのは、金.銀の溶融時に鉄属
が金・銀合金層10中に拡散しC.厚膜導体層の焼成I
,一に、合金層10の表面に鉄屈の酸化膜が生成1゛る
のを防ぐためぐある。金を20モルパーセン1〜以上ど
りるのは、厚It!;!導体層の焼成時に、酸素が金と
銀どの合金層10を通過しC鉄屈メッキ層9の表面が酸
化されるのを防ぐためひある。合金層10の厚みは、厚
躾導体層の焼成記度により異なるが、15〜45μが適
当rある。
Next, C1 at least gold and silver [ratio c1/1 to 1//I
.. 3 months. −). 1-2, G'AI7i1-1449 is screen printed to form an alloy layer 10 with gold and silver. 50 silver
The only thing more important than Molparzent is gold. When the silver is melted, iron metal diffuses into the gold-silver alloy layer 10 and C. Firing of thick film conductor layer I
First, there is a method to prevent the formation of an iron-clad oxide film on the surface of the alloy layer 10. It's too thick to add more than 20 mole percent of gold! ;! This is done to prevent oxygen from passing through the gold-silver alloy layer 10 and oxidizing the surface of the C iron plating layer 9 during firing of the conductor layer. The thickness of the alloy layer 10 varies depending on the firing temperature of the thick conductor layer, but a suitable thickness is 15 to 45 μm.

次いで、合金層10を形成ヅるベース1へ層が形成され
たセシミック配線基板を、iooo〜1100℃の非酸
化性雰囲気中で加熱処理して、ベース1・h?1を}a
融づるとともに合金化し、金・銀溶it+合金層10を
形成づる。溶a温度は1000℃以上ぐあるが、鉄屈メ
ッキの合金層への拡散を抑えるためにも、1100℃以
下の溶融温度が好ましい。tffEil+時間も長づぎ
ると鉄屈メッキ9の合金層10への拡散が人ぎくなるの
で、溶融時間はt)分〜30分が適当である。
Next, the sesmic wiring board on which the alloy layer 10 is formed on the base 1 is heat-treated in a non-oxidizing atmosphere at iooo to 1100° C. to form the base 1.h? 1}a
As it melts, it becomes alloyed, forming a gold/silver melt+alloy layer 10. Although the melt a temperature ranges from 1000° C. or higher, the melting temperature is preferably 1100° C. or lower in order to suppress the diffusion of the iron bending plating into the alloy layer. If the tffEil+ time is too long, the diffusion of the iron flexural plating 9 into the alloy layer 10 will be difficult, so the melting time is suitably t) minutes to 30 minutes.

さらに、熱処理されたレラミック基板の合金層10およ
び絶縁層8土に、銀等を主成分どJるJ’ノ膜導休層1
1を形成ずる厚膜導体ペーストにより、所要の回路パタ
ーンを甲刷Jる。次いe、Iil刷物を酸化雰囲気ぐ焼
成しC、木発明のヒラミック多層配Fi1基板を得る。
Further, on the alloy layer 10 and the insulating layer 8 of the heat-treated Relamic substrate, a J' film conductive layer 1 containing silver or the like as a main component is added.
The desired circuit pattern is printed using the thick film conductor paste used to form 1. Then, the printed material was fired in an oxidizing atmosphere to obtain a filamentous multilayer Fi1 substrate.

なお焼成条イ′1どしでは厚膜ペース1・の成分による
が、800℃へ・850℃、5分〜20分e十分ぐある
。その後、抵抗等の受動素子を厚股導体Fjll上に形
成したり、その他回路部品リードを、厚IIS!導休1
?/i11上にワイヤボンドあるいは半田付けすること
により集積回路を成形り゜る。
It should be noted that, depending on the composition of the thick film paste 1, the firing strips A and 1 were heated to 800° C. and 850° C. for 5 to 20 minutes. After that, passive elements such as resistors are formed on the thick conductor Fjll, and other circuit component leads are formed on the thick conductor Fjll. Dokyu 1
? An integrated circuit is formed by wire bonding or soldering onto /i11.

なお、本発明の配線基仮において最も特長ど1るところ
は、高融点金m導体と厚膜尋体との間に鉄屈金屈メッキ
を施りことと、その表面に金と銀との溶融合金層を被覆
形成1るこどとの相乗効果により、?I+!尋休層の酸
化焼成時にJ3い11酸素の侵入を完全に防止し、高融
点金屈呑休層の酸化を完全に防ぐこどが′C″きる−6
のであり、1・一に金・銀合金層の形成が極めて大切な
もの′Cある。
The most important feature of the wiring board of the present invention is that iron-cured metal plating is applied between the high-melting point gold conductor and the thick-film conductor, and that the surface is coated with gold and silver. Due to the synergistic effect of forming a coating with a molten alloy layer, ? I+! During oxidation firing of the oxidized layer, the intrusion of J3-11 oxygen is completely prevented, and the oxidation of the high melting point gold oxidized layer is completely prevented.
1. The formation of a gold-silver alloy layer is extremely important.

以−1・、実施例につき第3図を参照して説明づる。Hereinafter, an example will be explained with reference to FIG. 3.

実施例1 レラミック成分どして、アルミナ1}o重司バーLン1
・の他、シリカ、マグネシア等の添加物とポリど二−ル
ブチラール等の右{幾バインダーを混合し、ドクターブ
レード法により厚み0.8Imのセラミックグリーンシ
ー1ヘ6を作成した。
Example 1 Relamic component: alumina 1} o Shigeji bar L 1
In addition, additives such as silica and magnesia and a binder such as polybutyral were mixed to prepare ceramic green sheets 1 to 6 with a thickness of 0.8 Im by the doctor blade method.

次に、タングスデン粉末98!I21バー口ント、シリ
カ2重Mパーセン1〜のメタライス成分にエチルセルロ
ースを印刷助剤として加えた導体ペーストど、グリーン
シーI〜と1111一組成の8′5)末にエチルセルロ
ースを印刷助剤として加えた絶縁ペーストとを、グリー
ンシー1−6十に導体ペース1・の一部を露出さtLT
交互に印刷して、Sfホ層7.7′および絶縁層ε3を
形成1る偵層休を1υた。
Next, tungsden powder 98! I21 burnt, conductive paste with ethyl cellulose added as a printing aid to the metal rice component of silica double M% 1~, Green Sea I~ and ethyl cellulose added to the 8'5) end of the 1111 composition as a printing aid. With the insulating paste, a part of the conductor paste 1 is exposed to the green sea 1-60.
Printing was carried out alternately to form the Sf layer 7.7' and the insulating layer ε3.

次いで、その柏層休を露貞35℃の水素と窒素の況含雰
囲気中ひ,昇瀉速曳300℃7n:4間で!渇した後、
1550゜C、2時間保持後、降渇速度600℃/11
4間で焼結した。
Next, the oak layer was heated in an atmosphere containing hydrogen and nitrogen at a temperature of 35°C, and then heated to 300°C for a period of 7n:4. After getting thirsty,
After holding at 1550°C for 2 hours, the cooling rate was 600°C/11
It was sintered for 4 hours.

そして、得られIこレラミツク配粍}基根上に露出した
高融貞金Ii!導体層7′上に、{1』化水素浴系の無
電解メッキにより、3μのニッグルメッキ層9を形成し
た。
And, the high-yielding deposit exposed on the base is obtained! A 3μ thick niggle plating layer 9 was formed on the conductor layer 7' by electroless plating in a {1'' hydrogen chloride bath system.

次に、ニツクルメツキしたセラミック基板を水素雰囲気
中で、950℃、5)分間熱処理後、第1表に示ず割合
の金おj、び銀粉末にアクリル系バインダーを印刷助剤
としC加えたペース1・を以って、印刷厚みが約20μ
になるJ、うにメツ−l″層9−Lにスクリーン印刷し
、水素雰囲気中1000〜1100℃で{れぞれの紺成
ベース1・の融点にあわし(溶融りるとともに合金化し
金と銀とJ、りなる合金w?J10を形成した、, さらに、合金1i10J1に銀、パラジウム系の厚l9
導体ペースト(]川で−4846)をスクリーン印刷し
た後、空気中、850℃、10分C焼成し、第3図に示
1J;うに、高融点金属導体層7′上に各々メッキ層9
および合金Ii7iioをE.Lさん(厚膜府休層11
が設iノられた木発明のセラミック冬層配線基板を冑l
こ。
Next, the nickel-plated ceramic substrate was heat-treated for 5) minutes at 950°C in a hydrogen atmosphere, and then a paste was prepared by adding an acrylic binder as a printing aid to gold, silver, and silver powder in proportions not shown in Table 1. With 1., the printing thickness is about 20μ
The layer 9-L is screen-printed in a hydrogen atmosphere at 1000-1100°C to reach the melting point of each dye base 1 (it melts and alloys with gold and silver). and J, a new alloy w?J10 was formed, furthermore, a thickness l9 of silver and palladium was added to the alloy 1i10J1.
After screen-printing the conductor paste (-4846), it was baked in air at 850°C for 10 minutes to form a plating layer 9 on the high melting point metal conductor layer 7' as shown in FIG.
and alloy Ii7iio to E. Mr. L (Atsushi Fukyu layer 11
The ceramic winter layer wiring board of the wood invention was installed.
child.

’Jilj、本発明の数舶限定範囲外のものを参考配ど
して用意し、又、金焼付りのものを従来品としC1それ
ぞれ用意した。このJ、−5+ごして得られたCラミッ
ク多層配線阜仮につい゛C酸化焼成後の導翳性の劣化の
{ν度を比較覆るためjJ膜埒体層11間の電気1[(
抗を測定し、さらに厚膜導体層11のシミ・フクレ等の
外観及ひ半IIj濡れ等のi,+1;価b比較した。そ
れらの結果を第1表に示4o なお、第1表中外観のOはシミ無し、×はシミ有りを、
半U]濡れの○は良、×は不良を、総合評価のOは変化
’,i:<良好、×は不艮をイれぞれ示している。
'Jilj', a model outside the limited scope of the present invention was prepared as a reference, and a gold-plated model was prepared as a conventional product, C1. For the C ramic multilayer wiring obtained by applying this J, -5+, in order to compensate for the {ν degree of deterioration of the conductivity after C oxidation and firing, the electric current between the J and J membrane layers 11 was
The resistance was measured, and the appearance of the thick film conductor layer 11, such as stains and blisters, and the value of wetness, etc., were compared. The results are shown in Table 14o In Table 1, O indicates no stains, × indicates stains,
○ for wetness indicates good, × indicates poor, and O for overall evaluation indicates change', i:<good, and × indicates unfavorable.

また、参考例および従来例の総合評価が×の理由は以下
の通りCある。NO.7とN0.10は、合金層を通し
て酸素がニッケル層まで到達し、ニッケル層が酸化され
、電気抵抗が増加しているためである。No.8、NO
.9およびNO,11は半田濡れ、外観其に不良なため
ひある。特に、N0.9’rはバフジウムがニッケル層
ど反応づるために外観が悪くなる。またN0.11にお
いては、900℃eはΔuhX溶f.fiit!ザボー
ラスな状態になり、外観、抵抗共に悪化しCいる。
Further, the reason why the overall evaluation of the reference example and the conventional example is x is C as follows. No. 7 and N0.10 because oxygen reaches the nickel layer through the alloy layer, oxidizes the nickel layer, and increases the electrical resistance. No. 8.NO
.. No. 9, No. 11, and No. 11 are solder wet and have poor appearance. In particular, with N0.9'r, bafdium reacts with the nickel layer, resulting in poor appearance. In addition, at N0.11, 900°Ce is ΔuhX melt f. Fiit! It becomes rough and the appearance and resistance deteriorate.

上述したところから明らかなJ、うに、本発明によって
得られるけラミック多層配線基仮は、高融点金属尋休層
上に鉄屑メッキをし、その土に本発明の最も特長とづる
銀ど金からなる溶融合金層を形成したため、以1・の特
性が{ワられる。
As is clear from the above, the ceramic multilayer wiring board obtained by the present invention is obtained by plating iron scraps on a high melting point metal layer, and then applying silver or metal to the soil, which is the most distinctive feature of the present invention. Since a molten alloy layer consisting of was formed, the following characteristics (1) are not achieved.

1.従来法と比べて、金,銀合金層を溶融しC形成りる
ため合金層はm蜜であり、しがち金を20七ル%以上含
むのC合金層中への酸素の固溶もわfかであるため酸素
の内部への侵入を完全に防止できる。
1. Compared to the conventional method, since the gold and silver alloy layers are melted to form C, the alloy layer is denser, and oxygen tends to be dissolved in the C alloy layer containing 207% or more of gold. Since the temperature is 50%, it is possible to completely prevent oxygen from entering the interior.

2.合金層に銀を50T:ルパーレン1・以上含むので
、鉄屈メッキ層との合金化が起きず、(1)の効宋どイ
11俟っ−(.lllf化忰雰囲気ぐ焼成しても合金層
,鉄属メッキ層とも酸化されない。
2. Since the alloy layer contains more than 50T:luperene 1.5% of silver, alloying with the iron flexural plating layer does not occur, and the effect of (1) is that even if fired in a chemical atmosphere, the alloy will not form. Neither the iron metal plating layer nor the iron metal plating layer is oxidized.

3.酸素侵入にどもなう酸化膜が各層間に生じないので
、安定した導電性が1!1られる。
3. Since no oxide film is formed between the layers, which resists oxygen intrusion, stable conductivity is improved by 1:1.

4.金,銀合金層が緻密なため、合金層上の厚膜導休層
上にシミ等が生『ず、半[41の濡れが良く、良クfな
電極特性が4rIられる。
4. Since the gold/silver alloy layer is dense, no stains are formed on the thick conductive layer on the alloy layer, and the wetting of the layer is good, resulting in good electrode characteristics.

5.金,銀ベース1・印刷時に印刷ずれが生じCも金.
銀溶融時に流動性を4Lずるので、鉄属メッキ上に合金
層を完全に形成することがCきる。
5. Gold, silver base 1 - Printing misalignment occurred during printing and C was also gold.
Since the fluidity is shifted by 4L during silver melting, it is possible to completely form an alloy layer on the iron metal plating.

従つ(、本発明にJ:れば、酸化雰囲気中でW膜導体を
焼成しCも、酸化膜を生じないため安定した19電性が
得られ、かつ酸化物の形成に起囚1るI’l+膜導体上
のシミ等ら発生しない。
Accordingly, according to the present invention, even if the W film conductor is fired in an oxidizing atmosphere, stable 19 conductivity can be obtained because no oxide film is formed, and there is no risk of oxide formation. No stains or the like occur on the I'l+ film conductor.

本発明は以土j!liべたように、タングスデン・モリ
ブデン等の高融点金屈を鉄屈金属層および金と銀との合
金溜との2F4(−被riiづるこどにJ、り、19膜
導体層を酸化雰囲気で形成りるに際しCも酸素の侵入を
完全に防」1−でさる。従っc)9体劣化の少ないセラ
ミック多層配線基板がfijられるものひあり、厚膜受
動糸了川電極としC優れた特性をイ1りる〃膜電捗と1
【(抗t9の厚膜受動索子を配線基板十に形成Cきる1
;どなるため、1′:)密庶ぐ多1fff(r::な回
路基板形成が川f1ヒどなり、電了]−ヌ≦界の允展に
人きく寄与りるbのである。
This invention is originally from Japan! As mentioned above, a high melting point metal such as tungden or molybdenum is combined with an iron metal layer and a gold-silver alloy reservoir, and a 19-layer conductor layer is placed in an oxidizing atmosphere. C completely prevents the intrusion of oxygen during formation.Therefore, there is a possibility that a ceramic multilayer wiring board with less deterioration can be used, and a thick film passive yarn electrode with excellent characteristics. I1 Rir〃Membrane Denshu and 1
[(Anti-t9 thick film passive cables are formed on the wiring board 1)
; because of the roar, 1':) densely combined 1fff (r:: the circuit board formation is the river f1 roar, the electric shock) - nu ≦ It is b that will make a great contribution to the expansion of the world.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従)1!:のレノミック多層配ゎil!14ル
の要部断面図、 第2図、第3図は木発明によるレラミック多層配線基板
の要部[θi面を承り図である。 1.6・・・レラミックグリーンシ−1−2・・・高融
点金屈轡体ペースト 1.7′・・・高融点金Jil乃体層 3・・・絶縁層17tl口部4,8・・・絶縁層5・・
・厚B’A’nl本ベースト 11・・・厚膜導1本層9・・・鉄屈メツ」二層10・
・・金と銀からなる口金Ii1溶融合金層−446−
Figure 1 shows the following) 1! :'s Renomic multilayer design! Figures 2 and 3 are cross-sectional views of the main parts of the Relamic multilayer wiring board according to the invention [θi plane]. 1.6...Relamic Green Sea-1-2...High melting point gold curved body paste 1.7'...High melting point gold Jil body layer 3...Insulating layer 17tl mouth portions 4,8 ...Insulating layer 5...
・Thickness B'A'nl main base 11... Thick film conductor 1 layer 9... Iron bending layer 10 ・
...Base Ii1 molten alloy layer made of gold and silver -446-

Claims (2)

【特許請求の範囲】[Claims] 1.t?ラミック塁仮と高融点金属を主成分どりる導休
層とが交Uに積層された露出導体層上に鉄屈金属層がメ
ッキにJ:り形成され、イ−のメッキ表面−1−に、金
と銀とをモル比で1/1〜1/4含む合金層が形成され
、その合金額上に酸化雰囲気中ひ焼結された厚膜導体層
が形成されている小を特徴どJるレラミック多層配線基
板。
1. T? An iron-flexible metal layer is plated on the exposed conductor layer in which the laminated base layer and the conductive layer mainly composed of a high-melting point metal are laminated at the intersection U, and the plated surface -1- of A is formed. , an alloy layer containing gold and silver in a molar ratio of 1/1 to 1/4 is formed, and a thick film conductor layer sintered in an oxidizing atmosphere is formed on the alloy layer. Relamic multilayer wiring board.
2.アルミプ賀セラミックス等J;りなるグリーンシー
1・上にタングステン,モリブデン等の高融点金屈を主
成分と1る導体ペーストをスクリーン印刷し、その上に
前記セラミックスと同質の絶縁ペース1へと前RL!導
体ペース1へとを交岨に複数層スクリーン印刷で重ねた
後、還元雰囲気中で焼成し、得られた焼成体の露出導体
層上に鉄属金腐層をメッキにJ、り形成した後、該メッ
キ表面上に金と銀とをモル比ぐ1/1〜1/4含むペー
ストをスクリーン印刷し、1000〜1100℃の非酸
化性雰囲気で加熱しCベーストを溶融しC、金、銀の合
金層を形成し、その合金層十に厚1り9体層をスクリー
ン印刷で塗布して、酸化雰囲気中で焼成1ることを!1
′.+1徴とりるヒラミック多層配FJl基板の製造冫
去。
2. Aluminum Ceramics, etc. J; Rinaru Green Sea 1. Screen print a conductive paste containing high melting point metals such as tungsten and molybdenum as the main component, and then apply an insulating paste 1 of the same quality as the ceramics on top of it. RL! After overlapping the conductor paste 1 with multiple layers by screen printing, firing in a reducing atmosphere, and forming an iron metal corrosion layer on the exposed conductor layer of the obtained fired body by plating. , A paste containing 1/1 to 1/4 molar ratio of gold and silver is screen printed on the plated surface, and heated in a non-oxidizing atmosphere at 1000 to 1100°C to melt the C base and form C, gold, and silver. Form an alloy layer, apply a 9-layer film with a thickness of 1 to 9 by screen printing, and sinter it in an oxidizing atmosphere! 1
'. Manufacture of Hiramic multilayer FJl board with +1 mark has been discontinued.
JP18441883A 1983-10-04 1983-10-04 Ceramic multilayer circuit board and method of producing same Pending JPS6077490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18441883A JPS6077490A (en) 1983-10-04 1983-10-04 Ceramic multilayer circuit board and method of producing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18441883A JPS6077490A (en) 1983-10-04 1983-10-04 Ceramic multilayer circuit board and method of producing same

Publications (1)

Publication Number Publication Date
JPS6077490A true JPS6077490A (en) 1985-05-02

Family

ID=16152813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18441883A Pending JPS6077490A (en) 1983-10-04 1983-10-04 Ceramic multilayer circuit board and method of producing same

Country Status (1)

Country Link
JP (1) JPS6077490A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009109652A1 (en) * 2008-03-06 2009-09-11 Ceramtec Ag Metallized coil bodies (inductor) having high q-value

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844276A (en) * 1981-09-09 1983-03-15 Nippon Soken Inc Glow plug controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844276A (en) * 1981-09-09 1983-03-15 Nippon Soken Inc Glow plug controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009109652A1 (en) * 2008-03-06 2009-09-11 Ceramtec Ag Metallized coil bodies (inductor) having high q-value

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