JPS6071173U - Electronic circuit board - Google Patents
Electronic circuit boardInfo
- Publication number
- JPS6071173U JPS6071173U JP16128283U JP16128283U JPS6071173U JP S6071173 U JPS6071173 U JP S6071173U JP 16128283 U JP16128283 U JP 16128283U JP 16128283 U JP16128283 U JP 16128283U JP S6071173 U JPS6071173 U JP S6071173U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- conductive
- electronic circuit
- circuit board
- paint layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面は本考案の実施例の要部を示した断面図である。
1・・・・・・基板、2・・・・・・導電部、3・・・
・・・貫通孔、4・・・・・・下塗り導電塗料層、5・
・・・・・スルーホール導電塗料層、6・・・・・・導
電塗料層、7・・・−・・導電塗料層。The drawing is a sectional view showing a main part of an embodiment of the present invention. 1...Substrate, 2...Conductive part, 3...
...Through hole, 4...Undercoat conductive paint layer, 5.
. . . Through-hole conductive paint layer, 6 . . . Conductive paint layer, 7… Conductive paint layer.
Claims (1)
ル接続部により前記基板の表裏両面の導電部が電気的に
接続され、前記基板の両面の導電部の内生なくとも一方
は金属箔からなっている電子回路用基板において、前記
スルーホール接続部は、前記貫通孔の開口端周辺に形成
されて前記金属箔からなる導電部を覆う下塗り導電塗料
層と、前記貫通孔の内面及び該貫通孔の両端開口部を囲
む領域に形成されて前記貫通孔の内面及び前記下塗り導
電塗料層を覆うスルーホール用導電塗料層と、前記スル
ーホール用導電塗料層の上に形成された導電メッキ層と
からなってい−ることを特徴とする電子回路用基板。The conductive parts on both the front and back sides of the board are electrically connected by a through-hole connection part formed through a through hole provided in the board, and at least one of the conductive parts on both sides of the board is made of metal foil. In the electronic circuit board, the through-hole connection portion includes an undercoat conductive paint layer formed around the opening end of the through-hole and covering the conductive portion made of the metal foil, and an inner surface of the through-hole and the through-hole. A through-hole conductive paint layer formed in a region surrounding both end openings and covering the inner surface of the through-hole and the undercoat conductive paint layer, and a conductive plating layer formed on the through-hole conductive paint layer. An electronic circuit board characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16128283U JPS6071173U (en) | 1983-10-20 | 1983-10-20 | Electronic circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16128283U JPS6071173U (en) | 1983-10-20 | 1983-10-20 | Electronic circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6071173U true JPS6071173U (en) | 1985-05-20 |
JPH0311903Y2 JPH0311903Y2 (en) | 1991-03-20 |
Family
ID=30354495
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16128283U Granted JPS6071173U (en) | 1983-10-20 | 1983-10-20 | Electronic circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6071173U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100332970B1 (en) * | 1998-12-08 | 2002-09-17 | 주식회사 심텍 | Blind Via Hole for PCB and Method for Formation Thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49109144U (en) * | 1973-01-16 | 1974-09-18 | ||
JPS519143A (en) * | 1974-07-15 | 1976-01-24 | Matsushita Electric Works Ltd | Netsukasoseijushitairumoyotsukeyo chitsupuseikeihoho |
JPS5874097A (en) * | 1981-10-29 | 1983-05-04 | 松下電器産業株式会社 | Method of producing printed circuit board |
-
1983
- 1983-10-20 JP JP16128283U patent/JPS6071173U/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49109144U (en) * | 1973-01-16 | 1974-09-18 | ||
JPS519143A (en) * | 1974-07-15 | 1976-01-24 | Matsushita Electric Works Ltd | Netsukasoseijushitairumoyotsukeyo chitsupuseikeihoho |
JPS5874097A (en) * | 1981-10-29 | 1983-05-04 | 松下電器産業株式会社 | Method of producing printed circuit board |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100332970B1 (en) * | 1998-12-08 | 2002-09-17 | 주식회사 심텍 | Blind Via Hole for PCB and Method for Formation Thereof |
Also Published As
Publication number | Publication date |
---|---|
JPH0311903Y2 (en) | 1991-03-20 |
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