JPS606332U - BTL amplifier - Google Patents

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のＢＴＬ増幅器の一例の基本的構成を示す
回路図、第２図は本考案の一実施例の回路の概略構成を
示す回路図、第３図は同実施例の操作部の外観図である
。１・・・・・・差動増幅段、２゜３・・・・・・電力
増幅段、ＲＣ・・・・・・可変抵抗、Ｒ２−Ｒ４・・・
・・・抵抗。FIG. 1 is a circuit diagram showing the basic configuration of an example of a conventional BTL amplifier, FIG. 2 is a circuit diagram showing a schematic configuration of a circuit according to an embodiment of the present invention, and FIG. 3 is a circuit diagram showing the basic configuration of an example of a conventional BTL amplifier. It is an external view. 1...Differential amplification stage, 2゜3...Power amplification stage, RC...Variable resistor, R2-R4...
···resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 対をなす第１および第２の入力端子と、差動増幅段と、
この差動増幅段の差動出力の各々によりそれぞれ駆動さ
れる第１および第２の電力増幅段と、上記差動増幅段の
入力端の一方と上記第１の入力端子との間に接続された
第１の入力抵抗と、上記差動増幅段の入力端の他方と上
記第２の入力端子との間に接続された第２の入力抵抗と
、上記第１の電力増幅段の出力端と上記差動増幅段の入
力端の一方との間に接続された第１の帰還抵抗と、上記
第２の電力増幅段の出力端と上記差動増幅段の入力端の
他方との間に接続された第２の帰還抵抗とを具備し、上
記第１および第２の増幅段の各出力端相互の間に負荷を
接続するＢＴＬ増幅器において、上記第１の入力抵抗を
可変抵抗で構成し、且つ前段に接続されるプリアンプの
出力インピーダンス値とこのインピーダンス値に適応す
る上記第１の入力抵抗値を得るための上記可変抵抗の操
作状態とを対応させる指示手段を上記可変抵抗の操作部
に設けることを特徴とするＢＴＬ増幅器。a pair of first and second input terminals; a differential amplifier stage;
first and second power amplification stages each driven by each of the differential outputs of the differential amplification stage; a second input resistor connected between the other input terminal of the differential amplifier stage and the second input terminal; and an output terminal of the first power amplifier stage; a first feedback resistor connected between one of the input ends of the differential amplification stage; and a first feedback resistor connected between the output end of the second power amplification stage and the other input end of the differential amplification stage. In the BTL amplifier, the first input resistance is configured with a variable resistor, and a load is connected between each output terminal of the first and second amplification stages. Further, an instruction means is provided in the operating section of the variable resistor to make the output impedance value of the preamplifier connected to the preceding stage correspond to the operating state of the variable resistor for obtaining the first input resistance value adapted to this impedance value. A BTL amplifier characterized by the following.