JPS6053923B2 - Ultra high frequency transistor amplifier - Google Patents
Ultra high frequency transistor amplifierInfo
- Publication number
- JPS6053923B2 JPS6053923B2 JP854278A JP854278A JPS6053923B2 JP S6053923 B2 JPS6053923 B2 JP S6053923B2 JP 854278 A JP854278 A JP 854278A JP 854278 A JP854278 A JP 854278A JP S6053923 B2 JPS6053923 B2 JP S6053923B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- high frequency
- substrate
- transistor amplifier
- ultra high
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/60—Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Microwave Amplifiers (AREA)
Description
【発明の詳細な説明】
この発明は超高周波トランジスタ増幅器、特に入出力
インピーダンスの著しく小さい高出力マイクロ波トラン
ジスタ増幅器に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a very high frequency transistor amplifier, and particularly to a high power microwave transistor amplifier with extremely low input/output impedance.
マイクロ波帯における固体化高出力増幅器には、Ｇａ
Ａｓ電界効果トランジスタやバイポーラトランジスタが
用いられているがこれらの高出力トランジスタにおいて
は入出力インピーダンスが１０Ω以下となり、５０Ω系
の伝送系と広帯域にわたる整合を得るためには、多段の
変成器が用いられている。 従来この種の多段整合回路
においては、一様な誘電率をもつ絶縁体基板が用いられ
ていた。Solid-state high-power amplifiers in the microwave band use Ga.
As field effect transistors and bipolar transistors are used, but the input/output impedance of these high-output transistors is 10Ω or less, so multistage transformers are used to achieve broadband matching with 50Ω transmission systems. ing. Conventionally, in this type of multi-stage matching circuit, an insulating substrate having a uniform dielectric constant has been used.
第１図及び第２図にはこのような整合回路の例を示して
いる。 第１図の場合は接地導体１１上の一定の厚さの
基板１２が用いられ、基板上の金属層１３は第１図−Ａ
のようなパターンに形成され、特性インピーダンスの相
異なるストリップ線路として、多段の変成器を構成して
いる。FIGS. 1 and 2 show examples of such matching circuits. In the case of FIG. 1, a substrate 12 of a constant thickness on a ground conductor 11 is used, and a metal layer 13 on the substrate is
A multi-stage transformer is constructed using strip lines with different characteristic impedances.
この場合ストリップ線路巾Ｗ１、Ｗ２、Ｗ３はＷ１＞Ｗ
２＞Ｗ３なる関係を有している。 トランジスタ１４の
入力インピーダンスが小さい場合Ｗ１／Ｗ２、Ｗ２／Ｗ
３、Ｗｌ／Ｗよの値は大きなものとなる。In this case, the strip line widths W1, W2, and W3 are W1>W
The relationship is 2>W3. When the input impedance of the transistor 14 is small, W1/W2, W2/W
3. The value of Wl/W becomes large.
基板厚が大なるときはＷｌが大となり、トランジスタの
巾（１Ｔｍのオーダ）を越えるようになり、プリンジン
クによる寄生リアクタンスが大となる。他方基板厚を小
とする場合には、Ｗ３が小さくなり、出力を取り出すコ
ネクター等との接続が困難となり、基板自体の強度も低
下する。次に第２図のように基板１２の厚さとトランジ
スタより遠ざかるにつれて、順次、大きくしてゆき、Ｗ
１／Ｗ２、Ｗ２／Ｗ３、Ｗ１／Ｗ２の値を１に近づける
方法も考えうるが、この方法によつても基板の機械的強
度の低下は免れ得ない。 この発明は上記の決点を解決
するために、多段の変成器よりなる整合回路を、短冊状
に配列した比誘電率の相異なる絶縁体の基板上のストリ
ップ線路で構成し、これらの絶縁体の比誘電率をトラン
ジスタから遠ざかるにつれて順次小なるものとする事に
より、ストリップ線路巾を適当な範囲に保ち、かつ機械
的強度を損うことなく、広帯域にわたる整合回路を得る
事を目的とするものである。 以下この発明につき、図
面を用いて詳細に説明する。When the substrate thickness becomes large, Wl becomes large and exceeds the width of the transistor (on the order of 1 Tm), and the parasitic reactance due to prinzinc becomes large. On the other hand, if the substrate thickness is made small, W3 becomes small, making it difficult to connect with a connector for taking out the output, and the strength of the substrate itself also decreases. Next, as shown in FIG. 2, the thickness of the substrate 12 is gradually increased as the distance from the transistor increases.
A method of bringing the values of 1/W2, W2/W3, and W1/W2 closer to 1 may be considered, but even with this method, a decrease in the mechanical strength of the substrate cannot be avoided. In order to solve the above-mentioned problem, this invention consists of a matching circuit consisting of multi-stage transformers, consisting of strip lines arranged in strips on substrates made of insulators with different dielectric constants, and in which these insulators The purpose is to maintain the strip line width within an appropriate range and obtain a matching circuit over a wide band without compromising mechanical strength by decreasing the relative dielectric constant of the transistor as it goes away from the transistor. It is. This invention will be explained in detail below using the drawings.
第３図は本発明の一実施例を示す図面てあり、図におい
てトランジスタの入力側にはトランジスタより遠ざかる
順に比誘電率がＥＩｌ，ＥＩ２，ＥＩＭｌ出力側にはト
ランジスタより遠ざかる順に比誘電率がＥＯｌ，ＥＯ２
，・・，ＥＯＮなる絶縁体基板が配置されている。同図
はこのうちＭ＝Ｎ＝３の場合を示したものてあり、３２
，３３，３４は出力側のＥＯｌ，ＥＯ２，ＥＯ３なる比
誘電率を有する絶縁体基板、３５，３６，３７は入力側
のＥＩｌ，ＥＩ２，ＥＩ３なる比誘電率を有する絶縁体
基板である。FIG. 3 is a diagram showing an embodiment of the present invention. In the figure, the input side of the transistor has a relative permittivity of EIl, EI2, EIM1 in the order of distance from the transistor, and the output side has a relative permittivity of EOl in the order of distance from the transistor. ,EO2
,..., EON insulator substrates are arranged. The figure shows the case where M=N=3, and 32
, 33, and 34 are insulator substrates having dielectric constants of EOl, EO2, and EO3 on the output side, and insulator substrates 35, 36, and 37 have dielectric constants of EIl, EI2, and EI3 on the input side.
又、３１は接地導体、３８はストリップ線路、３９はト
ランジスタである。入力側の第Ｋ番目の基板厚をＴＯＫ
ストリップ線路巾をＷＯＫｌ出力側の第Ｌ番目の基板厚
をＴＯしストリップ線路幅をＷ。Further, 31 is a ground conductor, 38 is a strip line, and 39 is a transistor. TOK the Kth board thickness on the input side
The strip line width is WOKl.The Lth board thickness on the output side is TO, and the strip line width is W.
Ｌとすると、これらの線路の特性インピーダンスＺＩＫ
（又はＺＯＬ）はＷＩＫ／Ｔ！Ｋ９ＥＩＫ（又は〜ＷＯ
し／ＴＯＬ９ＥＯＬ）の関係となる。０Ｎであるので−
．Ｗ！Ｋ／Ｔ！Ｋ９ＷＯし／ＴＯしを大きく変える事な
くなる関係を実現できる。If L, the characteristic impedance of these lines ZIK
(or ZOL) is WIK/T! K9EIK (or ~WO
/TOL9EOL). Since it is 0N -
．． W! K/T! It is possible to realize a relationship that does not significantly change the K9WO/TO relationship.
数値例として、トランジスタの入力側のインピーダンス
が１０Ωの抵抗として表わされる場合、こ．れを２段の
１１破長変成器を用いて５０Ω負荷と整合せしめるため
にはとする必要がある。As a numerical example, if the impedance on the input side of a transistor is expressed as a 10Ω resistance, then this. In order to match this with a 50Ω load using a two-stage 11-length transformer, it is necessary to do this.
第２の基板をアルミナセラミック基板（Ｅｒ＝９．７）
第１の基板をＢａＯ−ＴｉＯ２系のセラミック（Ｅｒ＝
３９）する場合、ＷＩｌ／ＴＯｌ〜２．１，Ｗ０２／Ｔ
ｘ２〜１．９とすればよくセラミック基板の強度を考慮
してＴ！１＝ＴＩ２＝０．５Ｗ１！ｔとするときＷｌ２
〜０．９５ＴＷｔ，Ｗｉ１〜１．０５顛となる。ちなみ
にＢａＯ−ＴｉＯ２系のセラミックはＢａＯとＴｉＯ２
の混合比、微量の不純物の添加率、焼成条件等により比
誘電率が２０乃至１００のものとする事）ができ、この
発明のため利用するに大いに有利である。The second substrate is an alumina ceramic substrate (Er=9.7)
The first substrate is a BaO-TiO2 ceramic (Er=
39) If so, WIl/TOl~2.1, W02/T
It is sufficient to set x2 to 1.9, taking into consideration the strength of the ceramic substrate, T! 1=TI2=0.5W1! When t, Wl2
~0.95TWt, Wi1~1.05. By the way, BaO-TiO2 ceramics are BaO and TiO2.
The relative dielectric constant can be adjusted to 20 to 100 depending on the mixing ratio of , the addition rate of small amounts of impurities, the firing conditions, etc., which is very advantageous for use in the present invention.
以上説明したように、この発明の超高周波トランジスタ
増幅器においては、絶縁体基板の比誘電率が、トランジ
スタより遠ざかるにつれ、順次減少しているので、この
基板上に形成されるストリップ線路１］及び基板厚を大
巾に変える事なく、多段の変成器よりなる整合回路を構
成する事ができ、寄生リアクタンスを防止し、機械的強
度の低下を損わないという利点がありその効果は大てあ
る。As explained above, in the ultra-high frequency transistor amplifier of the present invention, the dielectric constant of the insulating substrate gradually decreases as the distance from the transistor increases. It is possible to configure a matching circuit consisting of multi-stage transformers without significantly changing the thickness, and has the advantage of preventing parasitic reactance and not reducing mechanical strength, which is very effective.
第１図Ａ，Ｂは従来の構造の多段の変成器を有するトラ
ンジスタ増幅器の一例を示す図であり、１１は接地導体
、１２は絶縁体基板、１３はストリップ線路、１４はト
ランジスタである。
第２図Ａ，Ｂは従来の構造の多段の変成器を有するトラ
ンジスタ増幅器の別の一例を示す図であり、２１は接地
導体、２２は絶縁体基板、２３はストリップ線路２４は
トランジスタである。FIGS. 1A and 1B are diagrams showing an example of a transistor amplifier having a conventional multi-stage transformer structure, in which 11 is a ground conductor, 12 is an insulating substrate, 13 is a strip line, and 14 is a transistor. FIGS. 2A and 2B are diagrams showing another example of a transistor amplifier having a conventional multi-stage transformer structure, in which 21 is a ground conductor, 22 is an insulating substrate, and 23 is a strip line 24 which is a transistor.
Claims (1)
絶縁体基板を、出力側に誘電率が相異なるＮ個の絶縁体
基板を配列し、これらの基板上に形成されたストリップ
線路により整合をはかる増幅器において、前記Ｍ、Ｎの
うち少くとも一方は２以上の整数であり、入力側の絶縁
体基板の比誘電率をトランジスタの端子に近い順にＥＩ
＿１、ＥＩ＿２、・・・、ＥＩＭ、出力側の絶縁体基板
の比誘電率をトランジスタの端子に近い順にＥＯ＿１、
ＥＯ＿２、・・・ＥＯＮとするとき、ＥＩ＿１＞ＥＩ＿
２＞・・・＞ＥＩＭ、ＥＯ＿１＞ＥＯ＿２＞・・・＞Ｅ
ＯＮと構成されていることを特徴とする超高周波トラン
ジスタ増幅器。1 Arrange M insulator substrates with different dielectric constants on the input side of the transistor, and N insulator substrates with different dielectric constants on the output side, and match by strip lines formed on these substrates. In the amplifier, at least one of M and N is an integer of 2 or more, and the dielectric constant of the insulating substrate on the input side is determined by EI in the order of proximity to the terminals of the transistor.
_1, EI_2, ..., EIM, the relative permittivity of the insulator substrate on the output side is EO_1,
When EO_2,...EON, EI_1>EI_
2>...>EIM, EO_1>EO_2>...>E
An ultra-high frequency transistor amplifier characterized in that it is configured as ON.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP854278A JPS6053923B2 (en) | 1978-01-27 | 1978-01-27 | Ultra high frequency transistor amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP854278A JPS6053923B2 (en) | 1978-01-27 | 1978-01-27 | Ultra high frequency transistor amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54101648A JPS54101648A (en) | 1979-08-10 |
| JPS6053923B2 true JPS6053923B2 (en) | 1985-11-28 |
Family
ID=11696026
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP854278A Expired JPS6053923B2 (en) | 1978-01-27 | 1978-01-27 | Ultra high frequency transistor amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6053923B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05813U (en) * | 1991-06-20 | 1993-01-08 | 澄夫 清水 | Decorative material for Reto tile |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4350958A (en) * | 1980-01-17 | 1982-09-21 | Motorola, Inc. | Impedance matching circuitry for radio frequency signal power amplifiers |
| JPS57163804U (en) * | 1981-04-09 | 1982-10-15 | ||
| JPS58173905U (en) * | 1982-05-17 | 1983-11-21 | 株式会社東芝 | strip line circulator |
| JPS58173907U (en) * | 1982-05-17 | 1983-11-21 | 株式会社東芝 | Stripline circulator |
| JPH0653715A (en) * | 1992-07-30 | 1994-02-25 | Mitsubishi Electric Corp | Microwave amplifier |
| JP4575261B2 (en) | 2005-09-14 | 2010-11-04 | 株式会社東芝 | High frequency package |
| KR100895476B1 (en) * | 2005-09-14 | 2009-05-06 | 가부시끼가이샤 도시바 | Package for high frequency waves containing high frequency electronic circuit |
| WO2010013819A1 (en) * | 2008-07-31 | 2010-02-04 | 京セラ株式会社 | Matching circuit, wiring board, transmitter having matching circuit, receiver, transceiver and radar apparatus |
| JP2011044847A (en) * | 2009-08-20 | 2011-03-03 | Oki Electric Industry Co Ltd | Multilayer circuit, and package |
| JP5589428B2 (en) * | 2010-02-19 | 2014-09-17 | 富士通株式会社 | Transmission line, impedance converter, integrated circuit mounting device and communication device module |
-
1978
- 1978-01-27 JP JP854278A patent/JPS6053923B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05813U (en) * | 1991-06-20 | 1993-01-08 | 澄夫 清水 | Decorative material for Reto tile |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54101648A (en) | 1979-08-10 |
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