JPS6051250B2 - Manufacturing method of thin film capacitive element - Google Patents
Manufacturing method of thin film capacitive elementInfo
- Publication number
- JPS6051250B2 JPS6051250B2 JP15650876A JP15650876A JPS6051250B2 JP S6051250 B2 JPS6051250 B2 JP S6051250B2 JP 15650876 A JP15650876 A JP 15650876A JP 15650876 A JP15650876 A JP 15650876A JP S6051250 B2 JPS6051250 B2 JP S6051250B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- capacitive element
- manufacturing
- trimming
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】
本発明は、異種の金属て構成する部分をレーザトリミン
グまたは放電トリミングを行なつて薄膜容量素子を製造
する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a thin film capacitive element by performing laser trimming or discharge trimming of parts made of different metals.
第１図ａ−ｃは、窒化タンタル（ＴａＮ）を陽極化成し
て得られる５酸化タンタル（Ｔａ。０５）を誘電体とし
た薄膜容量素子の製造工程の一例てある。FIGS. 1a to 1c show an example of the manufacturing process of a thin film capacitive element using tantalum pentoxide (Ta.05) obtained by anodizing tantalum nitride (TaN) as a dielectric material.
すなわちこの工程は、（イ）第１図ａに示すクレースト
セラミック基板１を洗浄した後、その上面にタンタル膜
をスパッタリングにより形成し、ついで熱酸化して得ら
れた膜２に容量の下部導体となる窒化タンタル膜３をス
パッタリングにより形成する工程と、（口）第１図をに
示す窒化タンタル膜３の一部をフォトエッチングにより
除去した後窒化タンタル膜３の一部を陽極化成して５酸
化タンタルよりなる誘導体層４を形成する工程と、←→
第１図ｃに示す配線および誘導体層４の上部導体５を形
成するためのニクロム５ａ−金５ｂ−ニクロム５ｃを順
次蒸着した後、不要部分をフォトエッチングして除いて
容量と同時に素子トリミングパターンを形成する工程と
、さらに熱処理安定化、電極部形成工程とを経てで素子
トリミングする工程とからなつている。That is, in this step, (a) after cleaning the crazed ceramic substrate 1 shown in FIG. A process of forming a tantalum nitride film 3 by sputtering, and (2) removing a part of the tantalum nitride film 3 by photo-etching as shown in FIG. A step of forming a dielectric layer 4 made of tantalum oxide, and ←→
After sequentially depositing nichrome 5a, gold 5b and nichrome 5c to form the upper conductor 5 of the wiring and dielectric layer 4 shown in FIG. The process consists of a step of forming, a step of stabilizing heat treatment, a step of forming an electrode part, and then a step of trimming the element.
第２図はマスクパターンと素子トリミング部とについて
示す図で容量値は誘導体層４を覆つている上部導体７ａ
、７ｂおよび７ｃ面積に比例する。FIG. 2 is a diagram showing the mask pattern and the element trimming part, and the capacitance value is the upper conductor 7a covering the dielectric layer 4.
, 7b and 7c are proportional to the area.
素子トリミング工程はレーザ光線のもつ優れた集束性に
よつて得られる高いエネルギー密度によりトリミング部
６のニクロム５ｃ−金５ｂ−ニクロム５ａに照射すると
瞬時に気化し除去することができる。すなわち上部電極
の島７ｂが生じ、７ｂの面積相当分だけ容量値が減少し
たことになる。In the element trimming process, when the nichrome 5c-gold 5b-nichrome 5a in the trimming portion 6 is irradiated with high energy density obtained by the excellent focusing property of the laser beam, it can be instantaneously vaporized and removed. That is, an island 7b of the upper electrode is formed, and the capacitance value is reduced by an amount corresponding to the area of 7b.
従つて高精度の容量素子は上部電極の島７ｂおよび７ｃ
の面積を適当に複数個設置することにより満足てきる。
しかしレーザ光線により加工された断面は溶融温度が異
なるためニクロム層５ｃよりも金属層５をの気化速度が
早く一様でなくなる。Therefore, high-precision capacitive elements are formed on the islands 7b and 7c of the upper electrode.
This can be achieved by installing multiple units with an appropriate area.
However, since the cross section processed by the laser beam has a different melting temperature, the vaporization rate of the metal layer 5 is faster than that of the nichrome layer 5c and becomes uneven.
そのためニクロム層５ｃの剥離が生じやすくなる。この
こと・は薄膜容量素子の高安定、信頼性を損なう危険が
非常に大きく高精度の薄膜容量素子の実現が不可能とな
る。本発明の目的は、上記した従来技術の欠点を解決し
製造工数の増加および電気的特性の低下をき・たさない
薄膜容量素子の製造方法を提供するものである。Therefore, the nichrome layer 5c is likely to peel off. This poses a very high risk of impairing the high stability and reliability of the thin film capacitive element, making it impossible to realize a highly accurate thin film capacitive element. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a thin film capacitive element that solves the above-mentioned drawbacks of the prior art and does not increase the number of manufacturing steps or deteriorate electrical characteristics.
上記目的を達成するため本発明は素子トリミング部分の
膜構成を単一金属膜とするものである。In order to achieve the above object, the present invention uses a single metal film as the film structure of the element trimming portion.
以下図面に基づいて本発明を詳しく説明する。第３図は
本発明の一実施例を説明する図で一部従来技術を流用す
る部分があるが製造工程順に記述する。まずグレーズド
セラミツク基板１の上面にタンタル膜をスパッタリング
により形成し、ついで熱酸化してタンタル熱酸化膜２を
形成し、これに容量の下部導体となる窒化タンタル膜３
をスパッタリングにより形成する。この窒化タンタル膜
３の一部をフォトエッチングにより除去した後、前記窒
化タンタル膜３の一部４を陽極化成して容量の誘電体と
して５酸化タンタルを形成する。配線および容量の上部
導体５を形成するためのニクロム５ａと金５ｂとニクロ
ム５ｃを順次蒸着した後、フォトエッチングして不要部
分を除去する。パターンを形成した後、さらに熱処理安
定化、電極形成工程を経て必要に応じてトリミング部８
にレーザ光線を照射して薄膜容量素子を得る。このトリ
ミング部は、第３図に示してあるごとく上部一導体５の
島状部７ｂ，７ｃはそれぞれ上部導体下部で窒化タンタ
ル膜３を経由して上部電極側の上部導体５に接続されて
いる。なお第３図は、トリミング部を二個設置したもの
で、トリミング部７ｂを切断した状態である。The present invention will be explained in detail below based on the drawings. FIG. 3 is a diagram illustrating an embodiment of the present invention, and although there are some parts where conventional technology is used, the description will be given in the order of manufacturing steps. First, a tantalum film is formed on the upper surface of a glazed ceramic substrate 1 by sputtering, and then thermally oxidized to form a tantalum thermal oxide film 2, which is then topped with a tantalum nitride film 3 that will become the lower conductor of the capacitor.
is formed by sputtering. After a part of the tantalum nitride film 3 is removed by photo-etching, a part 4 of the tantalum nitride film 3 is anodized to form tantalum pentoxide as a capacitor dielectric. After nichrome 5a, gold 5b, and nichrome 5c for forming wiring and capacitor upper conductor 5 are sequentially deposited, unnecessary portions are removed by photo-etching. After forming the pattern, the trimming portion 8 is further processed as necessary through heat treatment stabilization and electrode formation steps.
is irradiated with a laser beam to obtain a thin film capacitive element. In this trimming part, as shown in FIG. 3, the island-like parts 7b and 7c of the upper conductor 5 are connected to the upper conductor 5 on the upper electrode side via the tantalum nitride film 3 at the lower part of the upper conductor. . Note that FIG. 3 shows a state in which two trimming portions are installed, and the trimming portion 7b is cut.
このトリミング部の窒化タンタル層の幅は、１００〜２
００ミクロン程度で長さは０．３〜１．５Ｔｍｍ程度で
容量の電気的特性には殆んど影響をおよぼさない。これ
によりレーザトリミング部には、異種金属による構成部
分をさけて他の単一金属とすれば、製造工数の増加を伴
なわないで実現できる。以上説明したことく本発明によ
れは、異種の金属構成する部分を同時に加工したときの
加工度合による膜剥離、さらに素子安定性、信頼性に対
しての影響を軽減した製造工数および電気的特性を同等
以上に保つ高精度、安定性および高信頼性の薄膜容量素
子を実現することができる。The width of the tantalum nitride layer in this trimmed part is 100 to 2
The length is approximately 0.00 microns and the length is approximately 0.3 to 1.5 Tmm, and has almost no effect on the electrical characteristics of the capacitor. As a result, the laser trimming portion can be realized without increasing the number of manufacturing steps by using a single metal instead of components made of different metals. As explained above, the present invention provides manufacturing man-hours and electrical characteristics that reduce film peeling due to the degree of processing when parts made of different metals are processed simultaneously, and also reduce the effects on element stability and reliability. It is possible to realize a thin film capacitive element with high accuracy, stability, and high reliability that maintains the same or higher values.
第１図は薄膜容量素子の製造工程の一例を示す図、第２
図は従来の薄膜容量素子の斜視図であり、第３図は本発
明による薄膜容量素子の斜視図である。
１：グレーズドセラミツク基板、２：タンタル熱酸化膜
、３：窒化タンタル膜、４：誘電体層、５ａ：ニクロム
膜、５ｂ：金膜、５ｃ：ニクロム膜、８：トリミング。Figure 1 is a diagram showing an example of the manufacturing process of a thin film capacitive element, Figure 2
This figure is a perspective view of a conventional thin film capacitive element, and FIG. 3 is a perspective view of a thin film capacitive element according to the present invention. 1: Glazed ceramic substrate, 2: Tantalum thermal oxide film, 3: Tantalum nitride film, 4: Dielectric layer, 5a: Nichrome film, 5b: Gold film, 5c: Nichrome film, 8: Trimming.
Claims (1)
施す部分の膜構成を単一金属膜とすることを特徴とする
薄膜容量素子の製造方法。1. A method for manufacturing a thin film capacitive element, characterized in that the film structure of a portion of a capacitive element of a thin film integrated circuit where element trimming is performed is a single metal film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15650876A JPS6051250B2 (en) | 1976-12-27 | 1976-12-27 | Manufacturing method of thin film capacitive element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15650876A JPS6051250B2 (en) | 1976-12-27 | 1976-12-27 | Manufacturing method of thin film capacitive element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5381940A JPS5381940A (en) | 1978-07-19 |
| JPS6051250B2 true JPS6051250B2 (en) | 1985-11-13 |
Family
ID=15629286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15650876A Expired JPS6051250B2 (en) | 1976-12-27 | 1976-12-27 | Manufacturing method of thin film capacitive element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6051250B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5107541B2 (en) * | 2006-08-22 | 2012-12-26 | ルネサスエレクトロニクス株式会社 | Insulating film forming method and semiconductor device manufacturing method |
-
1976
- 1976-12-27 JP JP15650876A patent/JPS6051250B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5381940A (en) | 1978-07-19 |
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