JPS6043684B2 - limiter circuit - Google Patents
limiter circuitInfo
- Publication number
- JPS6043684B2 JPS6043684B2 JP52038407A JP3840777A JPS6043684B2 JP S6043684 B2 JPS6043684 B2 JP S6043684B2 JP 52038407 A JP52038407 A JP 52038407A JP 3840777 A JP3840777 A JP 3840777A JP S6043684 B2 JPS6043684 B2 JP S6043684B2
- Authority
- JP
- Japan
- Prior art keywords
- diode
- current
- transistor
- limiter circuit
- magnitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G11/00—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
- H03G11/002—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general without controlling loop
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
【発明の詳細な説明】
本発明はりミッタ回路に関し、特に簡単な構成で電源電
圧が変動しても閾値の変化しないりミッタ回路を提供せ
んとするものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a limiter circuit, and an object of the present invention is to provide a limiter circuit which has a particularly simple configuration and whose threshold value does not change even when the power supply voltage fluctuates.
以下、第１図及び第２図を参照しながなら本発明の一実
施例を説明しよう。Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1 and 2.
第１図は本発明の基本的な動作を説明するための接続図
である。FIG. 1 is a connection diagram for explaining the basic operation of the present invention.
ここで１は電源電圧Ｖｃｃの供給される電源端子である
。この電源端子１をその電流の大きさ１、の信号電流源
２及びその電流の大きさ１０の信号電流源３から成る直
列回路を介して接地すると共に抵抗器４及び５から成る
直列回路を介して接地する。Here, 1 is a power supply terminal to which power supply voltage Vcc is supplied. This power supply terminal 1 is grounded through a series circuit consisting of a signal current source 2 whose current magnitude is 1 and a signal current source 3 whose current magnitude is 10, and also through a series circuit consisting of resistors 4 and 5. and ground.
そして之等抵抗器４と５との接続中点、にダイオード６
のアノードを接続し、信号電流源２と３の接続中点にダ
イオード６のカソードを接続する。そして抵抗器４と５
の接続中点から出力端子７を導出する。以下この第１図
に示すりミッタ回路について説明する。And a diode 6 is connected to the midpoint between the resistors 4 and 5.
, and the cathode of a diode 6 is connected to the midpoint between the signal current sources 2 and 3. and resistors 4 and 5
Output terminal 7 is derived from the connection midpoint of . The limiter circuit shown in FIG. 1 will be explained below.
ここで１２＞１、とするダイオード６にはｉ。■１、−
１、の電流が流れる。この時抵抗器５に流れる電流をｉ
とすると、抵抗器４にはｉ＋ｉｏの大きさの電流が流れ
る。ここで抵抗器４及び５の抵抗値を各々Ｒ、、Ｒ２、
出力端子７に得られる出力電圧をＶ。とすると以下の関
係が成り立つ。即ちＶｏ■Ｖｃｃ−（ｉｏ＋ｉ）Ｒ、・
・・・・・（１）Ｖｏ■ｉＲ２・・・・・・（２）第１
式と第２式より次の関係が得られる。Here, i is applied to the diode 6 where 12>1. ■1, -
A current of 1 flows. At this time, the current flowing through resistor 5 is i
Then, a current of magnitude i+io flows through the resistor 4. Here, the resistance values of resistors 4 and 5 are respectively R, , R2,
The output voltage obtained at the output terminal 7 is V. Then, the following relationship holds true. That is, Vo■Vcc-(io+i)R,・
...(1) Vo■iR2...(2) 1st
The following relationship is obtained from the equation and the second equation.
Ｒ２Ｒ１Ｒ２ ＶＯ■ＶＣＣＲ１＋Ｒ２ｉ０Ｒ１＋Ｒ２ ■Ｖｏｌ−ｖｏ・・・・・・（３） ここでり。R2R1R2 VO■VCCR1+R2i0R1+R2 ■Vol-vo・・・・・・(3) Here it is.
■ｉｏ仇Ｒ。■io enemy R.
ＶＯＩ。VOI.
Ｖ−ＣＣＲ１＋Ｒ２ で、Ｖｏ、は出力電圧Ｖ。V-CCR1+R2 So, Vo is the output voltage V.
中の直流分を示し、ｖｏは出力電圧り。中の信号分を示
す。ここでＲＬ■』』Ｌとすれば
Ｒ１＋Ｒ２
ｖｏ＄ ＲＬｉｏ。VO is the output voltage. Indicates the signal inside. Here, if RL■''L, then R1+R2 vo$RLio.
Ｒし （１２−１１）゜゜゜゜゜゜（４）となる。第４
式から明らかな様にこのりミッタ回路のしきい値は１０
■１、となる場合である。次に本発明の一実施例を第２
図を参照しながら、説明する。ここでは電源端子１を抵
抗器８を介してＰＮＰ形トランジスタ９及び１０のエミ
ッタに接続すると共に抵抗器１１と１２の直列回路を介
して接地する。R (12-11)゜゜゜゜゜゜゜(4). Fourth
As is clear from the formula, the threshold value of this limiter circuit is 10
(1) This is the case. Next, a second embodiment of the present invention will be described.
This will be explained with reference to the figures. Here, the power supply terminal 1 is connected to the emitters of PNP transistors 9 and 10 via a resistor 8 and grounded via a series circuit of resistors 11 and 12.
そして抵抗器１１と１２の接続中点を抵抗器１３を介し
てトランジスタ９のベースに接続し、この接続中点を抵
抗器１４を介してベース１０のトランジスタに接続する
。そしてトランジスタ９のコレクタをＮＰＮ形トランジ
スタ１５のコレクタに接続し、このトランジスタ１５の
エミッタを抵抗器１６を介して接地する。又トランジス
タ１０のコレクタをダイオード１７のアノードに接続し
、このダイオード１７のカソードを抵抗器１８を介して
接地する。The midpoint of the connection between the resistors 11 and 12 is connected to the base of the transistor 9 via the resistor 13, and the midpoint of the connection is connected to the base of the transistor 10 via the resistor 14. The collector of transistor 9 is connected to the collector of NPN transistor 15, and the emitter of transistor 15 is grounded via resistor 16. Further, the collector of the transistor 10 is connected to the anode of a diode 17, and the cathode of the diode 17 is grounded via a resistor 18.
そしてトランジスタ９及び１０のベース間に信号電圧源
１９を接続し、ダイオード６のカソードをトランジスタ
９のコレクタに接続する。そしてトランジスタ１５のベ
ースをダイオード１７のアノードに接続する。このトラ
ンジスタ１５とダイオード１７はカレントミラー回路を
構成し、トランジスタ１５及びダイオード１７に流れる
電流の大きさの比は抵抗器１６及び１８の抵抗値の大き
さの比によつて定まる。ここでトランジスタ９及び１０
は差動増幅器を構成する。以下上述の様に構成されたり
ミッタ回路の動作を説明する。A signal voltage source 19 is connected between the bases of transistors 9 and 10, and the cathode of diode 6 is connected to the collector of transistor 9. Then, the base of transistor 15 is connected to the anode of diode 17. The transistor 15 and the diode 17 constitute a current mirror circuit, and the ratio of the magnitudes of the currents flowing through the transistor 15 and the diode 17 is determined by the ratio of the magnitudes of the resistance values of the resistors 16 and 18. Here transistors 9 and 10
constitutes a differential amplifier. The operation of the transmitter circuit configured as described above will be explained below.
ここで無信号時トランジスタ９，１０のエミッターコレ
クタ間に流れる電流の大きさを１３とし、抵抗器１６と
１８の抵抗値の比をｎ（ｎ〉１）とする。ここで信号電
圧源１９によりトランジスタ１０のエミッターコレクタ
間にＩ３＋ｉの大きさの電流が流れるとすると、トラン
ジスタ９のエミッターコレクタ間には１３−１の大きさ
の電流が流れる。この時カレントミラー回路を構成する
ダイオー．ド１７にＩ３＋ｉ１の大きさの電流が流れる
から同じくカレントミラー回路を構成するトランジスタ
１５のコレクターエミッタ間にはｎ（１３＋ｉ１）の大
きさの電流が流れるから、ダイオード６に流れる電流の
大きさをＩ２とするととなる。Here, the magnitude of the current flowing between the emitter and collector of the transistors 9 and 10 when there is no signal is assumed to be 13, and the ratio of the resistance values of the resistors 16 and 18 is assumed to be n (n>1). If the signal voltage source 19 causes a current of magnitude I3+i to flow between the emitter and collector of transistor 10, a current of magnitude 13-1 flows between the emitter and collector of transistor 9. At this time, a diode forms a current mirror circuit. Since a current of magnitude I3+i1 flows in the diode 17, a current of magnitude n(13+i1) flows between the collector and emitter of the transistor 15, which also constitutes the current mirror circuit, so the magnitude of the current flowing in the diode 6 is expressed as I2. Then it becomes .
この為以下の式が成り立つ。Therefore, the following formula holds true.
第５式と第２式より ｔ（１Ｋ２ ここでＶ。From the 5th and 2nd equations t(1K2 Here V.
″＝Ｉ２酊；酊従つて となる。″=I2 drunkenness; drunkenness becomes.
第７式から第２図に示すりミッタ回路のしきい値はとな
る。From Equation 7, the threshold value of the limiter circuit shown in FIG. 2 becomes.
ここでトランジスタ９及び１０から成る差動増幅器に於
いて抵抗器８は定電流源を構成し、電源電圧の変動によ
つて、１３は変化することはない。In the differential amplifier composed of transistors 9 and 10, resistor 8 constitutes a constant current source, and resistor 13 does not change due to fluctuations in the power supply voltage.
又第８式より明らかに抵抗器３及び４の抵抗値の比ｎを
変えることによりリミツタ回路のしきい値を任意に定め
ることができる。本発明は上述の様に差動増幅器とダイ
オードを用いるのみの簡単な構成でりミッタ回路を構成
することができる。Furthermore, it is clear from the eighth equation that the threshold value of the limiter circuit can be arbitrarily determined by changing the ratio n of the resistance values of the resistors 3 and 4. As described above, the present invention can configure a transmitter circuit with a simple configuration using only a differential amplifier and a diode.
又差動増幅器を流れる電流の大きさは電源電圧の変動に
よつて変化することはないから第８式によつて定まるし
きい値も電源電圧の変動によつて変化することはない。Furthermore, since the magnitude of the current flowing through the differential amplifier does not change due to fluctuations in the power supply voltage, the threshold value determined by equation 8 also does not change due to fluctuations in the power supply voltage.
図面の簡単な説明第１図は本発明の基本的な動作を説明
する為の接続図、第２図は本発明の一実施例を示す接続
図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a connection diagram for explaining the basic operation of the present invention, and FIG. 2 is a connection diagram showing one embodiment of the present invention.
２及び３は第１及び第２の電流源、６はダイオードであ
る。2 and 3 are first and second current sources, and 6 is a diode.
Claims (1)
を直列に接続し、この接続点をダイオードを介して所定
値の直流電圧を有する出力端子に接続して、上記第１又
は第２の電流源の少くとも一方を入力信号により変化さ
せて、上記入力信号のレベルが所定値をこえた時に上記
ダイオードをカットオフさせる様にしたことを特徴とす
るリミッタ回路。1. A first current source and a second current source are connected in series between a power supply and a reference potential point, and this connection point is connected to an output terminal having a predetermined value of DC voltage through a diode. Alternatively, a limiter circuit characterized in that at least one of the second current sources is changed by an input signal so that the diode is cut off when the level of the input signal exceeds a predetermined value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52038407A JPS6043684B2 (en) | 1977-04-04 | 1977-04-04 | limiter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52038407A JPS6043684B2 (en) | 1977-04-04 | 1977-04-04 | limiter circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS53123646A JPS53123646A (en) | 1978-10-28 |
| JPS6043684B2 true JPS6043684B2 (en) | 1985-09-30 |
Family
ID=12524435
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52038407A Expired JPS6043684B2 (en) | 1977-04-04 | 1977-04-04 | limiter circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6043684B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS633825B2 (en) * | 1983-11-30 | 1988-01-26 | Hitachi Ltd |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5687906A (en) * | 1979-12-18 | 1981-07-17 | Matsushita Electric Ind Co Ltd | Amplifier |
-
1977
- 1977-04-04 JP JP52038407A patent/JPS6043684B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS633825B2 (en) * | 1983-11-30 | 1988-01-26 | Hitachi Ltd |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS53123646A (en) | 1978-10-28 |
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